Commit grafiek

23 Commits

Auteur SHA1 Bericht Datum
Ben Goz 2fa7eef572 Adding support for mGPU
Change-Id: I5ed184e6a58b38d9dde48867f14513d161cf41a9
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: ea0f9d2a0b]
2016-01-04 15:35:15 +02:00
Philip Cox 782cea350c Add SDMA IOCTL type to Create Queue function.
Change-Id: I7e31507b761ca388b2cac93f994f6106de962f17


[ROCm/ROCR-Runtime commit: 0c234c7ef3]
2015-10-29 10:25:41 -04:00
Harish Kasiviswanathan 462a775ec3 Fix hard-coded usage of Node 0
Use appropriate NodeId instead

Change-Id: I46af93b76978fea7bedb34457fcc0864ed4fe2d4


[ROCm/ROCR-Runtime commit: b6c6f79143]
2015-10-14 17:27:38 -04:00
Felix Kuehling 574fcdd340 Fix various dgpu memory management issues
Fix TONGA_PAGE_SIZE value and move it to libhsakmt.h for usiing it
consistently in all places that require the same alignment for the
same reason. Create a generic alignment helper macro to replace some
incorrect hand-coded size alignments.

Move virtual address and size alignments down into aperture management
functions. Alignment is a per-aperture property that is set during
fmm_init_process_apertures. Doing the alignment there ensures that
all allocations in the same aperture are aligned the same way. Finding
objects by size and address can take the alignment into account.

Also align the size of physical allocations to back aligned virtual
address allocations. CPU mappings do not need to be aligned.

Map anonymous pages over released memory mappings to allow the
backing pages to be released, while keeping the address space
reserved.

Add alignment parameter to free_exec_aligned_memory_gpu to match the
interface of allocate_exec_aligned_memory_cpu. It doesn't make sense
to allow an alignment parameter in one but assume a specific
alignment in the other.

Change-Id: I74226ca6938f4948f643e5aee1d474720cd89e78


[ROCm/ROCR-Runtime commit: 6a5ca4bc5a]
2015-10-13 19:14:56 -04:00
Felix Kuehling a4c4170906 Add support for gfx803
Create new device_info and add device ID. Add helper macros to
identify chip families (VI, discrete). For now gfx803 behaves like
gfx802. But if necessary we can have gfx802 or gfx803-specific
code paths or workarounds in the future.

Change-Id: I61b4ffef7dd7796bb34cb01fbff0089bd49507bb


[ROCm/ROCR-Runtime commit: 0fc0a5b526]
2015-10-09 17:40:54 -04:00
Felix Kuehling c3a1263604 Add all gfx802 device IDs to supported_devices
Without this, queue creation segfaults on unknown devices.

Change-Id: Ieea0bc4783e7313b3dcdabf03ab1269e3670b217


[ROCm/ROCR-Runtime commit: 7505893cc7]
2015-10-02 15:33:37 -04:00
shaoyunl d30daaba5d Initiali support for CWSR on thunk
1. Add IOCTL defines to set trap handler
2. Add control stack size information on create queue argument.
3. Increase the total save&restore area size for carrizo to include the control stack size.

Signed-off-by: Shaoyun Liu <Shaoyun.liu@amd.com>

Change-Id: Iccf15e073b7db2519e96e7f7b46a89d57ab9a4df


[ROCm/ROCR-Runtime commit: 2d63ee7b8f]
2015-09-25 15:12:25 -04:00
Ben Goz 9db147f2d4 Support gfx802 dGPU
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: fb8378a18b]
2015-08-30 14:13:53 +03:00
Ben Goz 918ad5eac6 Revert "Enable creating SDMA queue."
This reverts commit fcf6e22216.


[ROCm/ROCR-Runtime commit: bb4a5cddd9]
2015-08-05 13:33:42 +03:00
Flora Cui 0f0e28cbdb Add interface to set CU mask
Signed-off-by: Flora Cui <flora.cui@amd.com>
Acked-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: fc4e07daa3]
2015-07-23 15:44:01 +08:00
Xihan Zhang fcf6e22216 Enable creating SDMA queue.
Signed-off-by: Xihan Zhang <xihan.zhang@amd.com>
Reviewed-by: Ben Goz<ben.goz@amd.comt>


[ROCm/ROCR-Runtime commit: 112f7e751a]
2015-04-28 23:42:49 +08:00
Oded Gabbay 7a243604ad Disable SDMA queue creation
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 13e0d87733]
2015-03-01 14:40:16 +02:00
Oded Gabbay ecf262fd54 Revert "Disable SDMA queue creation"
This reverts commit c1cfb2a540.


[ROCm/ROCR-Runtime commit: 417e6f7501]
2015-03-01 14:36:45 +02:00
Oded Gabbay c1cfb2a540 Disable SDMA queue creation
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: f3ac33230e]
2015-03-01 11:08:46 +02:00
Oded Gabbay 9a511e8e1e Revert "Workaround for non cached memory issue on gfx801 A0"
This reverts commit b494094790.

Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
Acked-by: Ben Goz <ben.goz@amd.com>

Conflicts:
	include/linux/kfd_ioctl.h
	src/queues.c


[ROCm/ROCR-Runtime commit: 5c0f8660b6]
2015-02-16 17:22:45 +02:00
Ben Goz a22e054980 fix a bug in rptr page release
Adjust to new ioctl format

Signed-off-by: Ben Goz <ben.goz@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: e7a5cda5a5]
2014-12-14 13:49:41 +02:00
Ben Goz b494094790 Workaround for non cached memory issue on gfx801 A0
Signed-off-by: Ben Goz <ben.goz@amd.com>

Adjust to new ioctl format

Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 402ff3f881]
2014-12-07 14:51:53 +02:00
Ben Goz 75895e0f5e Supporting QCM for gfx801
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: c5585b0f26]
2014-12-07 14:50:28 +02:00
Ben Goz 4676447863 Add SDMA queues support
Signed-off-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 8afe1ef4e8]
2014-07-01 16:51:57 +03:00
Oded Gabbay 22136281cb Move from direct call to kfd_ioctl to wrapping kmtIoctl
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 94c0329fc4]
2014-12-29 15:37:42 +02:00
Oded Gabbay f231b71743 Change names of IOCTLS
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 9f647b07ff]
2014-12-29 13:34:32 +02:00
Ben Goz 89e31c5281 Add queues module
Signed-off-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 678287d98b]
2014-07-29 13:56:50 +03:00
Oded Gabbay a91aa132aa Add skeleton driver which supports open and close
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 85ba9efa18]
2014-07-29 11:16:00 +03:00