The error checking macro IS_OPEN returns an hsa_signal_t.
This conflicts with the return type of uint32_t.
Add an assert and rely on spurious return rule to return zero
when rocr is not initialized.
Change-Id: Ifc9bb75e22ecdd675273de59b31e5026a69c62e0
For small copies cache flush latency is larger than data transfer
latency in local VRAM. Select SDMA for small copies.
Environment key HSA_FORCE_SDMA_SIZE is added for easy adjustment
of the small copy size. This may be removed after tuning is done.
Change-Id: I733fa0ae01c616617c5de50e71226b51fd589ef2
We want wraparound behavior here but we don't want to trigger sanitizer
warnings. Converting to int64_t and then wraping around by cast to
uint64_t avoids the UB issue that triggers the sanitizer warning.
Change-Id: I9400b988dce7899e9ba42cab3e35c7ffedec8fe1
Make explicit reference to hsa_api_trace.cpp from
initialization of hsa_table_interface.cpp. Breaks
the ability to use hsa_table_interface.cpp in plugins.
Change-Id: I22a42d3a132512b0d9ec7a1ca629b169e7f8eba7
The excess declarations mark implemenation functions as default
visibility. Normally this is not an issue since our linker script
will specify which visible symbols will be permitted into the dynamic
symbol table. However, for static linking methods which apply linker
directives during incremental linking symbol visibility must be correct
in the (non-dynamic) symbol table.
Change-Id: I13dc8dd1019368e8943920d36335a91f0c555a92
The size of the m0 payload for MSG_INTERRUPT has changed in gfx10. It is
now 23bit wide instead of 24bit wide in gfx9.
Since we are generating different binaries for gfx9 and gfx10, we can
conditionally set DEBUG_INTERRUPT_CONTEXT_ID_BIT to 23 for gfx9 and
22 for gfx10.
Change-Id: Ifc15a9fa4399d35328ab58b742f791f1660bcd9a
- Make code object reader use mmap when loading from a file on Linux.
- Support computing code object URI for memory either fro the loaded
host executables, or from all mmapped files. Define the environment
variable HSA_LOADER_ENABLE_MMAP_URI to non 0 to search the mmap
files, otherwise only the loaded executables will be seatched.
- For mmap search, determine file size and ommit offset and size URI
fragment when the code object is the whole file even when specifying
a file size explicitly or specifying memory that has been mmaped.
- Always return a non-empty code object URI.
- When a code object reader is created, complete all fields to ensure
it can be used in a multi-threaded manner using only const
operations.
- Add missing exception handlers in the AMD vendor extentions.
- More rigorous checking for errors.
Change-Id: I07797b1dc60c5c64245142d77becf9f7c9643395
We should preserve the queue address and queue size when suspending a
queue. The ROCdbgapi gets all its information from the KFD, and if we
reset the queue properties, a call to queue snapshot will not return
the correct information.
Change-Id: I646ed4a779cada55b0c1b4342ec140d3678beb67
For static linking all non-API functions must have internal linkage
or be in project namespace to avoid colliding with application symbols.
Change-Id: I3398e40a387cca36f3ddef2b978306c765161d72
Adds support for find_package(), locates dependencies with
find_package(), swaps the roles of /hsa/include/hsa and /include/hsa
as well as /lib & /hsa/lib.
Kernel code objects no longer build at every make call but only
as needed. Dependencies are tracked through to clang.
Device lib is still located with directory searches. build_devicelibs.sh
does not yet install the cmake config files on the build systems.
Corrects DAZ mode mismatch in code object compilation.
Still needs updating to compiler properties rather than direct
manipulation of CMAKE_CXX_FLAGS.
Change-Id: I02d946c8a77d5cf753681f8e3d3153fca4aae86a
Save and restore exec_lo/exec_hi around the mGetDoorbellId macro in
the signal_error case just like we do in the signal_debugger case.
Also reset the wave_id (ttmp4/ttmp5) to 0 since it isn't preserved.
0 will be detected as a new wave by the debugger api library.
Change-Id: I5123caa9431154ec1584bae85e42648c97c64c37
Initialize all the fields in the HSA queue object to known values
before calling the thunk to create the KFD queue. This ensures that
when the debugger detects that a KFD queue is created it can access
the values it requires. The values it requires include the apperture
addresses, queue scratch memory base, and the HSA queue kind.
Change-Id: Ic985755b0402c6794d5987e60aff50d223f09eb9
- Check address is in the range of the mapped file.
- Correct calculation of offset within the file.
Change-Id: I848a3ead4422698c2ef1c140bc8ae5e000a717f7
Set ttmp11[8] and send a signal for the debugger when the handler
is entered because of an address watch exception.
Change-Id: Icc83a79027bb7ca1e50e19e2f00464cb9ca862f3
Adds the following:
- New factory method to create a code object reader from
file with offset and size.
- A pair of queries on a loaded code object to get the URI name/length.
- A bump to the AMD vendor loader extension API and its associated table.
Change-Id: I17c83e9c2447d29a43c438459395365f786a3611
Memory from the suballocator may be exported via IPC. If this
happens then the allocating process should not reuse that memory
since it would still be connected to the remote process. IPC exported
memory must be released back to the driver.
Change-Id: I2ab0c814f63191f753fc3640cc4140ee144bf07f
All types which could be generated from a fragment need to take this branch.
Taking the branch is correct for all types, it was a performance optimization
only and was missing IPC. Branch removal simplifies updates for any future
fragment use and will allow CQE to report any performance issues that might
require bringing the branch back.
Change-Id: I8041788c422e880b764e144eb1877f5126ba76f3
Thunk may report nullptr for host base if the host does not have
access. Use agent base in this case.
Change-Id: I44883d35a3fff0941b1e3037d16b059591a6c511
The 1st level trap handler jumps to the 2nd level trap handler on
context save requests or regular traps if (mode.debug_en
&& !status.halt) is true.
If we return from the 2nd level trap handler without status.halt=1, then
we need to make sure mode.debug_en is cleared, or we will re-enter the
2nd level trap handler again and again when trapsts.savectx is set.
Change-Id: I4db6369de8c91a32842f488a4df5c9d94fa65aa9
In the case where SQ_WAVE_TRAPSTS_XNACK_ERROR_MASK is set, we also need
to set the TTMP11_EXCP_RAISED_BIT in ttmp11. If we don't, the debugger
may think that the wave is halted at launch (halted without events).
Change-Id: I8c19605bbfc145275728de4ad1979d3ba8bb478a
- Correct defintion of HSA_QUEUE_TYPE_COOPERATIVE to be a queue type
and not a bit mask.
- Correct implementation of hsa_queue_type_t to treat is as an
enumeration type and not a bit mask. In particular
HSA_QUEUE_TYPE_COOPERATIVE is a distinct queue type that uses the
multi producer protocol, and is not a bit set value.
Change-Id: I9415be8853671e5511e16e306caf16020e8c84af
The ROCR trap handler should check for all end program instructions
and not halt on them. Mask off the imm16 before comparing the
instruction to the s_endpgm opcode.
Change-Id: I669ffc7f5b699d7daf0c8ec5761ed7bb193f07a7
New trap handler ABI: Record in ttmp11[8:7] the event that caused the
trap handler to be entered. We currently record 2 events, trap_raised
if an s_trap instruction was executed, or excp_raised if an exception
(MEM_VIOL or ILLEGAL_INST) was raised.
Change-Id: Ie278c8277437b3b67c2737dcd1a12fe6511df428
Changes in the compiler are being made to add controls for XNACK and SRAM ECC
for all targets which can support these features. By default the conservatively
correct settings of XNACK on and SRAM ECC on will be used. This change is to
facilitate these backend updates.
Change-Id: I2fd6b6bc1d32937737e7f56d8e08c70fe781c745
IPC create must only be used on whole ROCr allocations.
Fragments were allowing handle creation with offsets.
Change-Id: I1faa96d36bc7a6199bdc2e3ff1b8871d1a36a2fa
This has been the default mode for a while now since we don't
distribute or build the finalizer. Removing the attempt cleans
up debug mode messages that are causing confusion.
Change-Id: I8162c95abd5bbedaa22b90191f7a384a34c388ae
Sean Keely
Konstantin Zhuravlyov
Chris Freehill
Tony
Laurent Morichetti
Ramesh Errabolu
Joseph Greathouse
Austin Kerbow