Commit Graph

47 Commits

Author SHA1 Message Date
Ravi C Akkenapally 6629930067 SWDEV-179105 - Stream Operations: Add support for Wait and Write
Change-Id: Ibffa1d6d573826b64763da280074a77271d66808


[ROCm/clr commit: 0a5f9a3b10]
2021-02-15 17:02:38 -08:00
kjayapra-amd 4583cbafee SWDEV-270013 - Allocate kernel_arguments from kern_arg & finegrain pool instead of coarse grain.
Change-Id: Id4c6977934fdd6ef2311f6e75593801f1e51983c


[ROCm/clr commit: 2df099df9e]
2021-02-15 18:20:08 -05:00
Payam 72b49f0800 SWDEV-257937 - Updated fix for ROC_BARRIER_SYNC=0
Change-Id: I7e28e541b654db57fb0890d7dbb7519cfb2d93db


[ROCm/clr commit: a2e0b0495c]
2021-02-11 14:01:45 -05:00
Rahul Garg ff35f82881 SWDEV-271182 - Fix HdpMemFlushCntl and HdpRegFlushCntl
Change-Id: Ib690b475c2c4514c862ded5fc2bdd1049e27bd46


[ROCm/clr commit: df0b14ff47]
2021-02-10 11:40:35 -05:00
Tony Tye a05c745d54 SWDEV-268864 - Remove duplicatation of isa related information
Remove targetId_, gfxipMajor_, gfxipMinor_ and gfxipStepping_ from
device::Info as they are now available in device::Isa.

Change-Id: I381b1d4798ebf50655740e004a01ac7f86dbf668


[ROCm/clr commit: c2308216dd]
2021-01-18 22:32:37 +00:00
Jason Tang 3b5b0175ac Fix build error when building with clang++
Change-Id: If1c9fbd6af6028bd39ff43ee53d74d5e778e2a27


[ROCm/clr commit: c0730b69d5]
2021-01-18 09:45:19 -05:00
Tony Tye 902cf1a239 Update code object handling for GSL, PAL and ROCm
- Correct GSL path to report targets using the TargetID syntax.

- Correct GSL path to check compatibility of code objects when
  loading.

- Add concept of an device isa and create a registery used by ROCm,
  PAL and GSL.

- Support XNACK and SRAMECC target features consistently for PAL and ROCm.

- Correct logic for NullDevices and asserts to avoid memory coruption.

- Allow all NullDevices to be created for HIP.

- Numerous other code improvements.

Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e


[ROCm/clr commit: c7e8d91e14]
2021-01-14 11:11:51 -05:00
Tony Tye 2476472bcb Make hsa_agent_t handles use pointer to device::Device
For roc devices create hsa_agent_t handles using a pointer to the
device::Device. This ensures each device has a different hsa_agent_t
handle. This may be necessary to ensure the loader symbol lookup will
search only symbols for the correct device.

Change-Id: Iee6dd40d68bf22a02ce8c75cbe5ac8f5a0d9e418


[ROCm/clr commit: 76c371d78a]
2021-01-13 08:24:28 +00:00
Tony Tye 1215c2d51e Add virtual destructor to device::Settings
Add virtual destructor to device::Settings since derived classes are
allocated, but are deleted using the base class. This ensures the
descructors of the derived clsses will be executed if present.

Change-Id: I1f974b986193c60128009a768ec6b01b9deeacd5


[ROCm/clr commit: 77268b2e60]
2021-01-13 08:24:28 +00:00
Tony Tye efd1f5add1 [NFC] Move device::Info::targetId_ declaration
Move declaration of device::Info::targetId_ to be adjacent to the
other char* name fields.

Change-Id: Iefb249e801765a87b243a2a5e6997e78e817be2b


[ROCm/clr commit: a8d7e59dff]
2021-01-13 08:24:28 +00:00
Tony Tye 3b6c42f78d [NFC] Correct comments and line spacing
- Correct spelling mistakes or working in comments.
- Adding missing line separators.
- Add missing comments for namespace closing brace.

Change-Id: If09cdd38aa088b0f68f750dfdef81351eb8c4935


[ROCm/clr commit: eb16dc5ef3]
2021-01-13 08:24:28 +00:00
Jason Tang 6778b6e4e2 SWDEV-263539 - More Target ID fix in GSL path
On behalf of Tony Tye. The bootleg passes CQE Baffin/Ellesmere test.

Change-Id: I4c21d21b3aaba360682ef15b8a4dda239f8af276


[ROCm/clr commit: d4316141b7]
2020-12-14 16:48:55 -05:00
German Andryeyev 8014e4c7bc Remove obsolete terminate() method
Change-Id: I66b4a74f17977f1af320f402402a2f1b602e9911


[ROCm/clr commit: 08b846ae12]
2020-11-30 11:46:09 -05:00
Alex Xie 2a6c8ecb60 SWDEV-258808 - OCLSeparateCompile subtest of oclcompiler error
[PAL to KFD/ROCr][ROCr_Runtime][Vega10] OCLSeparateCompile subtest of
oclcompiler from ocltst test package is encountering clLinkProgram()
failed (chksum 0x00000001) error

If runtime does not provide a file name as dump file to ELF library,
ELF library use a temp file in current folder.
The current folder can be not writable for several reasons:
1. The application current folder might be system folder, the user
  does not have write permission.
2. The current folder is under a readonly file system. This happens for
embedded customers.

Tested in VEGA10. Issue was fixed.

Change-Id: Ic0e9f040b7c7583914301673cce237ab28b0c0cb


[ROCm/clr commit: 6327dbc4cc]
2020-11-24 15:08:12 -05:00
Aryan Salmanpour e8c7cf569f Add an environment variable for setting a global CU mask
Change-Id: I773b152023c7b8e1e679a42015748f9b23fd946d


[ROCm/clr commit: d03ee6eff6]
2020-11-20 10:05:09 -05:00
Jason Tang 091f1e8e85 Change file mode 755 back to 644
Change-Id: I4ba5d66997ffd3331c56674d4bf805160dcdf049


[ROCm/clr commit: 25cc965c76]
2020-10-19 15:09:32 -04:00
Rahul Garg 7b0edf7aa0 Fix PCI bus domain ID
SWDEV-256338

Change-Id: I09afdca4f1a08f99ce662a4c4ed8a51d85500699


[ROCm/clr commit: a224dc2a7b]
2020-10-15 14:59:57 -04:00
Rahul Garg 40b90694c6 Add image1DMaxWidth_ for maxTexture1D property
Needed by SWDEV-254068

Change-Id: Ic650dfb6e5b38d7544ba647c53de52deda39b92d


[ROCm/clr commit: c0f8b52f06]
2020-10-14 17:30:43 -04:00
German Andryeyev 2b3377b0bc Add ROCr queries for HMM support
Change-Id: I2b5508bf0faf8f48dd7348d6a5202fb28de09876


[ROCm/clr commit: c05de4f2f9]
2020-10-13 09:12:00 -04:00
Sarbojit Sarkar 70d71642d2 [perf]hipMalloc performance optimization
Change-Id: I6e8a918cc1c4cafad197b09e10755cd180e11ead


[ROCm/clr commit: 4a025e1a87]
2020-10-06 03:19:41 -04:00
German Andryeyev 7229c259ca Add support for CPU device in advise
Change-Id: I7250e0183580c14cd3d6050ef85f9ce26e36f4a8


[ROCm/clr commit: df63547906]
2020-10-05 12:52:46 -04:00
Jatin Chaudhary 2a16ef5d04 Adding and populating available registers per cu value
Change-Id: Ide012038a9d74b20166ce1e69a9f2c0cbdce0d73


[ROCm/clr commit: d0f009a0ee]
2020-09-28 05:30:23 -04:00
kjayapra-amd b3e8c5cdb0 SWDEV-252542 - Fixing Win Compilation on SWDEV-241902.
Change-Id: If76f79002b265dccf6da4acef1ff9372d8b0a2ff


[ROCm/clr commit: 7462e39954]
2020-09-18 12:11:56 -04:00
kjayapra-amd 3e6cf63a83 SWDEV-241902 - Changes to pass file descriptor and offset to load code object.
Change-Id: I0243cccdeaa533b2a56fde42f12d5424c3b63a3b


[ROCm/clr commit: a66c56d641]
2020-09-15 07:54:24 -04:00
Jason Tang eaf65e59ae Remove gfxipVersion_ from device level
Change-Id: I11485beffdb9371a20d7abcaa1d1774c102db574


[ROCm/clr commit: 5ecce5c287]
2020-09-07 11:33:49 -04:00
kjayapra-amd bfaa8f8ab5 SWDEV-240800 - P2P device attributes support
Change-Id: I2b060a66715f676dfb7136940e69e21288f509d8


[ROCm/clr commit: 0163d8acc0]
2020-09-03 14:41:53 -04:00
Tao Sang f3b85497ae Replace private libelf with elfio
Change-Id: I4c630d78f7bf23dda85ec8480bb2790864405657


[ROCm/clr commit: e986f5c820]
2020-08-26 12:32:13 -04:00
Jason Tang 04054e9b60 SWDEV-246565 - Remove passing -msram-ecc to Comgr
Change-Id: I1604a0014186a5779561da3ec3eefec65aff5c37


[ROCm/clr commit: f8f6bc16a1]
2020-08-06 12:48:53 -04:00
Tao Sang 44eb207f8d Apply constexpr on global constant varaibles
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef


[ROCm/clr commit: fdef6f722f]
2020-07-22 22:14:13 -04:00
Jason Tang cd1ee42c36 SWDEV-232197 - Use HSA_ISA_INFO_NAME as the TargetID
TargetID will be passed to LC compiler.

Change-Id: I0385634922c11d53b57ebd596047698c47bda72b


[ROCm/clr commit: 8b7e0f3cfe]
2020-07-21 09:24:03 -04:00
kjayapra-amd adb0ce1c43 SWDEV-240165 - Move all amd::MemObjMap_ reference to ROCclr and only allow base ptr to get ipc handle.
Change-Id: I9de10a0c4ba4dee3b3c8b972966840ab807001d8


[ROCm/clr commit: 16e6b65b5c]
2020-07-09 21:19:45 -04:00
German Andryeyev 67c2bf6df4 Return always true for P2P validation under ROCr
Change-Id: Id32a5a94a642e708d1d042c5247af38501bec153


[ROCm/clr commit: 059832b526]
2020-07-04 11:38:04 -04:00
Jason Tang e762c29a30 Get gpu asicRevision_
Change-Id: I8afb53e027d912843655823eebaec29901c33d28


[ROCm/clr commit: 30e36a4925]
2020-06-12 14:51:52 -04:00
German Andryeyev 0a6056ac82 Initial HMM support
- Expose ROCclr interfaces for HIP usage
- ROCr interfaces aren't available in staging, thus control the
build with AMD_HMM_SUPPORT define

Change-Id: Iadc2bcc230e78d3b0dc22b235189c8cc80843446


[ROCm/clr commit: c5afd5d412]
2020-06-12 09:06:07 -04:00
kjayapra-amd c7b79be23d SWDEV-237467 - Adding return type to comply with -Wall compiler flag.
Change-Id: I3c9935105ef262cdbf1c8ee293930b018be0197a


[ROCm/clr commit: 3603272d24]
2020-05-23 14:22:54 -04:00
kjayapra-amd c1e072980d SWDEV-237467 - Return proper hip error codes incase of ROCclr IPC API failures.
Change-Id: I1d018918ed71f6d80846b3017f7a15f4ab496554


[ROCm/clr commit: 53a890b499]
2020-05-22 22:10:15 -04:00
Alex Xie 48068bdb89 Fix compile error in certain version of GCC
Change-Id: I27f021db908bf114a685427a47cd9f0d6b2e5693


[ROCm/clr commit: 966448c53b]
2020-05-20 13:13:55 -04:00
Chauncey Hui d400543947 Modified IpcDetach to return status instead of void.
Change-Id: I68ed94b93f0383babe25eb046b4047d249a0fdc1


[ROCm/clr commit: 0af9c06968]
2020-05-20 03:38:21 -04:00
Jason Tang f94e958680 Add major/minor/stepping to device layer
Change-Id: If82ea55a46b166b243a98089a6e9c40ccfdb479f


[ROCm/clr commit: cd2a713d63]
2020-05-17 12:57:34 -04:00
Alex Xie a97194485a SWDEV-232894 Port hipMemcpy optimizations from HCC to VDI
Apply the optimization to change for OpenCL too.
Clean up some unnecessary checks.

Change-Id: I840261fe35baeeadeba7388e86779d482f509aad


[ROCm/clr commit: 6c5a42b33c]
2020-04-30 11:06:28 -04:00
Alex Xie c158b9b3d0 SWDEV-232894 Port hipMemcpy optimizations from HCC to VDI
Change-Id: I6bebe9ac503a9f80d067aeea8a848409ad210338


[ROCm/clr commit: 009d0b5f55]
2020-04-27 14:53:58 -04:00
German Andryeyev 29c091d624 SWDEV-224639 - Device memory is still occupied
- Add cache free on OCL context destroy
- Remove std::mem_fun() usage, since it was removed in c++17

Change-Id: If6acd08f13a2298912ecd78fc025dcf0b32aee54


[ROCm/clr commit: 9f795d750d]
2020-03-30 17:39:21 -04:00
German Andryeyev 35dee1ac53 SWDEV-193956 - [hipclang-vdi-rocm][perf]
~45% to 50% of Performance drop on rocBLAS_int8 test

Add support for active waits without blocking the host thread.

Change-Id: Ie7bb48dcafcb4c93d448bf74749b829b626c3578


[ROCm/clr commit: 0fc433e076]
2020-03-04 17:02:15 -05:00
Vladislav Sytchenko c64226cefe SWDEV-224335
cl_bool needed to be replaced with uint32_t instead of bool. This is due to cl_bool being a typedef of cl_uint32.

Currently clGetDeviceInfo() reports incorrect size for the return value, due to cl_bool being 4 bytes and c++ bool being 1 byte.

Change-Id: I647a4b8873627059865c84c8ca27694dbc0916de


[ROCm/clr commit: 243a3c2aa4]
2020-03-03 11:50:37 -05:00
Laurent Morichetti b3297f189d Replace cl_* integral types with standard types.
cl_bool -> bool
cl_int -> int32_t
cl_uint -> uint32_t
cl_long -> int64_t
cl_ulong -> uint64_t
cl_float -> float
cl_double -> double
cl_bitfield -> uint64_t

Change-Id: I840c8993b55f98f5b745d21e27f5f28233647a58


[ROCm/clr commit: d9d9c69399]
2020-02-12 13:16:06 -08:00
Laurent Morichetti e284923583 Update copyright info
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba


[ROCm/clr commit: b4c6143a2f]
2020-02-04 09:26:14 -08:00
Laurent Morichetti 011f3e945b Merge branch 'origin/pghafari/vdi-prototype' into lmoriche/amd-master
Change-Id: Id3b833d405596735becb3346f3b08c6da57033fe


[ROCm/clr commit: 20c7173849]
2020-01-30 20:12:13 -08:00