Grafico dei commit

264 Commit

Autore SHA1 Messaggio Data
Julia Jiang 3c7ae28776 SWDEV-472710 - Adding gitattributes and remove trailing spaces
Change-Id: Ic8ad2071745f0ffe6a2e120bfebb6d90bf270f87


[ROCm/clr commit: dd30e0e893]
2024-07-15 12:39:56 -04:00
Ioannis Assiouras f3a77127b4 SWDEV-472309 - Check if vmm support exists before enabling vm in mempool
Change-Id: I6ae2fb18a306595e0f3a56e144658a4a720e7a37


[ROCm/clr commit: 0053584aac]
2024-07-12 10:11:03 -04:00
taosang2 20417d5b0f SWDEV-467540 - Fix reference of freed locks
1.Move global amd::monitor listenerLock before global
class runtime_tear_down as it will be referenced in
~RuntimeTearDown() after main(). It should be freed
later than runtime_tear_down.

2.Update  Device::~Device() to SVM free coopHostcallBuffer_
before context_ is released and freed.

Change-Id: I1d21378ff463477d3238d71e5e2a1a7d6b9147ad


[ROCm/clr commit: 544c45364f]
2024-06-18 13:58:36 -04:00
Anusha GodavarthySurya 291f079669 SWDEV-467102 - Hidden heap init for graph capture
If the graph has kernels that does device side allocation,  during packet capture, heap is
allocated because heap pointer has to be added to the AQL packet, and initialized during
graph launch.

Handle race with wait when 2 kernels with device heap are enqueued on multiple streams.

Change-Id: I45933b77fcaf7bc8fdf1bc906462e32b5d8d3688


[ROCm/clr commit: 57156c524d]
2024-06-17 02:07:25 -04:00
Satyanvesh Dittakavi 30c4d5805e SWDEV-464927 - Update the Get by PCI BusId logic and Hop count
- Update the intra socket weight for partitions within single socket as
it is changed to 13 by the driver.
- Use the PCIe function to distinguish the partitions of the same device
such as TPX mode in gfx942.

Change-Id: I8e64023d44e37c2dbb105cbb343441a48021ba7b


[ROCm/clr commit: 1815fc808d]
2024-06-10 04:46:50 -04:00
Ioannis Assiouras 75104df3b2 SWDEV-464648 - code and comment cleanups
Change-Id: I5ba3f1bff500b3cd5903c2f441017735e688f83f


[ROCm/clr commit: 8f42ad6aa3]
2024-06-07 22:38:09 +01:00
Ioannis Assiouras 407d1346f2 SWDEV-463865 - changed device,roc and pal namespaces to be nested under amd
Change-Id: Icad342843c039c634e249a13a7aa31400730b1dd


[ROCm/clr commit: 775dc204aa]
2024-06-07 12:23:06 -04:00
kjayapra-amd ea36bc11ce SWDEV-464455 - Init Segment flags and check for valid segment before passing to hsa APIs for allocation.
Change-Id: Ibe640093acdb7856115b6a4109bcf010adf20353


[ROCm/clr commit: 1590b39f9e]
2024-06-07 10:40:57 -04:00
Ioannis Assiouras 0e023d1a0a SWDEV-463865 - symbol renamings to prevent conflicts in static build
Change-Id: Id7fbb638c1088c23df52fee877cd790d637b1ffb


[ROCm/clr commit: b8c2ac4de4]
2024-06-06 04:05:55 -04:00
Lang Yu efc7e66c29 SWDEV-461525 - Add vgprAllocGranularity_ and vgprsPerSimd_ for gfx1150/1
These are missed for gfx1150/1.

Change-Id: I03d997e451d15a01a961e6597f805f634e5c3ae7
Signed-off-by: Lang Yu <lang.yu@amd.com>


[ROCm/clr commit: a0127c9eea]
2024-05-31 21:53:25 -04:00
Alex Xie b1cd519cc9 SWDEV-462635 - 256 byte image memory alignment
Change-Id: I1d21368ff460477d3238d71e4e2a0a7d6b9167ac


[ROCm/clr commit: 80011685b2]
2024-05-29 10:37:27 -04:00
Ajay 5b731168ca SWDEV-439581 - hip event flags clean up
Change-Id: I2197762d912da41a8b53b32b3446f0a958c988a6


[ROCm/clr commit: 6ec5074d74]
2024-05-28 06:31:10 +00:00
Ajay cea4f4290a SWDEV-439581 - hipEventBlockingSync flag for hip events
Change-Id: I0d7785a568f8007f82f999776a7ad23d0acc81b7


[ROCm/clr commit: a5a4b78606]
2024-05-28 06:31:10 +00:00
Vladana Stojiljkovic c05056e695 SWDEV-452364 - Check if no GPUs are available when hsa_init fails
* When no GPUs are available, hsa_init fails with HSA_STATUS_ERROR_OUT_OF_RESOURCES, and device and runtime initialization fails. In order for NoGpu tests to pass, true needs to be returned which will cause HIP_INIT_API to return proper error hipErrorNoDevice instead of hipErrorInvalidDevice.

Change-Id: I982d4416c92ed1b36893354d8b10d73df34f2478


[ROCm/clr commit: fdaa7141af]
2024-05-28 06:31:10 +00:00
kjayapra-amd 04ed74552f SWDEV-459254 - Overwrite cacheline size to 256 for gfx12, as it is used for kernarg alignment.
Change-Id: Ia6acf312ee84f6dde1c830fc21f10d3a8a9de5ee


[ROCm/clr commit: dd1dd86fd7]
2024-05-28 06:28:17 +00:00
Jaydeep Patel ab70925687 SWDEV-456279 - Adding new hip flag to access contiguous memory and pass the flag to HSA API.
Change-Id: I1bafeaa3096395c729723af958d609bc41e7845c


[ROCm/clr commit: 1d48f2a1ab]
2024-04-30 05:25:38 -04:00
Ioannis Assiouras 2f430138c5 SWDEV-451594 - Implement Readback and Avoid HDP Flush workaround for device kernel args
Change-Id: I6d41a089a17f55306e7ff402588a1e831b20a7a7


[ROCm/clr commit: bf74ef4025]
2024-04-19 09:29:20 -04:00
kjayapra-amd 71aa6ff3a0 SWDEV-413997 - VMM IPC implementation for Linux.
Change-Id: Icfeb83ca51e96be35abb67a94d6e3e1a1ca5a934


[ROCm/clr commit: 56ebf5157a]
2024-04-18 11:28:13 -04:00
German Andryeyev 7f195e2996 SWDEV-444670 - Enable teardown class
Force implicit runtime teardown with a global destructor.

Change-Id: Iabe63dedf5b94fefc98668585c45a61607120669


[ROCm/clr commit: c95a75a2bf]
2024-04-16 12:00:06 -04:00
Rakesh Roy f7dc86bdf4 SWDEV-453180 - Add UUID support for HIP_VISIBLE_DEVICES on Linux
- UUID is Ascii string with a maximum of 21 chars which uniquely identifies a GPU
- Convert set UUID in HIP_VISIBLE_DEVICES to device index internally
- Then use existing device index logic for HIP_VISIBLE_DEVICES

Change-Id: I8cab4fe42459f8209b97f909300789e6e687b9ac


[ROCm/clr commit: 52db98edd9]
2024-04-13 22:07:19 -04:00
kjayapra-amd 765e6f5d2f SWDEV-413997 - Fixing multiple device cases.
Change-Id: I10ad3fbfca887e92cd81f68392fa1acf753cbd2b


[ROCm/clr commit: d52d16c8e6]
2024-04-13 06:14:03 -04:00
kjayapra-amd ed9c629ad6 SWDEV-446298 - Adding error code to the logs on p2p hsa api failure.
Change-Id: Ic41b1ad1b64cca0e31986337a83a5146d52a7328


[ROCm/clr commit: 2b8634bada]
2024-04-10 06:00:00 -04:00
Saleel Kudchadker 4285981222 SWDEV-301667 - Fix SDMA mask reuse
If we are using the mask returned by getLastUsedSdmaEngine() then we
need to apply the SDMA Read/Write mask to it before using with HSA
copy_on_engine API.

Change-Id: I6e5dc6c187eeb3c61ee159e9d2a0fa7b4737c06e


[ROCm/clr commit: 3f0bcf7834]
2024-04-08 15:42:52 -04:00
Sourabh Betigeri 7cc5dd56ab SWDEV-451964 - Limit gpu single allocation percentage for gfx940 only
Change-Id: Iadcdadd734e7aeeb23742e426353defa972d3ad5


[ROCm/clr commit: dbac2976e4]
2024-04-05 09:43:42 -04:00
kjayapra-amd 0f8a9567e6 SWDEV-413997 - Save hsa_handle as ptr in hipMemCreate path.
Change-Id: Ica32017ef7b00326dfb6d1f604e126d40ad5b786


[ROCm/clr commit: 5cbd74b554]
2024-03-26 10:24:29 -04:00
Ioannis Assiouras b46d3c0f8d SWDEV-451166 - Disable kernel args for non-XGMI if HDP flush register is invalid
Change-Id: I227e046e2b9cb25476a50240f5d070adbd558f21


[ROCm/clr commit: 96f5c44851]
2024-03-15 05:27:52 -04:00
kjayapra-amd 8947420e41 SWDEV-423835 - Fixing kernel launch issues on Virtual Memory Management path.
Change-Id: I9f5e8a3d83af3809b2c50b21a10697e26113dd23


[ROCm/clr commit: f5ca620baa]
2024-03-12 17:22:07 -04:00
Saleel Kudchadker 4ff5ec0a02 SWDEV-301667 - Better log
- Print SWq for AQL packets, this helps correlating a stream to the HWq
mapped

Change-Id: I610430c0872a1abc6636027c00163ec46983cd65


[ROCm/clr commit: 984c86f407]
2024-03-01 16:43:06 -05:00
Ioannis Assiouras 80ddb8e4eb SWDEV-446399 - Fixed segfault in hipMemSetAccess
Change-Id: Ia1200d9bee03e8abade211287505f081e635ceec


[ROCm/clr commit: 1f6d416684]
2024-02-20 18:51:05 -05:00
kjayapra-amd bef39a9369 SWDEV-437832 - Changes to update host unified memory and iommuv2 flags.
Change-Id: I88998cf57c21fc446fa28e250f826c607923670b


[ROCm/clr commit: 7d5b4a8f7a]
2024-02-07 06:27:47 -05:00
Saleel Kudchadker 423887c6f6 SWDEV-301667 - Better log
Display queue base pointer in the log. This can be co-related with AQL
packets

Change-Id: I544f9b6db6ae01c85e57e4b3f0b3fffefcd7c2ed


[ROCm/clr commit: 0567c3b720]
2024-02-05 05:08:11 +00:00
kjayapra-amd 9bff044c87 SWDEV-437832 - Adding device property to check if the device is accelerator.
Change-Id: I8349e99c03422c268bbb60a8c143bd492d9cec09


[ROCm/clr commit: b366a7c992]
2024-02-05 05:08:11 +00:00
Satyanvesh Dittakavi d1901f2017 SWDEV-434846 - Limit the gpu single allocation percentage for all MI300 versions
Change-Id: I33dea3eaab249ce3f9a624d38267489f99cd530c


[ROCm/clr commit: 755eb2962c]
2024-01-03 23:47:44 -05:00
German Andryeyev 7130b87d5c SWDEV-436859 - Enable pitch for COPY_HOST_PTR
Original logic didn't use pitch because, abstraction layer had
a sysmem copy without pitch. Since extra sysmem copy was
disabled, the code has to accept pitch values from the app.

Change-Id: Ia9fba7b33ddff4e9109b4e63d0d6afa52f501c8f


[ROCm/clr commit: fb3dfcf889]
2023-12-13 16:50:16 -05:00
Satyanvesh Dittakavi 542044aadc SWDEV-434846 - Correct the vgprs per simd for MI300
Change-Id: Id4862da7611f64392bfc1538fb644801ec0a9e7f


[ROCm/clr commit: b2102fe939]
2023-12-13 03:06:21 -05:00
German Andryeyev e390ec044f SWDEV-432174 - Change the fillBuffer kernel
- Add the new fillBuffer kernel, which allows to launch a limited
number of workgroups for memory fill operation
- Switch fill memory to 16 bytes write by default
- Allow to limit the workgroups with DEBUG_CLR_LIMIT_BLIT_WG

Change-Id: Ibad1822f2d42b2fc71bcfc1917c31409c0623e8e


[ROCm/clr commit: f1dc81f427]
2023-11-16 14:25:55 -04:00
Jatin Chaudhary 2361cc0dab SWDEV-431399 - fix first set of memory leaks in clr, found in rtc tests
change constexpr variable names to match the C++ style we follow.

Change-Id: Ibc59a65d8ff2ca765da7bf5e653c0650fb3714c4


[ROCm/clr commit: ce27581465]
2023-11-14 20:39:45 -05:00
Saleel Kudchadker 85b95f0a45 SWDEV-301667 - Add error logging
Change-Id: I814399dc0e7083bb7fb0ed8bf46dd96bdf664965


[ROCm/clr commit: f06368fd04]
2023-11-10 11:55:54 -05:00
Alex Xie 4c860f41fd SWDEV-430062 - Support GPU_MAX_HEAP_SIZE flag in ROCm
Change-Id: Ibfe82b3524e09c61879b988f23512f394d725024


[ROCm/clr commit: 4fb9f03f9e]
2023-11-07 10:07:24 -05:00
German 005aebbfad SWDEV-429529 - Allocate glb_ctx_ even for one device
Move context allocation into Device::init() method to simplify the logic and handle
HIP_VISIBLE_DEVICES properly

Change-Id: I0fc6f37c7ae39bedbdad0290295d6794c66d6c54


[ROCm/clr commit: a49d633883]
2023-10-27 15:00:15 -04:00
Saleel Kudchadker cba9970220 SWDEV-408180 - Address possible cornercases
- Address corner cases that can arise with the new
hipMemcpyDeviceToDeviceNoCU enum
- Better log

Change-Id: I6035b901f8d616741054b7a5ff4f67956329ac57


[ROCm/clr commit: 5662d4037c]
2023-10-23 16:54:08 -04:00
kjayapra-amd 6d8458ba5a SWDEV-413997 - Initial VMM changes for ROCm path.
Change-Id: I4405fd7b53182eb4c4622835c811c0dc08461537


[ROCm/clr commit: 3ef829939a]
2023-10-16 11:29:16 -04:00
Jatin Chaudhary 15b062b9b4 SWDEV-306642 - [ABI Break] Add texture/surface/device capabilities device struct entries
- alias hipGetDeviceProperties to hipGetDevicePropertiesR0600
- alias hipDeviceProp_t to hipDeviceProp_tR0600
- remove gcnArch from new device property struct
- add new requested struct members

Change-Id: If3f5dbef3d608487d9f6f419285f4bf577ea9bf0


[ROCm/clr commit: 2989840511]
2023-10-12 11:16:18 -04:00
kjayapra-amd 96580585c3 SWDEV-419688 - Do not run GWS init kernel for targets > gfx12 and MI300.
Change-Id: I8e7441268978be71ab8a5a33e7f8bcf69660e500
(cherry picked from commit 36d37ef614909c0f215512aac0c133408d787080)


[ROCm/clr commit: 6a8bc3c718]
2023-10-05 14:57:56 -04:00
Julia Jiang 78ced05253 SWDEV-401314 - Fix failure on MI300 for progvar_prog_scope_misc basic test
Change-Id: I56701b050023199a3e56dc5a78553c0c330b8537


[ROCm/clr commit: 42799c9f21]
2023-09-14 11:32:25 -04:00
Saleel Kudchadker 28fa32a405 SWDEV-384557 - Reset mask at in the constructor
Change-Id: I15dafd281213c03590bcae4bf4544e33c4a7e277


[ROCm/clr commit: 8a538b5639]
2023-08-11 17:22:27 -04:00
Saleel Kudchadker 520b17fb07 SWDEV-384557 - Enable SDMA query
Change-Id: Ibb0a8d131f799985a4d4adbf753261e58c04157f


[ROCm/clr commit: aa6eb555e2]
2023-08-01 18:41:23 -04:00
Alex Xie a7418845f8 SWDEV-409299 - Vega clinfo is not working
Change-Id: Ia48bc6f130bd102dff210b105de6f9c02ebbe012


[ROCm/clr commit: 7912f3af89]
2023-07-10 09:53:50 -04:00
German b55398774b SWDEV-408650 - Report CL_DEVICE_HALF_FP_CONFIG query
If cl_khr_fp16 extension is enabled, then OCL runtime should report CL_DEVICE_HALF_FP_CONFIG.

Change-Id: I7c4ac48387f80bc704a475c57e5b52a462090d1b


[ROCm/clr commit: ad2c1e899a]
2023-07-06 11:58:16 -04:00
kjayapra-amd 03504e2f6c FEAT-47686 - Changes to support new uncached memory segment in ROCr.
Change-Id: I0ba8769d6737cdf1cc8a8644b2e82109f584a430


[ROCm/clr commit: aca7d9e14a]
2023-07-05 20:47:51 -04:00