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Συγγραφέας SHA1 Μήνυμα Ημερομηνία
Sang, Tao 45b75013ec SWDEV-516050 - Fix monitor hang in OCL (#75)
Fix monitor hang in cts integer_ops.
Improve notify().
Won't affect notifyAll() and Hip in direct
dispatch mode.

Change-Id: I95a458358e1cab9c76aefde117db09cdbd1fd3af

[ROCm/clr commit: 78f92901d8]
2025-04-23 14:34:53 -04:00
Xie, Jiabao(Jimbo) c7737558a4 SWDEV-441487 - add gfx1150/1 support to amd-staging clr (#182)
Co-authored-by: Jimbo Xie <jiabaxie@amd.com>

[ROCm/clr commit: 9a8c9e70b2]
2025-04-23 20:43:03 +05:30
Andryeyev, German f8344154a0 SWDEV-497841 - Enable memory manager by default (#149)
[ROCm/clr commit: a5c860f3b0]
2025-04-22 21:20:37 +05:30
Andryeyev, German 0569c7713c SWDEV-523300 - Add the new option to build HIP (#179)
Add the new cmake option AMD_COMPUTE_WIN  to build HIP on Windows
from the public github. AMD_COMPUTE_WIN should point to a special
repo with the PAL static libs

[ROCm/clr commit: a3effa16f1]
2025-04-22 21:05:04 +05:30
Godavarthy Surya, Anusha 41c4bea0f5 SWDEV-508538 - Optimize mem access and pack structure (#71)
Change-Id: Ib05b8891a6d228fc3266918a000d332fddc7438b

[ROCm/clr commit: bf28bbd9ab]
2025-04-21 13:43:25 +05:30
Ramirez, Lucas 0a45aa85c5 SWDEV-524612 - Consider "1" a truthy value for WGPMode (#187)
The compiler currently serializes the workgroup_processor_mode COMGR metadata boolean field as "0"/"1" instead of "false"/"true". Consider "1" a truthy value during parsing.

[ROCm/clr commit: d020598a0f]
2025-04-17 11:50:07 +02:00
Andryeyev, German a9df586812 SWDEV-459758 - Pass workgroup size explicitly (#185)
It's easier for compiler to move explicit kernel arguments into user SGPRs

[ROCm/clr commit: 3fd7650fe3]
2025-04-15 15:22:15 -04:00
Andryeyev, German db3c5f87ea SWDEV-526836 - Switch PAL backend to CmdReleaseThenAcquire() (#175)
[ROCm/clr commit: f6c804edc0]
2025-04-15 11:49:53 -04:00
Chaudhary, Jatin Jaikishan c72604a2af SWDEV-509213 - make cmake_minimum_required consistent across clr (#51)
Change-Id: Ib0b1df7af8984a37d6bf7ca68ec99597d5978821

[ROCm/clr commit: fcaefe97b8]
2025-04-15 15:23:41 +05:30
Chaudhary, Jatin Jaikishan e9e207d7b0 SWDEV-517941 - use device bitcode before spirv (#95)
Also add flag: HIP_FORCE_SPIRV_CODEOBJECT to allow override to force use
SPIRV.

* use cache for already compiled code objects

* address review comments and use the two spirv isa names

[ROCm/clr commit: 07e57a1f0d]
2025-04-14 23:40:52 +01:00
Six, Lancelot b389f97d73 SWDEV-517078 - Update 2nd level trap handlers (#148)
* SWDEV-517078 - Maintain the trap handler ABI version in CLR

The trap handler ABI version is communicated to the debugger using
the r_version field in the r_debug structure.  This structure is
an external dependency, which makes it complicated to keep the trap
handler source (in CRL) and the ABI version number (external dependency)
in sync.

This patch proposes to patch the trap handler ABI version number in
_amdgpu_r_debug before communicating it to the debugger.

We can't directly include sc's executable.hpp file in CRL as it relies
on conflicting definition of ELF related types, so instead we need to
rely on a-priori knowledge on the r_debug structure.  Fortunately, this
structure is part of a stable ABI, so its layout is guaranteed to be
kept stable.

Update the 2nd level trap handler to follow updates from the
ROCr-runtime.  The trap handlers are stripped from parts dedicated to
architectures unsupported by CLR.

Bump the r_debug.r_version to track the ABI changes in the trap handler.

[ROCm/clr commit: 7b72c1b786]
2025-04-11 18:59:54 +01:00
Yao, Longlong 6015dda120 SWDEV-518966 - Avoid creating Arena Memobj for VMM pointer (#39)
Change-Id: I69c6c0a1464d01e674ac929de34ab10047012f1a

Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>

[ROCm/clr commit: 0de73eeaf8]
2025-04-11 16:55:53 +05:30
Andryeyev, German c50f85df20 SWDEV-517481 - Add more restrictions to the queue management (#168)
[ROCm/clr commit: 4c363df3bf]
2025-04-10 21:51:45 +05:30
Andryeyev, German 90e3d2619a SWDEV-525725 - Enable resource cache for SVM (#156)
- Make sure reserved_va_ updated before svmPtr overwrite

[ROCm/clr commit: 94cd9bc4f7]
2025-04-10 10:54:28 -04:00
Stojiljkovic, Vladana 81a566e397 SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times (#93)
* SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times

* Move initialization outside of if statement

[ROCm/clr commit: e91cb4f320]
2025-04-10 11:20:36 +02:00
Sang, Tao 60a1e6dbc1 SWDEV-523824 - Fix data validation issue of rocFFT (#154)
Fix data validation issue of rocFFT when dynamic queue on.
ReleaseHwQueue() can be called only when no command in HostQueue.
The checking condition need be protected by lock.

[ROCm/clr commit: 18d191fd1d]
2025-04-08 20:30:06 -04:00
Patel, Jaydeepkumar 2f3bc7f01c SWDEV-521011 - Allow max stack size as per ISA. (#73)
[ROCm/clr commit: 9e7248aa36]
2025-04-08 10:15:38 +05:30
Andryeyev, German 4c9cc6ba30 SWDEV-497841 - Add VmHeapArray support (#76)
Add VmHeapArray class to reduce the pressure on VA reservation, since
multiple memory pools can be active at the same time.

[ROCm/clr commit: e974f7fde1]
2025-04-03 21:04:18 +05:30
Arandjelovic, Marko 1c83314659 SWDEV-517867 - Remove invalid assert (#55)
* Remove invalid assert

* Retrigger CI

* Rebase

[ROCm/clr commit: 8fcaa1ca93]
2025-04-03 11:14:32 +02:00
Patel, Jaydeepkumar b217d3a4e6 SWDEV-508632 - Align address to 2 MBs for hidden heap allocation. (#29)
[ROCm/clr commit: b5c9cbc236]
2025-04-02 16:33:29 +05:30
MartinezFernandez, Juan 966157cd5b Remove PCH code: the code related to PCH is dead and not used (#66)
cherry-pick of compute/ec/clr/+/1184122

Co-authored-by: Juan Manuel Martinez Caamaño <juamarti@amd.com>

[ROCm/clr commit: f580632174]
2025-03-28 10:36:19 +01:00
GunaShekar, Ajay aaba454bfc SWDEV-523853 - Use RecordRenderOps instead of RecordRenderOp (#97)
[ROCm/clr commit: 686dd56a4e]
2025-03-26 09:28:40 +05:30
Arandjelovic, Marko cc5124241b Revert SWDEV-512344 - Unmap all subbuffers (#26)
This reverts commit 0b69120cfcb5b4689d9f2037b1a01e274d85c20f.

[ROCm/clr commit: e7ada4effe]
2025-03-19 21:17:36 +05:30
Andryeyev, German 5c7c86f66d SWDEV-517481 - Add dynamic queue management (#37)
Enabled by defaulty. DEBUG_HIP_DYNAMIC_QUEUES controls the feature

[ROCm/clr commit: 28967982b2]
2025-03-19 11:22:50 -04:00
Andryeyev, German 00e77db856 SWDEV-497841 - Avoid access to the null stream on mempool alloc
Null stream isn't created during the device creation

[ROCm/clr commit: 392ed53c3c]
2025-03-17 11:40:14 -04:00
agunashe 4a5c6b8d82 SWDEV-513810 - APU: memory allocations threshold 0.75-->1
Needs further debugging but for now can test the change

Need to verify if this fixes all the below issues-
SWDEV-512754, SWDEV-511675, SWDEV-511055, SWDEV-504085, SWDEV-499503
Also verify original issues
SWDEV-471863, SWDEV-490991

Change-Id: Ic845f851de1b98e8ed9aa0f07afddec3858119e9


[ROCm/clr commit: f1b8ee7b7f]
2025-03-11 05:30:43 -04:00
Saleel Kudchadker c94c02a2e6 SWDEV-519596 - Avoid passing dep signal to SDMA
- For D2H cases avoid passing dependent signals to SDMA, the signals
  take a while to resolve on SDMA engine

Change-Id: I569635228af977847f201c82ca897002f8f2f4a8


[ROCm/clr commit: 78d0ff2dbc]
2025-03-07 17:37:21 -05:00
Pengda Xie 021ca96766 SWDEV-497619 - Ensure suballocSize is integer multiple of 4096
Change-Id: Iefc452d73566f58cfb63391a68c836f30d77dd6c


[ROCm/clr commit: b02b1858c0]
2025-03-07 15:36:57 -05:00
Branislav Brzak c81185cf26 SWDEV-516564 - SWDEV-512817 - Remove mentions of gfx940 and gfx941
Change-Id: Ia069fcb9c6948c3fc9a00961593c9dcc59609375


[ROCm/clr commit: c2d1776ebd]
2025-03-05 04:26:07 -05:00
Saleel Kudchadker c8f39ec2b0 SWDEV-502365 - Track last used command
- This change tries to save extra synchronization packets we may insert
  as we didnt track the completion signals for every command. We track
the current enqueued command until it exits the enqueue stage. We also
record the exit scope to know if we flushed the caches
- Handle correct release scopes and store completion signal as HW events
- Use a new finishCommand implementation to only wait for the command
  passed as the argument

Change-Id: Ie4350c5dd24f5d48dfa6ccbabd892f0544caadcc


[ROCm/clr commit: e03e4f3b5d]
2025-03-04 16:05:02 -05:00
German Andryeyev 77840f1cb9 SWDEV-518474 - Add comgr debug mask
Move prints from CO processing under COMGR debug mask.

Change-Id: I2a417e42a1f4e2922a34eb104c69e4db10b5f1c6


[ROCm/clr commit: cece301fd4]
2025-03-04 14:37:08 -05:00
Marko Arandjelovic 861491b824 SWDEV-512344 - Unmap all subbuffers
Since hipMemMap can be called for multiple device handles on the same virtual memory, the same is true for hipMemUnmap, meaning that virtual memory can be "partially unmapped".

This means that the unmap function can be called for a specific part of the reserved address, meaning that only the designated subbuffer should be released. If unmap is called on the entire reserved memory, then all subbuffers should be released.

The main point is that for every hsa_amd_vmem_map, there should be a corresponding hsa_amd_vmem_unmap. Otherwise, if entire memory is unmapped by a single unmap call, then HSA will report the memory as "in use" if an attempt is made to delete it.

Change-Id: I039308eafb820decfb1c09f60347f26cdad1a362


[ROCm/clr commit: 3ec1d2d2f1]
2025-03-02 13:41:48 -05:00
Saleel Kudchadker d0a7ae02cf SWDEV-513197 - Unify getBuffer implementation
- Use getBuffer/releaseBuffer in BlitManager
- Cleanup XferBuffer as we use ManagedBuffer for both reads/writes

Change-Id: I2661b85dd012763b17a38a743fec1b1d79125f67


[ROCm/clr commit: 37d606d193]
2025-02-28 12:47:51 -05:00
Saleel Kudchadker ef505c7cd8 SWDEV-513197 - Improve launch perf for Device Heap kernels
- If any kernel uses device heap, the launch needs to be preceeded by an
  init kernel, Save on the extra barrier packet launch/flush between the
init heap kernel and user kernel

Change-Id: I8ebc6246188200e5f673dc464bc76a53bcb8b7c6


[ROCm/clr commit: ca530c660b]
2025-02-27 19:17:51 -05:00
Rahul Manocha 90337103ac SWDEV-510849 - Restore pinned memory copy path
1) Create getBuffer method to return pinned host memory or staging buffer
2) for D2H path use managed buffer instead of static buffer
3) use staging buffer copy for 16KB < size < 1MB
4) use pinned memory copy for size > 1MB

Change-Id: I13d4d6ab60691bc6c7724239db1e11e23f0f3dc2


[ROCm/clr commit: 4bf634dfca]
2025-02-26 11:25:02 -05:00
Jacob Lambert 7da5718afb SWDEV-360440 - Prepare CLR dynamic Comgr load for V3
Change-Id: Iffd835056740ff10711468cc752b7b55078b9f8f


[ROCm/clr commit: 187648429b]
2025-02-26 11:22:18 -05:00
Julia Jiang 1495cc77eb SWDEV-513294 - fix regression on SVM sub-test failure in Conformance
Change-Id: Ic2449dd34a9cd2b623d5f8fbe89fd042566a56e3


[ROCm/clr commit: b7eaec76fc]
2025-02-20 15:40:23 -05:00
kjayapra-amd 010253430f SWDEV-516303 - Remove SDMA retainer logic to select the engine.
Change-Id: I818129444131825cdb87e06cb495afa3e5cdb683


[ROCm/clr commit: 1f583a6870]
2025-02-20 11:34:38 -05:00
German Andryeyev a7f3ad7867 SWDEV-515356 - Make the round-robin queue selection
- Add custom compare to the map of queues, which will help with
 the round-robin selection

Change-Id: Ie67a820bfb1a5b484a1b3edced967eed94228bb8


[ROCm/clr commit: ba8e740be4]
2025-02-20 11:09:54 -05:00
German Andryeyev f9d9b2c441 SWDEV-497841 - Add virtual memory heap
Add initial implementation of virtual memory heap with
dynamic virtual memory mapping support for memory pools.
DEBUG_HIP_MEM_POOL_VMHEAP controls the new method.

Change-Id: I8dc5be2e0f34ab472f1800f43bb6243639a5e500


[ROCm/clr commit: 296dce5570]
2025-02-20 10:55:49 -05:00
German Andryeyev 6f2a603277 SWDEV-497619 - Allocate extra space in CB
Compute doesn't support IB chaining, but RGP may collect
perf counters, which require more space in CB.
Increase CB size if RGP is enabled.

Change-Id: Iaa0a620ead8541a679b0dfe5e5711af5afdba545


[ROCm/clr commit: 63cf3057ba]
2025-02-20 10:40:09 -05:00
Tim Gu 8fcbc2acfe SWDEV-502248 - Parse file path with space characters
Signed-off-by: Tim Gu <Tim.Gu@amd.com>
Change-Id: I67fb9cf5559c9c06f24627a1b25fec3e89b2d1cf


[ROCm/clr commit: 84a867fb73]
2025-02-18 10:31:21 -05:00
agunashe 52a1f5dbf7 SWDEV-507967 - Deprecate gfx9, gfx8, gfx7 on Windows
PAL_CLIENT_INTERFACE_MAJOR_VERSION from 872 --> 910

Change-Id: I03dfa2924ccdae4c2f13f09d5f34ee58298e1343


[ROCm/clr commit: ea804e16f8]
2025-02-17 02:59:41 -05:00
Vladana Stojiljkovic 7078aab436 SWDEV-510059 - Format CU mask properly
Change-Id: I80e94b4f3ea25f6988fc06d83aeb398e81ccddd1


[ROCm/clr commit: 061c5d877f]
2025-02-13 11:02:56 -05:00
Aidan Belton-Schure 4b4a35b86b SWDEV-508279 - Improve HIP event profiling
There are 2 functional changes to this patch:
* Use GPU timing for internal markers for HIP.
* Measure CPU time closer to GPU timer, to reduce delta between GPU/CPU timestamp measurements.

There are some smaller non-functional updates:
* waifForFence -> waitForFence typo
* Remove unused drmProfiling

Change-Id: I4c5fa600a842ab60e454888779edcac8449a902a


[ROCm/clr commit: 179801a750]
2025-02-13 04:15:40 -05:00
kjayapra-amd 1f648c7d94 SWDEV-511672 - Special case the Remote USWC memory usage for HIP, if the alloc size is large.
Change-Id: I524c1402b249cedfd58b56f494caa2ac057e1623


[ROCm/clr commit: cf6aabb823]
2025-02-11 06:42:18 -05:00
Saleel Kudchadker 71e1a0b10d SWDEV-504494 - Further copy improvements
- Fix regression for D2H pinned copies which adds systemscope release.
- Skip cpu wait for D2H unpinned copies as we can pass the signal of the
  barrier to rocr copy.
- Fix an old bug in sdmaEngineRetainCount_ logic
- Improve logging

Change-Id: If074bddb05564b15949b0d5f9bf12acd3692174e


[ROCm/clr commit: 4c95ee5e1e]
2025-02-11 00:55:52 -05:00
victzhan 7cd780c1cb SWDEV-485042 - Remove -I option passed into comgr when file type is not FILE_TYPE_ASM_TEXT
Change-Id: If8e469f881651f7b3dae364e8182ef1ba6f3a0d1


[ROCm/clr commit: ca35d93672]
2025-02-10 11:47:04 -05:00
Ioannis Assiouras 6a00aa8d61 SWDEV-508435 - Added a fix for double free of hsaImageObject
Change-Id: I9397f7c9dbbad7c249b359155df312cb920eba6c


[ROCm/clr commit: d05ecea253]
2025-02-05 22:21:24 +00:00
Ioannis Assiouras c0b728fcad SWDEV-513323 - Fix for BatchMemOp on devices with no image support
BatchMemop should be positioned before the image support kernels
because the total number of kernels is determined by BlitLinearTotal,
when there is no image support on the device.

Change-Id: I8e53caf744ba54259ac04bad1762eef21806f3f2


[ROCm/clr commit: 3e01da3dac]
2025-02-05 04:45:22 -05:00