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Xie, Jiabao(Jimbo)ésJimbo Xie c7737558a4 SWDEV-441487 - add gfx1150/1 support to amd-staging clr (#182)
Co-authored-by: Jimbo Xie <jiabaxie@amd.com>

[ROCm/clr commit: 9a8c9e70b2]
2025-04-23 20:43:03 +05:30
Andryeyev, German a9df586812 SWDEV-459758 - Pass workgroup size explicitly (#185)
It's easier for compiler to move explicit kernel arguments into user SGPRs

[ROCm/clr commit: 3fd7650fe3]
2025-04-15 15:22:15 -04:00
Andryeyev, German db3c5f87ea SWDEV-526836 - Switch PAL backend to CmdReleaseThenAcquire() (#175)
[ROCm/clr commit: f6c804edc0]
2025-04-15 11:49:53 -04:00
Six, Lancelot b389f97d73 SWDEV-517078 - Update 2nd level trap handlers (#148)
* SWDEV-517078 - Maintain the trap handler ABI version in CLR

The trap handler ABI version is communicated to the debugger using
the r_version field in the r_debug structure.  This structure is
an external dependency, which makes it complicated to keep the trap
handler source (in CRL) and the ABI version number (external dependency)
in sync.

This patch proposes to patch the trap handler ABI version number in
_amdgpu_r_debug before communicating it to the debugger.

We can't directly include sc's executable.hpp file in CRL as it relies
on conflicting definition of ELF related types, so instead we need to
rely on a-priori knowledge on the r_debug structure.  Fortunately, this
structure is part of a stable ABI, so its layout is guaranteed to be
kept stable.

Update the 2nd level trap handler to follow updates from the
ROCr-runtime.  The trap handlers are stripped from parts dedicated to
architectures unsupported by CLR.

Bump the r_debug.r_version to track the ABI changes in the trap handler.

[ROCm/clr commit: 7b72c1b786]
2025-04-11 18:59:54 +01:00
Andryeyev, German 90e3d2619a SWDEV-525725 - Enable resource cache for SVM (#156)
- Make sure reserved_va_ updated before svmPtr overwrite

[ROCm/clr commit: 94cd9bc4f7]
2025-04-10 10:54:28 -04:00
Patel, Jaydeepkumar 2f3bc7f01c SWDEV-521011 - Allow max stack size as per ISA. (#73)
[ROCm/clr commit: 9e7248aa36]
2025-04-08 10:15:38 +05:30
Andryeyev, German 4c9cc6ba30 SWDEV-497841 - Add VmHeapArray support (#76)
Add VmHeapArray class to reduce the pressure on VA reservation, since
multiple memory pools can be active at the same time.

[ROCm/clr commit: e974f7fde1]
2025-04-03 21:04:18 +05:30
Patel, Jaydeepkumar b217d3a4e6 SWDEV-508632 - Align address to 2 MBs for hidden heap allocation. (#29)
[ROCm/clr commit: b5c9cbc236]
2025-04-02 16:33:29 +05:30
GunaShekar, Ajay aaba454bfc SWDEV-523853 - Use RecordRenderOps instead of RecordRenderOp (#97)
[ROCm/clr commit: 686dd56a4e]
2025-03-26 09:28:40 +05:30
agunashe 4a5c6b8d82 SWDEV-513810 - APU: memory allocations threshold 0.75-->1
Needs further debugging but for now can test the change

Need to verify if this fixes all the below issues-
SWDEV-512754, SWDEV-511675, SWDEV-511055, SWDEV-504085, SWDEV-499503
Also verify original issues
SWDEV-471863, SWDEV-490991

Change-Id: Ic845f851de1b98e8ed9aa0f07afddec3858119e9


[ROCm/clr commit: f1b8ee7b7f]
2025-03-11 05:30:43 -04:00
Pengda Xie 021ca96766 SWDEV-497619 - Ensure suballocSize is integer multiple of 4096
Change-Id: Iefc452d73566f58cfb63391a68c836f30d77dd6c


[ROCm/clr commit: b02b1858c0]
2025-03-07 15:36:57 -05:00
Branislav Brzak c81185cf26 SWDEV-516564 - SWDEV-512817 - Remove mentions of gfx940 and gfx941
Change-Id: Ia069fcb9c6948c3fc9a00961593c9dcc59609375


[ROCm/clr commit: c2d1776ebd]
2025-03-05 04:26:07 -05:00
Julia Jiang 1495cc77eb SWDEV-513294 - fix regression on SVM sub-test failure in Conformance
Change-Id: Ic2449dd34a9cd2b623d5f8fbe89fd042566a56e3


[ROCm/clr commit: b7eaec76fc]
2025-02-20 15:40:23 -05:00
German Andryeyev f9d9b2c441 SWDEV-497841 - Add virtual memory heap
Add initial implementation of virtual memory heap with
dynamic virtual memory mapping support for memory pools.
DEBUG_HIP_MEM_POOL_VMHEAP controls the new method.

Change-Id: I8dc5be2e0f34ab472f1800f43bb6243639a5e500


[ROCm/clr commit: 296dce5570]
2025-02-20 10:55:49 -05:00
German Andryeyev 6f2a603277 SWDEV-497619 - Allocate extra space in CB
Compute doesn't support IB chaining, but RGP may collect
perf counters, which require more space in CB.
Increase CB size if RGP is enabled.

Change-Id: Iaa0a620ead8541a679b0dfe5e5711af5afdba545


[ROCm/clr commit: 63cf3057ba]
2025-02-20 10:40:09 -05:00
agunashe 52a1f5dbf7 SWDEV-507967 - Deprecate gfx9, gfx8, gfx7 on Windows
PAL_CLIENT_INTERFACE_MAJOR_VERSION from 872 --> 910

Change-Id: I03dfa2924ccdae4c2f13f09d5f34ee58298e1343


[ROCm/clr commit: ea804e16f8]
2025-02-17 02:59:41 -05:00
Aidan Belton-Schure 4b4a35b86b SWDEV-508279 - Improve HIP event profiling
There are 2 functional changes to this patch:
* Use GPU timing for internal markers for HIP.
* Measure CPU time closer to GPU timer, to reduce delta between GPU/CPU timestamp measurements.

There are some smaller non-functional updates:
* waifForFence -> waitForFence typo
* Remove unused drmProfiling

Change-Id: I4c5fa600a842ab60e454888779edcac8449a902a


[ROCm/clr commit: 179801a750]
2025-02-13 04:15:40 -05:00
kjayapra-amd 1f648c7d94 SWDEV-511672 - Special case the Remote USWC memory usage for HIP, if the alloc size is large.
Change-Id: I524c1402b249cedfd58b56f494caa2ac057e1623


[ROCm/clr commit: cf6aabb823]
2025-02-11 06:42:18 -05:00
taosang2 40df900647 SWDEV-501963 - Add missing codes for gfx950
Cherry-pick https://gerrit-git.amd.com/c/compute/ec/clr/+/1162997

Change-Id: I6b3c6bf55c61cffd43cd6f17b75998f751b75723


[ROCm/clr commit: 32daa8f384]
2025-01-31 14:34:49 -05:00
Aidan Belton-Schure dc2fa93f37 SWDEV-482851 - Do not release last suballocator chunk
Change-Id: Ib28dc9df68e454ee0c0c699c1ff17588fd55f802


[ROCm/clr commit: 451b0ce768]
2025-01-13 10:14:40 -05:00
Daniel Livingston 50387f6eb5 SWDEV-489003 - [Ubertrace] OCL/HIP profiles are missing event instrumentation
Adds UberTrace support for pre-dispatch markers and barrier begin/end markers.

Moves shared definitions out of palgpuopen.hpp into shared header
palcapturemgr.hpp.

Change-Id: I9f464c689e7ff12c54eca043fc1ad65e1836a64f


[ROCm/clr commit: 541c449ce2]
2025-01-10 11:28:52 -05:00
Jatin Jaikishan Chaudhary 8b1d0cff83 Revert "SWDEV-505971 - change setArgument arg from uint32_t to uint64_t"
This reverts commit 0830d95f6d.

Reason for revert: There needs to be memcpy size change

Change-Id: If4f51769731e54743ac705b19b4f81b2d5925d5a


[ROCm/clr commit: 446ed661a0]
2025-01-06 18:03:23 -05:00
Jatin Chaudhary 0830d95f6d SWDEV-505971 - change setArgument arg from uint32_t to uint64_t
We are passing this arg as an address, and memcpy complains about
overreading (8 bytes instead of 4).

Change-Id: Ica9207f6c5f6056a4bfc968280c76e779ded13ae


[ROCm/clr commit: a6f2a2c2af]
2025-01-06 08:16:59 -05:00
taosang2 da613fbbeb SWDEV-479958 - Support different address mode
Support different address modes in X, Y, Z directions

Change-Id: If1db5a8af33c92dd14b48968c3e8eceb97daea6c


[ROCm/clr commit: d82d6a78cf]
2024-12-23 16:39:54 -05:00
Sourabh Betigeri 7261404002 SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I5ac63a6626af8c2b4ac382c52dfe1aaf0b3716b8


[ROCm/clr commit: 03dbcd8ca7]
2024-12-12 19:29:24 -05:00
Gerardo Hernandez d96c631de0 SWDEV-496392 - Remove references to ASIC Polaris22 in pal::Settings and pal::Device (it is being retired)
Change-Id: I6318abf3e46ed250d087a3d2266d2ae3d4c8c000


[ROCm/clr commit: 03e4057fce]
2024-12-10 06:01:32 -05:00
Ajay 7346f3bd29 SWDEV-498474 - APU: when total allocated is greater than 75% of invisible
Only when memory type is Local and the invisible memory is +ve
Should also fix SWDEV-490991

Change-Id: I78a4925a234ba90c63909bde5b7dc217568b4de3


[ROCm/clr commit: 7d763fb803]
2024-12-09 12:06:57 -05:00
Sourabh Betigeri 1712acdd2e Revert "SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs"
This reverts commit ab0ff9163d.

Reason for revert: hipInfo fails on windows. Updating llvm amd-mainline-closed

Change-Id: I57e1fa1945188b0bc0a799c4f3d540f2b7713003


[ROCm/clr commit: 2ca644cf22]
2024-12-02 16:46:12 -05:00
Sourabh Betigeri ab0ff9163d SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I449ffca44bbb04d13348d112e896d603c70fd485


[ROCm/clr commit: bd5d8e9baf]
2024-11-30 17:54:32 -05:00
Anusha GodavarthySurya c34f55babb SWDEV-489084 - Avoid using queue colliding with the graph launch stream
Change-Id: I3ecaf8836c8e0883441275139041c702aba0937e


[ROCm/clr commit: 06e6561eb5]
2024-11-29 08:15:58 -05:00
Ioannis Assiouras a22553fb33 SWDEV-494409 - Fixed segfault caused by aligned_free called on unaligned memory
Change-Id: I8ddea5c309b568db25c92789bf71be341d19c3ba


[ROCm/clr commit: 2cc9f59774]
2024-11-22 03:08:04 +00:00
Jaydeep Patel 0f77eeaace SWDEV-491149 - OCL does not need to update scratch as it can't update stack size using API unlike hipDeviceSetLimit.
for HIP, Update should be only if compiler notifies use of stack size.

Change-Id: Ic781bcac6fcf586da39ec4aafd4809da3652ede3


[ROCm/clr commit: 4aa52155ee]
2024-11-01 01:05:07 -04:00
Alex Xie e751f00ca2 SWDEV-489468 - make resource cache bigger for APU
Change-Id: I065c712acd06c273a0b194fe792ec4f876fa9c46


[ROCm/clr commit: f8c56f6bac]
2024-10-31 09:55:01 -04:00
Tao Sang 2cce18fb38 SWDEV-492563 - Fix Ocl issues
1. Fix LDSSize type to be uint32_t.
2. Prevent clWaitForEvents running on complete events whose
   HostQueue have been destructed.

Change-Id: I829e915f56b37db2ba76bb876c9656166534f154


[ROCm/clr commit: 82dff9a67d]
2024-10-30 19:15:59 -04:00
Anusha GodavarthySurya 2dccb30f6f SWDEV-485904 - propagate hsa_amd_vmem_address_free error to hip API
Unit_hipMemSetAccess_GrowVMM test fails with
HSA_STATUS_ERROR_RESOURCE_FREE silently

Change-Id: I7a78410e432de4a2e877062782abf8761645f392


[ROCm/clr commit: b498103f9b]
2024-10-21 10:12:32 -04:00
German Andryeyev faea40cbb3 SWDEV-486602 - Optimize HSA callback performance
- Don't generate callbacks for HIP events
- Don't process profiling info in the callback for HIP events
- Wait for CPU status update of the submitted commands
every 50 calls. That will allow to drain the commands and
destroy HSA signals.

Change-Id: Ib601a350e7e7c2b6c6209a172385389baccf73a9


[ROCm/clr commit: 364dfb0ed1]
2024-10-11 14:50:25 -04:00
Todd tiantuo Li 170e45b879 SWDEV-472357 - support Rect copy with staging buffer for 2D & 3D memcpy in PAL
Change-Id: Ie32f3e5a6fa077f6b2db20fc1ab1e2e0da8344cb


[ROCm/clr commit: 41dc4545fc]
2024-10-10 18:00:19 -04:00
Jaydeep Patel 91b343c758 SWDEV-471422 - Free memory being double deducted on APUs due to system_total_alloced var holds local memory.
Change-Id: I3fbbc8f8aaa156881ff95cad6a4f82fd3df651d1


[ROCm/clr commit: 292842ad28]
2024-10-04 04:49:20 -04:00
Rahul Manocha 9f10e89d97 SWDEV-487903 - Fix for Empty Kernel Segfault in PAL
Change-Id: Ia1c19cf4ea24188cdb2d374b07f975f794e02dba


[ROCm/clr commit: 9da90fe848]
2024-09-30 13:00:15 -04:00
Ajay 98a1b3b42a SWDEV-486816 - RenderOpDispatch usage in pal client
Change-Id: I11cae3e625b287b998c9500c547efdacf1034a2b


[ROCm/clr commit: 7a288ea8bf]
2024-09-24 14:28:16 -04:00
German Andryeyev f8fc11c2d8 SWDEV-483586 - Unblock staging H2D transfers
Although unpinned copies require synchronizations
in HIP, runtime can avoid syncs for H2D copies with
a staging buffer

Change-Id: If2203c6bc0cbd89742823688dc8e89e9acd873b2


[ROCm/clr commit: 29cc678d8d]
2024-09-21 10:25:27 -04:00
kjayapra-amd f19260d568 SWDEV-480772 - Remove name variable from amd::Monitor class.
Change-Id: Ie2a4fa44f485786227230f8a892e090e718aa30e


[ROCm/clr commit: 12a39fbf22]
2024-09-19 11:55:01 -04:00
Daniel Livingston 7c0ff614a2 SWDEV-77148 - Add UberTrace support to PAL device
This PR adds UberTrace-based tracing support to ROCclr's PAL device class.
Legacy RGP-based tracing is still available and is the default.
If UberTrace support is enabled tool-side, this new code path will activate.

Change-Id: I268b2dcef70e850a50e2caef8355f38bf51d4641


[ROCm/clr commit: e550032d25]
2024-09-17 16:06:37 -04:00
Ajay d7f4f778b3 SWDEV-465215 - hipFuncSetAttribute hipFuncGetAttributes fixes
Change-Id: I2151e4470d63918ff6b809a8fdeaae5bea5cc899


[ROCm/clr commit: c9955a1cea]
2024-09-13 14:05:25 -04:00
Ajay 2a79ff2bca SWDEV-471863 - avoid copy of invisibleHeap
Change-Id: Ieb0aa22ac6d0d01cb9ca7fbf1305df03a1ab3cdf


[ROCm/clr commit: 5a810f789a]
2024-09-11 13:24:31 -04:00
Jaydeep Patel 7fa7a7cae5 SWDEV-475938 - Update dynamic stack in submit kernel internal.
Change-Id: I816bf9cfe8aaac5486ff3b719dbdc4f4d6134e01


[ROCm/clr commit: 9c90bc43a5]
2024-09-11 00:59:45 -04:00
kjayapra-amd eecbcddaf3 SWDEV-439234 - Access check before memcpy and kernel operations.
Change-Id: I7057125c03460db205409e19980145298c190fe2


[ROCm/clr commit: 6211037f63]
2024-09-06 14:30:00 -04:00
kjayapra-amd afd72f9ad0 SWDEV-478099 - Fix multiple mapping case on PAL/Windows backend.
Change-Id: Id1fe7939fbf90649cda1848890b3b4ca9a1fcd00


[ROCm/clr commit: 2a9cb89228]
2024-08-27 11:19:39 -04:00
Rahul Manocha 1b14058283 SWDEV-474617 SWDEV-464679 - Fix segfault in palvirtual due to peer memory access
Change-Id: Ib8b641712d78acf8bc073ca5705dea97af6f944a


[ROCm/clr commit: 432bdd7bf2]
2024-08-21 11:34:15 -04:00
Ajay 3d22e51806 SWDEV-471863 - APU: device allocation greater than invisible memory
Change-Id: I37f1769873ac7dcbb3cfa51fd815ee1e2123aeae


[ROCm/clr commit: ec0971dd08]
2024-08-09 14:29:18 -04:00