Query family id info from drm render node, then
ROCr can query this info directly from Thunk
instead of parsing the info by itself.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: I030bd27ab2379fbf87f3d787302c3b8613456278
To improve performance on queue preemption, allocate ctx s/r
area in VRAM instead of system memory, and migrate it back
to system memory when VRAM is full.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: If775782027188dbe84b6868260e429373675434c
System Management Interface event is read from anonymous file handle,
this helper wrap the ioctl interface to get anonymous file handle for
GPU nodeid.
Define SMI event IDs, event triggers, copy the same value from
kfd_ioctl.h to avoid translation.
Change-Id: I5c8ba5301473bb3b80bb4e2aa33a9f675bedb001
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Add KFDGpuID to HsaNodeProperties to return gpu_id to upper layer,
gpu_id is hash ID generated by KFD to distinguish GPUs on the system.
ROCr and ROCProfiler will use gpu_id to analyze SMI event message.
Change-Id: I6eabe6849230e04120674f5bc55e6ea254a532d6
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
We need to add some more information about the debug features supported
by the platform. We are adding the following:
- debug supported
- dispatch info always valid
- precise memop supported
- watchpoints shared
Change-Id: I68deed98619396d17e28c6e18bad424b58297485
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
Query pointer info return HsaPointerInfo with MemFlags for all pointer
type now.
Change-Id: I3c02b7b71ba0af953035e3ed9cd6bb6435bb9b65
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Update hsaKmtCreateQueue to initialize the new save area header with the
exception payload and event ID.
Signed-by-off: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Reviewed-by: Sean Keely <sean.keely@amd.com>
Change-Id: Icd38062dc982cb29b30644699014eeb0b3e26d00
CoherentHostAccess flag member moved from HSA_MEMORYPROPERTY
to HSA_CAPABILITY struct. Now this is reported to the
topology as a capability of the device instead of a device
memory property.
Change-Id: I48e43e4b4a0635b711b62933734587facdfbf88b
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
New properties SVMAPISupported added in Thunk spec HSA_CAPABILITY, read
from sysfs from KFD topology.
New local memory property flag CoherentHostAccess added to Thunk
HSA_MEMORYPROPERTY, read from sysfs from KFD topology.
Change-Id: I83933f0e5a61508508168873209dba4af0b77295
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Add function definitions to support SVM (shared virtual memory)
and xnack set.
Change-Id: Ia97ad9d0c449d8d500d799f702e1a58e87d65a56
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
The old bit was deprecated, because old buggy user mode depends on it
being always 0. The correct value is now reported in a new bit. New user
mode handles the reported EDC setting correctly, so we can report the
correct value in a new bit.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ib5d5ed2519810e650458c6b69c97670dab435ddb
This reverts commit a352639df5.
SVM is not ready yet. This was merged by accident.
Change-Id: I1bee102823e7e612be8e8f2e0f50580e8692cc80
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reserve some space in the context save area for the debugger's
use. There should be 32 bytes per wave for a given queue.
Change-Id: I65ddb6123d0f6afd3149844617ad19023009101d
Add function definitions to support SVM (shared virtual memory)
and xnack set.
Change-Id: Ia97ad9d0c449d8d500d799f702e1a58e87d65a56
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
It is to provide an option to map specific memory as
uncached on A+A HW platform.
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Change-Id: Ib665cb306a0e78aba3ea5ee2f0e46cb62ae139f8
Reserve some space in the context save area for the debugger's
use. There should be 32 bytes per wave for a given queue.
Change-Id: I65ddb6123d0f6afd3149844617ad19023009101d
KFD now passes the ASIC revision to user level through some bits
in the HSA topology's capability field. Some user-level software
wants this because different ASIC revisions may require user-level
software to do different things (e.g. patch code for things that
are changed in later hardware revisions).
Change-Id: I16f2a15ae0875edd01ebdb1f1685ec7865f7049e
Read device unique id from sysfs and expose it in HsaNodeProperties.
For devices not supported the value will be 0
Signed-off-by: Divya Shikre <DivyaUday.Shikre@amd.com>
Change-Id: I97b8689dfa090971c6876de6feaa97652e28c03d
IPC memory was previously returned as HSA_POINTER_ALLOCATED and
had garbage in the node_id field. Due to ROCR_VISIBLE_DEVICES
we need to be able to distinguish between imported memory and
regular memory because imported memory may not be owned by an
agent that is visible in the process. Differentiating these flags
allows the users to expect null agent for the owning agent.
Fixes
Change-Id: Ide3489cec1ee2072dc9697fa5cb71ddb17999d14
NumCpQueues and NumSdmaQueuesPerEngine should be got by kfd driver not hardcode.
So add two data fields in HsaNodeProperties then thunk is able to get it from sysfs
that exposed by kfd.
v2: change NumCpQueues/NumSdmaQueuesPerEngine to one byte.
v3: merge two commits as one to avoid ABI update two times.
Change-Id: Ie386e4685f13493e22db6e207a399db6a4c5b9dc
Signed-off-by: Huang Rui <ray.huang@amd.com>
on NUMA system, node 0 may have no memory, application pass node id
0 to hsaKmtAllocMemory will fail because mbind to specify the allocation
from node 0 return EINVAL.
Add new flag NoNUMABind for application to pass it to hsaKmtAllocMemory
to skip mbind.
hsaKmtCreateEvent and hsaKmtCreateQueue specify the new flag NoNUMABind
to allocate system memory for event page and CWSR area, don't bind the
system memory to a specific NUMA node.
Change-Id: I854e5a57502c7807c4c5ff2e441d499ae515c309
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
PCI domain has moved to 32-bits to accommodate virtualization,
so a 32-bit integer is exposed for domain to reflect this change.
Change-Id: I0d767acadcdc8e4277db203b5865dd67dd001cef
Signed-off-by: Ori Messinger <ori.messinger@amd.com>
Add data out for enable trap to return poll fd to user space.
Add query debug events interface.
Change-Id: Ia4afde1cf167e6aa61d502380a8b329ee89d5f44
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
This is updating to the new suspend and resume API for the
KFD and the thunk. We now support passing in a list of queues
to suspend, and not just all of the queues for the process.
The kfdtest testcase was also updated so it still compiles.
Change-Id: I71d1b178476bd9df0c311bdedaa6a891528cebcf
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
hsaKmtGetQueueInfo needs to return the control stack size, and the
wave state size for the debugger. These changes are needed to support
returning the new values.
Change-Id: Ib4c60e0ea34446c06aef4a86996250989f348a69
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
Add a MMIO_REMAP heap type and expose mmio virtual address
through HsaKmtGetNodeMemoryProperties
Change-Id: I1e585e6dfbec8fa7c85f1dda7b89b763a8e2c439
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Add SDMA engine info fields to node properties and
modify get node properties API to read SDMA engine
info from sysfs
Change-Id: Iea877b5bc008cc9df9405daf564a359535f1bc9f
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
RAS feature enabling bit and errors return are implemented in
existed topology and event mechanism.
v2: change library interface.
Change-Id: I75807c080b5b26e8115240b05b3d7016cb05a31a
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
RAS feature enabling bit and errors return are implemented in
existed topology and event mechanism.
Change-Id: I9b018bba80cf4a6998e42a7bff64318c689b1d2a
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Those new types are used to create SDMA queue on specific engine
Change-Id: I91c3bcc14fef7404cf42b256a18651432e171091
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Move debug trap support capabilities to their own
structure to fix thunk spec vs header mismatch.
Change-Id: I6694601bfa36097502c8ab932e082d7a4645d5b2
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
Add XGMI related defines in thunk according to the document
HSAKMT library interface specification v1.16
Change-Id: Ib25ff0ddf7380c97d06bd76fb730915e7c634270
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Add initial support for the kfd debugger trap support
for GFX9 chips.
- Adding support for Enable/Disable trap support
- Setting debug trap support data
- Setting wave launch trap override
- Setting wave launch mode
Change-Id: If39f2395c4b6cf56249cf76f1c44cfcbdcef891c
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
Previously kfd device is used to map memory for CPU access.
However this is not compatible with how TTM handles CPU mapping
on eviction - memory won't be unmapped and remapped on restore.
This fixes the issue by mmapping memory using DRM render device.
This patch requires a coordinated kernel driver change to work.
To make it compatible with old kernel driver, some temporary codes
are included. Once the coordinated kernel driver is checked in,
the temporary codes can be removed.
Change-Id: Ie7b304c4a82b7e8d5ab703acb81d66430af4f0bc
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
For items in HsaQueueInfo, control stack information comes from KFD, CU
mask information is maintained in Thunk, and others (queue detail error
and queue type extended) are ignored (value = 0) at this point.
Change-Id: Ib21370b0f52b2bb4ebe6a9b4b6ec6139cccb25ca
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
HSA Thunk Spec was updated to include more non-privileged blocks for
profiling. This patch adds those newly added non-privileged blocks for
gfx70x.
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Change-Id: Id745ac236c871e8e61a128a2460784f9c9c354b6
Implement two new API for cross memory read and write operation.
- hsaKmtProcessVMRead
- hsaKmtProcessVMWrite
Add new ioclts necessary for the above APIs.
Change-Id: I0c153e3b4e1f32b7a8b102ad5c774d9ae9bfc2fa
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Lang Yu
Eric Huang
Philip Yang
Philip Cox
Jonathan Kim
Alex Sierra
Mike Li
Felix Kuehling
Kent Russell
Laurent Morichetti
Ramesh Errabolu
Joseph Greathouse
Divya Shikre
Sean Keely
Huang Rui
Ori Messinger
Oak Zeng
Gang Ba
Shaoyun Liu
Amber Lin
Harish Kasiviswanathan