Граф коммитов

68454 Коммитов

Автор SHA1 Сообщение Дата
cfallows-amd c45e20f325 Fixes for roofline datatype plot outputs (#659)
Profile mode:
Fix roofline plots for datatypes that have peakVALU only. Check for highest roofline to plot the bandwidth lines to proper height, don't rely on existence of peakMFMA for every datatype.
Analyze mode:
Add roofline-data-type option for viewing pdfs in standalone gui. Default is same as profile mode, FP32.

---------

Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com>
2025-04-07 12:10:37 -04:00
Choudhary, Rahul 5b4c717208 Update workflow to use mainline branch 2025-04-07 09:36:52 -04:00
Choudhary, Rahul 480ca4d5e7 Update workflow to use mainline branch
[ROCm/ROCR-Runtime commit: 5b4c717208]
2025-04-07 09:36:52 -04:00
Choudhary, Rahul a0b80c825c Update rocm_ci_caller.yml updating push trigger to amd-mainline
Signed-off-by: Choudhary, Rahul <Rahul.Choudhary@amd.com>
2025-04-07 09:36:52 -04:00
Choudhary, Rahul d605e9256c Update rocm_ci_caller.yml updating push trigger to amd-mainline
Signed-off-by: Choudhary, Rahul <Rahul.Choudhary@amd.com>

[ROCm/ROCR-Runtime commit: a0b80c825c]
2025-04-07 09:36:52 -04:00
Betigeri, Sourabh e3e31f1486 SWDEV-523281 - Adds hipLaunchKernelEx C++ wrapper (#44)
[ROCm/hip commit: 3998c11287]
2025-04-07 09:24:01 +05:30
Betigeri, Sourabh 3998c11287 SWDEV-523281 - Adds hipLaunchKernelEx C++ wrapper (#44) 2025-04-07 09:24:01 +05:30
Pham, Gabriel e2c371ece4 [SWDEV-524288] Fixed duplication of GPU id in events. (#233)
* Fixed duplication of GPU id in events.

---------

Signed-off-by: gabrpham_amdeng <Gabriel.Pham@amd.com>
2025-04-04 18:31:08 -05:00
Pham, Gabriel b485d4ba70 [SWDEV-524288] Fixed duplication of GPU id in events. (#233)
* Fixed duplication of GPU id in events.

---------

Signed-off-by: gabrpham_amdeng <Gabriel.Pham@amd.com>

[ROCm/amdsmi commit: e2c371ece4]
2025-04-04 18:31:08 -05:00
Arif, Maisam 50d7d5287f Removed unnecessary rocm-smi files (#217)
* Removed unnecessary rocm-smi files
* Moved the update wrapper script into the tools folder

---------

Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
2025-04-04 18:26:43 -05:00
Arif, Maisam cb3c979dfe Removed unnecessary rocm-smi files (#217)
* Removed unnecessary rocm-smi files
* Moved the update wrapper script into the tools folder

---------

Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>

[ROCm/amdsmi commit: 50d7d5287f]
2025-04-04 18:26:43 -05:00
Maisam Arif 0da6613b99 Updated imports on amdsmi_quick_start
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: Ideb0f2addf61fb6bdb728e549a8b0f133682d7d6
2025-04-04 18:25:17 -05:00
Maisam Arif dab3e0657b Updated imports on amdsmi_quick_start
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: Ideb0f2addf61fb6bdb728e549a8b0f133682d7d6


[ROCm/amdsmi commit: 0da6613b99]
2025-04-04 18:25:17 -05:00
Galantsev, Dmitrii a0e6c1c1bd CI - Disable example builds after breakage
Change-Id: I8a070dd65ed752b2485c17e0eeb5bc1dc875931e
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2025-04-04 18:19:20 -05:00
Galantsev, Dmitrii 2c88f8ebe6 CI - Disable example builds after breakage
Change-Id: I8a070dd65ed752b2485c17e0eeb5bc1dc875931e
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/amdsmi commit: a0e6c1c1bd]
2025-04-04 18:19:20 -05:00
Galantsev, Dmitrii 396afadd43 CMAKE - Fix examples and clean up unused variables
Change-Id: Ie072476a525b49bb7c9c0fb9e49393a482a7d0b0
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2025-04-04 18:19:20 -05:00
Galantsev, Dmitrii ea1fcea378 CMAKE - Fix examples and clean up unused variables
Change-Id: Ie072476a525b49bb7c9c0fb9e49393a482a7d0b0
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/amdsmi commit: 396afadd43]
2025-04-04 18:19:20 -05:00
Choudhary, Rahul f3e0c78214 Update rocm_ci_caller.yml enabling !verify and re-test trigger
[ROCm/rocm-core commit: bb4889b787]
2025-04-04 11:18:48 -07:00
Choudhary, Rahul bb4889b787 Update rocm_ci_caller.yml enabling !verify and re-test trigger 2025-04-04 11:18:48 -07:00
Choudhary, Rahul 277b2fa1bb Revert - SWDEV-521313 Streamline Version Management (#5)
Proposed Change:
The Version String is causing build issue for onnxruntime (SWDEV-521313)
Reverts
[AMD-ROCm-Internal/rocm-core/4](https://github.com/AMD-ROCm-Internal/rocm-core/pull/4)

[ROCm/rocm-core commit: 688caa39cb]
2025-04-04 10:54:38 -07:00
Choudhary, Rahul 688caa39cb Revert - SWDEV-521313 Streamline Version Management (#5)
Proposed Change:
The Version String is causing build issue for onnxruntime (SWDEV-521313)
Reverts
[AMD-ROCm-Internal/rocm-core/4](https://github.com/AMD-ROCm-Internal/rocm-core/pull/4)
2025-04-04 10:54:38 -07:00
Yiannis Papadopoulos c63e01724c rocr/aie: Using PDI address instead of cu_mask for dispatch. Automatic hw ctx reconfiguration upon new PDI addition. 2025-04-03 15:13:20 -05:00
Yiannis Papadopoulos f53a9c72c4 rocr/aie: Using PDI address instead of cu_mask for dispatch. Automatic hw ctx reconfiguration upon new PDI addition.
[ROCm/ROCR-Runtime commit: c63e01724c]
2025-04-03 15:13:20 -05:00
Justin Williams 7d5cb0d287 [SWDEV-521116] Added more_itertools workaround to 6.4.0 known issues
Signed-off-by: Justin Williams <Justin.Williams@amd.com>
2025-04-03 13:34:42 -05:00
Justin Williams a99db46c4c [SWDEV-521116] Added more_itertools workaround to 6.4.0 known issues
Signed-off-by: Justin Williams <Justin.Williams@amd.com>


[ROCm/amdsmi commit: 7d5cb0d287]
2025-04-03 13:34:42 -05:00
Sajina PK e004775878 Jpeg sample fix for seg fault (#158)
Update the rocJpeg sample used for testing with the latest on from the rocJPEG repo.

[ROCm/rocprofiler-systems commit: 83d6f73f03]
2025-04-03 13:54:32 -04:00
Sajina PK 83d6f73f03 Jpeg sample fix for seg fault (#158)
Update the rocJpeg sample used for testing with the latest on from the rocJPEG repo.
2025-04-03 13:54:32 -04:00
Galantsev, Dmitrii 1517436b83 .clangd - Add -Wno-c++20-designator
Change-Id: I344f12e2f99e795e011de8d4426e76c282190918
2025-04-03 12:53:05 -05:00
Galantsev, Dmitrii 0e1bc25280 .clangd - Add -Wno-c++20-designator
Change-Id: I344f12e2f99e795e011de8d4426e76c282190918


[ROCm/amdsmi commit: 1517436b83]
2025-04-03 12:53:05 -05:00
Cheruvally, Aravindan c48c9dac80 Revert "SWDEV-521313 - Streamline Version Management: Retain Only version-roc…"
[ROCm/rocm-core commit: 39bd62e592]
2025-04-03 11:46:00 -04:00
Cheruvally, Aravindan 39bd62e592 Revert "SWDEV-521313 - Streamline Version Management: Retain Only version-roc…" 2025-04-03 11:46:00 -04:00
Xie, Jiabao(Jimbo) 4ec606f1ee SWDEV-501675 - disable Unit_hipMalloc_AllocateMoreThanTotalRAM (#63)
Unit_hipMalloc_AllocateMoreThanTotalRAM is an invalid test. hipMalloc is able to allocate more than RAM size if VRam is larger, unless the test is meant to only allocate on host device.
Previously this test may have passed because of an incorrect check on hipMalloc limit: we had incorrectly limited allocation to physical ram size. This is no longer correct. We could always allocate Vram limit or sometimes system ram limit if Vram is full, fixed in https://github.com/AMD-ROCm-Internal/clr/pull/122

Co-authored-by: Jimbo Xie <jiabaxie@amd.com>

[ROCm/hip-tests commit: e25680e4d1]
2025-04-03 11:35:38 -04:00
Xie, Jiabao(Jimbo) e25680e4d1 SWDEV-501675 - disable Unit_hipMalloc_AllocateMoreThanTotalRAM (#63)
Unit_hipMalloc_AllocateMoreThanTotalRAM is an invalid test. hipMalloc is able to allocate more than RAM size if VRam is larger, unless the test is meant to only allocate on host device.
Previously this test may have passed because of an incorrect check on hipMalloc limit: we had incorrectly limited allocation to physical ram size. This is no longer correct. We could always allocate Vram limit or sometimes system ram limit if Vram is full, fixed in https://github.com/AMD-ROCm-Internal/clr/pull/122

Co-authored-by: Jimbo Xie <jiabaxie@amd.com>
2025-04-03 11:35:38 -04:00
Andryeyev, German 4c9cc6ba30 SWDEV-497841 - Add VmHeapArray support (#76)
Add VmHeapArray class to reduce the pressure on VA reservation, since
multiple memory pools can be active at the same time.

[ROCm/clr commit: e974f7fde1]
2025-04-03 21:04:18 +05:30
Andryeyev, German e974f7fde1 SWDEV-497841 - Add VmHeapArray support (#76)
Add VmHeapArray class to reduce the pressure on VA reservation, since
multiple memory pools can be active at the same time.
2025-04-03 21:04:18 +05:30
Andryeyev, German 3ceab5ba02 SWDEV-524849 - Fix HIP error returned during capture (#141)
Always use the latest dependent nodes during hipEventRecord capture

[ROCm/clr commit: 3514f45544]
2025-04-03 20:08:25 +05:30
Andryeyev, German 3514f45544 SWDEV-524849 - Fix HIP error returned during capture (#141)
Always use the latest dependent nodes during hipEventRecord capture
2025-04-03 20:08:25 +05:30
Justin Williams 846f0f5688 [SWDEV-500518] Added RHEL10
Signed-off-by: Justin Williams <Justin.Williams@amd.com>
2025-04-03 09:04:23 -05:00
Justin Williams e8db1d64f6 [SWDEV-500518] Added RHEL10
Signed-off-by: Justin Williams <Justin.Williams@amd.com>


[ROCm/amdsmi commit: 846f0f5688]
2025-04-03 09:04:23 -05:00
dependabot[bot] 7ba2f1264e Bump rocm-docs-core[api_reference] from 1.18.1 to 1.18.2 in /docs/sphinx (#159)
Bumps [rocm-docs-core[api_reference]](https://github.com/ROCm/rocm-docs-core) from 1.18.1 to 1.18.2.
- [Release notes](https://github.com/ROCm/rocm-docs-core/releases)
- [Changelog](https://github.com/ROCm/rocm-docs-core/blob/develop/CHANGELOG.md)
- [Commits](https://github.com/ROCm/rocm-docs-core/compare/v1.18.1...v1.18.2)

---
updated-dependencies:
- dependency-name: rocm-docs-core[api_reference]
  dependency-version: 1.18.2
  dependency-type: direct:production
  update-type: version-update:semver-patch
...

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>

[ROCm/rocprofiler-systems commit: 7f2b19882d]
2025-04-03 09:46:25 -04:00
dependabot[bot] 7f2b19882d Bump rocm-docs-core[api_reference] from 1.18.1 to 1.18.2 in /docs/sphinx (#159)
Bumps [rocm-docs-core[api_reference]](https://github.com/ROCm/rocm-docs-core) from 1.18.1 to 1.18.2.
- [Release notes](https://github.com/ROCm/rocm-docs-core/releases)
- [Changelog](https://github.com/ROCm/rocm-docs-core/blob/develop/CHANGELOG.md)
- [Commits](https://github.com/ROCm/rocm-docs-core/compare/v1.18.1...v1.18.2)

---
updated-dependencies:
- dependency-name: rocm-docs-core[api_reference]
  dependency-version: 1.18.2
  dependency-type: direct:production
  update-type: version-update:semver-patch
...

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
2025-04-03 09:46:25 -04:00
Rawat, Swati 8685fe685f Fixing broken link (#326)
* fixing broken link

* added metadata information

---------

Co-authored-by: srawat <120587655+SwRaw@users.noreply.github.com>
Co-authored-by: Bhardwaj, Gopesh <Gopesh.Bhardwaj@amd.com>

[ROCm/rocprofiler-sdk commit: 379d760fc1]
2025-04-03 18:12:34 +05:30
Rawat, Swati 379d760fc1 Fixing broken link (#326)
* fixing broken link

* added metadata information

---------

Co-authored-by: srawat <120587655+SwRaw@users.noreply.github.com>
Co-authored-by: Bhardwaj, Gopesh <Gopesh.Bhardwaj@amd.com>
2025-04-03 18:12:34 +05:30
Betigeri, Sourabh 487ede31a9 SWDEV-523281 - [clr] Implementation of hipLaunchKernelExC and hipDrvLaunchKernelEx API with support for cooperative launch (#92)
[ROCm/clr commit: 8c6b90996e]
2025-04-03 20:10:05 +09:00
Betigeri, Sourabh 8c6b90996e SWDEV-523281 - [clr] Implementation of hipLaunchKernelExC and hipDrvLaunchKernelEx API with support for cooperative launch (#92) 2025-04-03 20:10:05 +09:00
Arandjelovic, Marko 1c83314659 SWDEV-517867 - Remove invalid assert (#55)
* Remove invalid assert

* Retrigger CI

* Rebase

[ROCm/clr commit: 8fcaa1ca93]
2025-04-03 11:14:32 +02:00
Arandjelovic, Marko 8fcaa1ca93 SWDEV-517867 - Remove invalid assert (#55)
* Remove invalid assert

* Retrigger CI

* Rebase
2025-04-03 11:14:32 +02:00
Lancelot SIX e0359e5d35 rocr: Replace tabs with spaces in trap handler source codes
Use spaces consistently to format the trap handler code.  This patch
does not introduce any change in the trap handler.  Using `git show -w`
on this patch shows an empty diff.

Change-Id: Ic0244dd203347146ffde65460cd87ecbcc43732a
2025-04-03 09:44:23 +01:00
Lancelot SIX c813d2c62d rocr: Replace tabs with spaces in trap handler source codes
Use spaces consistently to format the trap handler code.  This patch
does not introduce any change in the trap handler.  Using `git show -w`
on this patch shows an empty diff.

Change-Id: Ic0244dd203347146ffde65460cd87ecbcc43732a


[ROCm/ROCR-Runtime commit: e0359e5d35]
2025-04-03 09:44:23 +01:00
vedithal-amd 27585a8a2b Support MI 350 profiling (#632)
* Add MI 350 hardware information

* Refactor MI GPU YAML file and corresponding interface

* Add SoC file for gfx950 architecture

* Add analysis report configs for MI 350 containing existing metrics

* Add placeholder None valued metrics for previous architectures to make
  baseline comparison work

* Enable testing on MI 350

* Analysis config metric changes
    - SPI changes
        - Update metric formula for default SPI pipe counter
             - Use efficiently collected pipe wise SPI counters
        - Add SPI Wave Occupancy
        - Add Scheduler-Pipe Wave Utilization
        - Update formula for VGPR Writes
        - Add Scheduler-Pipe FIFO Full Rate
   - CPC changes
	- Add CPC SYNC FIFO Full Rate
	- Add CPC CANE Stall Rate
        - Add CPC ADC Utilization
   - SQ changes
        - Add VALU co-issue efficiency
        - Add F6F4 datatype metrics
        - Update formula for total FLOPs by adding F6F4 counters
        - Add LDS STORE / LOAD / ATOMIC metrics
        - Add LDS STORE / LOAD / ATOMIC bandwidth
        - Add LDS FIFO and TA ADDR / CMD / DATA FIFO full rates

* Collect TCP_TCP_LATENCY_sum only for gfx950 (MI 350)

* Do not inject SQ_ACCUM_PREV_HIRES unnecesarily

* Do not hardcode memory and shader clock speeds

* Write num_hbm_channels to sysinfo.csv instead of hbm_bw while profiling

* Move generate sysinfo.csv to pre processing step of profiling

* Add warnings to use --specs-correction for missing sysinfo.csv values during analysis phase

* Update CHANGELOG

* Analysis phase warning to use --specs-correction when needed

[ROCm/rocprofiler-compute commit: f9aa7be97c]
2025-04-03 02:21:18 -04:00