Commit Graph

72 Commits

Author SHA1 Message Date
Satyanvesh Dittakavi 04e5354d88 SWDEV-292021 - Fix Device Reset
- Device Reset should not purge the allocations that were not by the user
- Addresses QMCPack Test abort due to the removal of all the mem objects during reset

Change-Id: I7b7a123e72bcc985d7e51d17c2382bc618d3e041


[ROCm/clr commit: 924695fb5e]
2021-08-22 23:56:08 -07:00
jujiang f0ec01f657 SWDEV-291787 - Fix persistent direct map
Change-Id: Ic1507cc6d63e9ed574e8e169bce7bf56f4792c19


[ROCm/clr commit: 84b971c7c1]
2021-08-22 23:56:08 -07:00
agunashe 49f0546637 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261


[ROCm/clr commit: d96481fb36]
2021-08-22 23:56:07 -07:00
pvellien e23597d4a4 SWDEV-285333 - Introduce Address sanitizer hostcall service
Change-Id: Id29aacd09d0a9934a027446c57c7095804e1a454


[ROCm/clr commit: c11c02f2c7]
2021-08-22 23:56:07 -07:00
German Andryeyev 9f03f68a8a SWDEV-290160 - Switch to global HSA signals
Runtime can't assign internal HSA signals for HIP events, because
HIP application can destroy the HIP stream or signal reuse may
occur internally. Switch to global HSA signals for HIP events.

Change-Id: Ieaea2d6b039e492b2e7c5112782a8f4e601e50a1


[ROCm/clr commit: ce8dad2ecc]
2021-08-22 23:56:07 -07:00
Arya.Rafii 4f76f0293d SWDEV-289250 - Should return a nullptr for PAL so we can assume it's a host ptr
Change-Id: I530eb39104bbe727c3e38186f6db4e64285b3fc8


[ROCm/clr commit: 8b22111f4b]
2021-08-22 23:56:07 -07:00
Christophe Paquot b8de199652 SWDEV-276396 - Implement hipDeviceReset
Add a Purge function to MemObjMap

Change-Id: Iac51dfda9a7b7c45f2f4a0dc35f7a623121aba1a


[ROCm/clr commit: d13581efa7]
2021-08-22 23:56:07 -07:00
German Andryeyev a9abd850ea SWDEV-284671 - Add HW event wait to improve hipDeviceSynchronize
If AMD event contains a reference to a HW event, then runtime
could check/wait for HW event. CPU status update will occur later
after HSA signal callback, but it's not important for the result.

Change-Id: I591391a953bbdba6a25ac07e2cd98aeb17cd4596


[ROCm/clr commit: 85c70a7495]
2021-08-22 23:56:07 -07:00
German Andryeyev c4ee688d6e SWDEV-240804 - Add coarse grain memory support
Add an extension to memory advise to disable cache coherency for
better performance

Change-Id: I283703d81d9c36ddfa2c8fffa15eef60e2195056


[ROCm/clr commit: a9a1e21445]
2021-08-22 23:56:07 -07:00
Jason Tang e24706f99d SWDEV-287945 - LinuxPro: Disable PAL for gfx9+
Change-Id: Ief81629e53a4c0ca529a510dac5063a8885257bf


[ROCm/clr commit: 1b832c0182]
2021-05-27 11:05:43 -04:00
kjayapra-amd aae0d4ca51 SWDEV-286346 - Implement Arena Memory Object for externally created memory.
Change-Id: I8530602d89edf83ad367c52167e48a1559ee1e18


[ROCm/clr commit: 1c49d8816c]
2021-05-18 10:59:52 -04:00
Saleel Kudchadker eeea586a2a SWDEV-283726 - Workaround for rocprof hang
This addresses the rocprof hang seen with direct dispatch. The
workaround queues the handler back if any of the signal value in the batch
is not decremented. To rememmber the last position in the list, we save
the parsed command in the current timestamp struct.

Change-Id: I02959e463cfe3cee83c54808ffd6e6f48f43b4e8


[ROCm/clr commit: e5e635f9bf]
2021-05-13 11:58:03 -04:00
Jason Tang 6cd1f5854e SWDEV-277566 - Separate code object loading from building
Change-Id: I87b8178f55e8ef23762dfe11fab71665ba680f00


[ROCm/clr commit: 211ba25b4e]
2021-05-13 08:41:35 -04:00
Brian Sumner 567d9cc617 SWDEV-285332 - move common context into parent
Change-Id: I99ceb62ad948e1fa9d1dcaa5ede98626cc95bea7


[ROCm/clr commit: 6d09a83b2d]
2021-05-09 09:18:39 -07:00
pghafari b6e62f99d0 SWDEV-245532 - HIP - Vulkan interop semaphores
linuxpro syntax update

Change-Id: Id77e0d82c504fb7a1bd8edfac7dc962e428c87b4


[ROCm/clr commit: 89168d4812]
2021-04-28 13:48:25 -04:00
pghafari 45a930465e SWDEV-245532 - HIP - Vulkan interop semaphores
linuxpro syntax update

Change-Id: I947f24f67ed59c15fe5047348b0c005e19e93544


[ROCm/clr commit: 6e69bcef9e]
2021-04-28 07:44:22 -04:00
pghafari dbb9c74540 SWDEV-245532 - HIP - Vulkan interop semaphores
Change-Id: Ib79328ce4ec2f8ac3aade59fde4fd30e2d6e5cba


[ROCm/clr commit: 582d12b32f]
2021-04-26 13:20:58 -04:00
Vladislav Sytchenko c585ae92a7 SWDEV-280473 - Support HSAIL shared library build
This change makes HSAIL usage similar to that of Comgr. By default, the
runtime will statically link against it, however if HSAIL_DYN_DLL is
defined, then the runtime will try to dynamically load HSAIL.

Currently stick to statically linking to HSAIL. In a feature patch the
dynamic loading behaviour will be enabled.

Change-Id: I6a78a4375975cf847f236b200404c8cf941d012b


[ROCm/clr commit: c7b50bb890]
2021-04-14 12:25:54 -04:00
Vladislav Sytchenko 7b3014ec69 SWDEV-280473 - Remove HSAIL support from the ROCm backend
In adition to removing the HSAIL logic from the ROCm backend, guard all
of the HSAIL includes in the common layer behind the WITH_COMPILER_LIB
define. This is to avoid including HSAIL headers when building with
no support for it.

In common logic replace the use of the aclType enum with the new
Program::file_type_t enum. This is essentially a local copy of the HSAIL
enum to avoid including any HSAIL headers.

Change-Id: Ica0651d1b29dfccc255cc584eb82a5cb35e1b520


[ROCm/clr commit: cbeb372e46]
2021-04-12 14:55:06 -04:00
Jason Tang 636bdbd0fa SWDEV-277559 - Remove AMDIL
The rest of AMDIL support will be removed along with orca backend.

Change-Id: I0462501e7147dc4b99870fd02034d0a4a0496e55


[ROCm/clr commit: 1a38be8972]
2021-04-09 14:15:15 -04:00
Saleel Kudchadker 6c304e4027 SWDEV-276120 - Remove support for barrier sync
ROC_BARRIER_SYNC will not work with direct dispatch.
Remove and cleanup.

Change-Id: I81368b2e65039477bd0343bb92708dab48867db6


[ROCm/clr commit: aa38af8c96]
2021-04-07 17:08:39 -04:00
Jason Tang 44eb6b02dc SWDEV-1 - Change file mode back to 644
Change-Id: I433740d65c8f648e346107f6d8fa57d69463b713


[ROCm/clr commit: c13f9df42a]
2021-03-05 10:17:58 -05:00
kjayapra-amd d4707ff166 SWDEV-259566 - Adding support to retrieve handle for offsetted pointer.
Change-Id: I4a700c31a9ab481c4ea43923af57e83247555ab0


[ROCm/clr commit: 95e3a6d985]
2021-03-04 12:28:59 -05:00
Ravi C Akkenapally 1d842c07ec SWDEV-179105 - Stream Operations: Add feature querying support
Change-Id: I01cb85223b83f3655e5e21ad16639da406e5cd3e


[ROCm/clr commit: e94d482c8f]
2021-03-02 11:02:15 -08:00
Vladislav Sytchenko 086bdf83b4 SWDEV-232428 - Push hostcall implementation to the device layer
This change unifies the hostcall implementation for all the backends,
by pushing the common logic to the device layer. This is done by
replacing the use of hsa_signal_t with device::Signal (a light wrapper
around it).

Change-Id: I7b6fca7930b5a0b199da5d85e2e048354cc04e7b


[ROCm/clr commit: 671778bdd3]
2021-02-16 17:19:57 -05:00
Ravi C Akkenapally 6629930067 SWDEV-179105 - Stream Operations: Add support for Wait and Write
Change-Id: Ibffa1d6d573826b64763da280074a77271d66808


[ROCm/clr commit: 0a5f9a3b10]
2021-02-15 17:02:38 -08:00
kjayapra-amd 4583cbafee SWDEV-270013 - Allocate kernel_arguments from kern_arg & finegrain pool instead of coarse grain.
Change-Id: Id4c6977934fdd6ef2311f6e75593801f1e51983c


[ROCm/clr commit: 2df099df9e]
2021-02-15 18:20:08 -05:00
Payam 72b49f0800 SWDEV-257937 - Updated fix for ROC_BARRIER_SYNC=0
Change-Id: I7e28e541b654db57fb0890d7dbb7519cfb2d93db


[ROCm/clr commit: a2e0b0495c]
2021-02-11 14:01:45 -05:00
Rahul Garg ff35f82881 SWDEV-271182 - Fix HdpMemFlushCntl and HdpRegFlushCntl
Change-Id: Ib690b475c2c4514c862ded5fc2bdd1049e27bd46


[ROCm/clr commit: df0b14ff47]
2021-02-10 11:40:35 -05:00
Tony Tye a05c745d54 SWDEV-268864 - Remove duplicatation of isa related information
Remove targetId_, gfxipMajor_, gfxipMinor_ and gfxipStepping_ from
device::Info as they are now available in device::Isa.

Change-Id: I381b1d4798ebf50655740e004a01ac7f86dbf668


[ROCm/clr commit: c2308216dd]
2021-01-18 22:32:37 +00:00
Jason Tang 3b5b0175ac Fix build error when building with clang++
Change-Id: If1c9fbd6af6028bd39ff43ee53d74d5e778e2a27


[ROCm/clr commit: c0730b69d5]
2021-01-18 09:45:19 -05:00
Tony Tye 902cf1a239 Update code object handling for GSL, PAL and ROCm
- Correct GSL path to report targets using the TargetID syntax.

- Correct GSL path to check compatibility of code objects when
  loading.

- Add concept of an device isa and create a registery used by ROCm,
  PAL and GSL.

- Support XNACK and SRAMECC target features consistently for PAL and ROCm.

- Correct logic for NullDevices and asserts to avoid memory coruption.

- Allow all NullDevices to be created for HIP.

- Numerous other code improvements.

Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e


[ROCm/clr commit: c7e8d91e14]
2021-01-14 11:11:51 -05:00
Tony Tye 2476472bcb Make hsa_agent_t handles use pointer to device::Device
For roc devices create hsa_agent_t handles using a pointer to the
device::Device. This ensures each device has a different hsa_agent_t
handle. This may be necessary to ensure the loader symbol lookup will
search only symbols for the correct device.

Change-Id: Iee6dd40d68bf22a02ce8c75cbe5ac8f5a0d9e418


[ROCm/clr commit: 76c371d78a]
2021-01-13 08:24:28 +00:00
Tony Tye 1215c2d51e Add virtual destructor to device::Settings
Add virtual destructor to device::Settings since derived classes are
allocated, but are deleted using the base class. This ensures the
descructors of the derived clsses will be executed if present.

Change-Id: I1f974b986193c60128009a768ec6b01b9deeacd5


[ROCm/clr commit: 77268b2e60]
2021-01-13 08:24:28 +00:00
Tony Tye efd1f5add1 [NFC] Move device::Info::targetId_ declaration
Move declaration of device::Info::targetId_ to be adjacent to the
other char* name fields.

Change-Id: Iefb249e801765a87b243a2a5e6997e78e817be2b


[ROCm/clr commit: a8d7e59dff]
2021-01-13 08:24:28 +00:00
Tony Tye 3b6c42f78d [NFC] Correct comments and line spacing
- Correct spelling mistakes or working in comments.
- Adding missing line separators.
- Add missing comments for namespace closing brace.

Change-Id: If09cdd38aa088b0f68f750dfdef81351eb8c4935


[ROCm/clr commit: eb16dc5ef3]
2021-01-13 08:24:28 +00:00
Jason Tang 6778b6e4e2 SWDEV-263539 - More Target ID fix in GSL path
On behalf of Tony Tye. The bootleg passes CQE Baffin/Ellesmere test.

Change-Id: I4c21d21b3aaba360682ef15b8a4dda239f8af276


[ROCm/clr commit: d4316141b7]
2020-12-14 16:48:55 -05:00
German Andryeyev 8014e4c7bc Remove obsolete terminate() method
Change-Id: I66b4a74f17977f1af320f402402a2f1b602e9911


[ROCm/clr commit: 08b846ae12]
2020-11-30 11:46:09 -05:00
Alex Xie 2a6c8ecb60 SWDEV-258808 - OCLSeparateCompile subtest of oclcompiler error
[PAL to KFD/ROCr][ROCr_Runtime][Vega10] OCLSeparateCompile subtest of
oclcompiler from ocltst test package is encountering clLinkProgram()
failed (chksum 0x00000001) error

If runtime does not provide a file name as dump file to ELF library,
ELF library use a temp file in current folder.
The current folder can be not writable for several reasons:
1. The application current folder might be system folder, the user
  does not have write permission.
2. The current folder is under a readonly file system. This happens for
embedded customers.

Tested in VEGA10. Issue was fixed.

Change-Id: Ic0e9f040b7c7583914301673cce237ab28b0c0cb


[ROCm/clr commit: 6327dbc4cc]
2020-11-24 15:08:12 -05:00
Aryan Salmanpour e8c7cf569f Add an environment variable for setting a global CU mask
Change-Id: I773b152023c7b8e1e679a42015748f9b23fd946d


[ROCm/clr commit: d03ee6eff6]
2020-11-20 10:05:09 -05:00
Jason Tang 091f1e8e85 Change file mode 755 back to 644
Change-Id: I4ba5d66997ffd3331c56674d4bf805160dcdf049


[ROCm/clr commit: 25cc965c76]
2020-10-19 15:09:32 -04:00
Rahul Garg 7b0edf7aa0 Fix PCI bus domain ID
SWDEV-256338

Change-Id: I09afdca4f1a08f99ce662a4c4ed8a51d85500699


[ROCm/clr commit: a224dc2a7b]
2020-10-15 14:59:57 -04:00
Rahul Garg 40b90694c6 Add image1DMaxWidth_ for maxTexture1D property
Needed by SWDEV-254068

Change-Id: Ic650dfb6e5b38d7544ba647c53de52deda39b92d


[ROCm/clr commit: c0f8b52f06]
2020-10-14 17:30:43 -04:00
German Andryeyev 2b3377b0bc Add ROCr queries for HMM support
Change-Id: I2b5508bf0faf8f48dd7348d6a5202fb28de09876


[ROCm/clr commit: c05de4f2f9]
2020-10-13 09:12:00 -04:00
Sarbojit Sarkar 70d71642d2 [perf]hipMalloc performance optimization
Change-Id: I6e8a918cc1c4cafad197b09e10755cd180e11ead


[ROCm/clr commit: 4a025e1a87]
2020-10-06 03:19:41 -04:00
German Andryeyev 7229c259ca Add support for CPU device in advise
Change-Id: I7250e0183580c14cd3d6050ef85f9ce26e36f4a8


[ROCm/clr commit: df63547906]
2020-10-05 12:52:46 -04:00
Jatin Chaudhary 2a16ef5d04 Adding and populating available registers per cu value
Change-Id: Ide012038a9d74b20166ce1e69a9f2c0cbdce0d73


[ROCm/clr commit: d0f009a0ee]
2020-09-28 05:30:23 -04:00
kjayapra-amd b3e8c5cdb0 SWDEV-252542 - Fixing Win Compilation on SWDEV-241902.
Change-Id: If76f79002b265dccf6da4acef1ff9372d8b0a2ff


[ROCm/clr commit: 7462e39954]
2020-09-18 12:11:56 -04:00
kjayapra-amd 3e6cf63a83 SWDEV-241902 - Changes to pass file descriptor and offset to load code object.
Change-Id: I0243cccdeaa533b2a56fde42f12d5424c3b63a3b


[ROCm/clr commit: a66c56d641]
2020-09-15 07:54:24 -04:00
Jason Tang eaf65e59ae Remove gfxipVersion_ from device level
Change-Id: I11485beffdb9371a20d7abcaa1d1774c102db574


[ROCm/clr commit: 5ecce5c287]
2020-09-07 11:33:49 -04:00