Commit Graph

54 Commits

Author SHA1 Message Date
Chengming Gui 8cd0bc0134 libhsakmt: Add gfx1031 support
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Change-Id: Ic1e78e5c3a453eb01f725612cf9ecc702ce2e132


[ROCm/ROCR-Runtime commit: bf1a7acea3]
2020-07-28 15:01:00 -05:00
Yong Zhao 430c7be7e0 libhsakmt: Prepare for gfx1030 support
PCI IDs have yet to be added later.

Change-Id: Iac303fc1346f4ed5c4da5300b1e311c1c6938ee2
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 7c74069d6a]
2020-07-07 11:07:14 -04:00
Jon Chesterfield ffadc0c8c6 Replace libpci with new parser.
libpci was only used to find a marketing string for a device.
This patch looks for a pci.ids on disk and parses it to extract the
same string, using 'Device xxxx' as the fallback on file i/o error
or missing data from the text file. Tested by checking every vendor/
device pair against the values returned from libpci.

Change-Id: I21af3157472c1824d57fcee31393c6ee8ce07330
Signed-off-by: Jon Chesterfield <Jonathan.Chesterfield@amd.com>


[ROCm/ROCR-Runtime commit: 0a1718b753]
2020-03-20 17:50:47 +00:00
Sean Keely 5149a527d7 Handle EBADF when KFD file handle is still open.
Signed-off-by: Sean Keely <Sean.Keely@amd.com>
Change-Id: I23d6c87d5729f57c261030c6baeff4c977eef934


[ROCm/ROCR-Runtime commit: 9efefe6d52]
2020-03-11 18:52:19 -05:00
Felix Kuehling 2e3ae4b983 libhsakmt: Improve error handling in child process
Check for errno == EBADF in kmtIoctl to detect misuse of the kfd_fd
in a forked child process.

Detect being in a forked child process pro-actively by implementing
a pthread_atfork callback.

Make sure all mutexes get reinitialized in the child process to avoid
deadlocks.

Check for being in a forked child process in CHECK_KFD_OPENED so that
all hsaKmt functions will return the appropriate status
HSAKMT_STATUS_KERNEL_IO_CHANNEL_NOT_OPENED.

Update InvalidKFDHandleTest to expect that error code.

Change-Id: I0238e5fba344dcaa454e97a35db2e2dcc8d1f607
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 87e10cd0b4]
2020-01-20 18:01:21 -05:00
Huang Rui d0c78bf4d5 libhsakmt: add gfx90c support for thunk
This patch adds the support for gfx90c apu. So far we treat it as "dgpu" and
gfx900. Will update hsa gfxip table while the isa/llvm is implemented on gfx90c.

Change-Id: I6ef164bf3e751fe6dd6287cac212a500dce84b1a
Signed-off-by: Huang Rui <ray.huang@amd.com>


[ROCm/ROCR-Runtime commit: fdba74c2fb]
2019-11-14 20:02:53 -05:00
Philip Yang bdb519bd35 libhsakmt: use the closest NUMA node to allocate queue ctx area
On NUMA system, allocate queue ctx save restore area on the closest NUMA
node to the GPU which the queue is going to run. This will improve
performance on NUMA system generally by reducing schedule latency and
fix the multi-node rccl-tests unstable performance issue.

If the closest NUMA node has no memory available, set flags NoNUMABind=1
to bypass mbind, to use default NUMA memory policy to allocate system
memory.



Change-Id: Ic62bfa5bb2efbf4f6ae79ff403e9610ddf18d45c
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 59c857476f]
2019-11-06 17:33:26 -05:00
shaoyunl 677448a6ea Thunk : Add gfx1011 support from thunk side
Change-Id: I6b202b75fc1ad0e69576a35a6a3e499818137e04
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>


[ROCm/ROCR-Runtime commit: a1e399a3ff]
2019-09-25 11:02:33 -04:00
Philip Yang 0cb538eae8 libhsakmt: fix mbind failed on docker
Docker seccomp by default blocks mbind system call, so mbind return
failed on docker. thunk should not fail this otherwise application
cannot allocate system memory on docker.

Use pr_warn_once and pr_err_once to avoid duplicate same error messages



Change-Id: I61a7c0e4abaa3dcfe7abf2ea48db90f669f9638a
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 4da09813a3]
2019-09-13 15:01:47 -04:00
Yong Zhao 7f5a93ef2a libhsakmt: Support gfx1012
The gfx version item is yet to be added.

Change-Id: Ia6c487447e5a5df80c0c12fe150939175068024b
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 3ecd83e52d]
2019-09-06 14:42:32 -04:00
Yong Zhao fab21d6d81 libhsakmt: Implement HSA_FORCE_ASIC_TYPE to overwrite asic type
Force all the GPUs to a certain type, use the below command:
HSA_FORCE_ASIC_TYPE="10.1.0 1 gfx1010 14"
meaning major.minor.step dgpu asic_name asic_id

This will faciliate the cooperation across the teams for bringing up
ASICs which reuse existing device IDs.

Change-Id: I40fe4c9b46d3ccb3e38ea52250e80e82fb50fb0f
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: d6539ddc24]
2019-09-06 12:12:42 -04:00
Yong Zhao d4ca540cd6 libhsakmt: Add gfx908 support
Change-Id: Icced5ca4c68eb6cc3978e0d8e836d0ccfc8c980d
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 23db2c658d]
2019-08-01 23:10:28 -04:00
shaoyunl 050b676533 Thunk: Add gfx1010 initial support
Add gfx1010 basic support on Thunk

Change-Id: Ie4c0922158c7f5e2951f8694f4b204f371f1aa23
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>


[ROCm/ROCR-Runtime commit: 02ccb9eb57]
2019-07-11 17:08:11 -04:00
Philip Cox 3d13159fd6 Fix type mismatch passed to queue suspend/resume
The queue IDs passed over to the kernel via kfd_ioctl_dbg_trap_args->ptr
should be a list of uint32_t's.  Need to convert from the passed in
64 bit HSA_QUEUEID to 32 bit uint32_t's.

Change-Id: I8718566d9f9ffc90ce0b2ecc129b10c49d73186a
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: 608bc7c3a0]
2019-05-15 07:33:47 -04:00
Alex Voicu 87d0f4246b Macros are devious, wrap argument to prevent surprises.
Change-Id: Ib99e7d2ec1e7a2802f4ae7946ba1fa92c9940a85


[ROCm/ROCR-Runtime commit: ee9831779c]
2019-04-19 07:06:28 -04:00
Alex Voicu 605a038c57 Fix Clang build
Change-Id: I0b51699c0a1368cf5813bd9d3cd4479139d23d6a


[ROCm/ROCR-Runtime commit: fdadae6745]
2019-04-19 07:06:28 -04:00
Kent Russell 5de58e1ab2 libhsakmt: Add Vega M support
While this may not be supported in the runtime, the kernel/firmware
support it

Change-Id: I7fe4536a6b3055f39e25f453060e899938645d91
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: 1304a92e17]
2019-03-21 08:05:47 -04:00
Gang Ba 197f731fbc drm/amdkfd: Added gfx904 and gfx803 for KFD.
Change-Id: I4406dc70c776926feaecca3f2146d65259a80517
Signed-off-by: Gang Ba <gaba@amd.com>


[ROCm/ROCR-Runtime commit: 52ec7f805e]
2018-09-25 08:17:44 -04:00
Mike Li 7cd87a5590 all_gpu_id_array: Handle GPU resource management
GPU Resource management can disable some of the GPU nodes.
The Kernel driver could be not aware of this.
Get from Kernel driver information of all the nodes and then filter it.

Change-Id: I4eeb126a5efce2192c35f5d2b72be1811e9ded32
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>


[ROCm/ROCR-Runtime commit: 3144a84b9a]
2018-09-24 11:38:11 -04:00
Felix Kuehling 094073ff74 Revert "libhsakmt: Try to use CPU addr as GPU addr for userptrs"
This reverts commit 84bb9072c0.

This fixes ambiguity when looking up GPU addresses with
hsaKmtQueryPointerInfo.

hsa_amd_agents_allow_access uses hsaKmtQueryPointerInfo, and
depends on finding the correct object from a GPU address. Finding
the wrong userptr object based on its CPU address leads to
incorrect GPU mappings and results in VM faults.


Change-Id: I7c5f571ee6e1f9d32687aa3eab6d96944ad032be
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: a9bd6e6f8b]
2018-08-31 15:04:50 -04:00
Mike Li b5cc397824 Decouple user NodeID and sysfs NodeID
Currently, all HSA nodes are exposed to user. So the existing
implementation assumes a one to one mapping between user
NodeId and sysfs nodeId.
GPU Resource Management will provide control over the exposed
HSA nodes. This means not all HSA nodes will be exposed to the user.
Decouple it.
The mapping from user NodeId to sysfs NodeId will be local
to topology.c and topology helper functions. For others NodeId
should be sequential from 0 to Number of Nodes exposed to user.

v1: initial implementation
v2: map node id within the topology_* functions
v3: remove two static globals
v4: add bounds check got node id

Change-Id: Id12147ece41d682430f398944bbb339ca906eb1b
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>


[ROCm/ROCR-Runtime commit: 3437a356c7]
2018-08-23 16:01:32 -04:00
Felix Kuehling 84bb9072c0 libhsakmt: Try to use CPU addr as GPU addr for userptrs
If the CPU addr of a userptr is accessible by the GPU, try to use it
instead of allocating a different GPU address. If something else is
already registered with an overlapping address range, we still need to
allocate a GPU address, because KFD does not support overlapping GPUVM
mappings.

Change-Id: I452963ee45a454f735755a0b43122b9aee5d55be
Signed-off-by: Felix Kuehling <felix.kuehling@gmail.com>


[ROCm/ROCR-Runtime commit: ab181c46c0]
2018-08-17 16:06:45 -04:00
Yong Zhao 6086ae78bb Differentiate gfx700 and improve the logic by introducing is_gfx700()
Because gfx700 has local memory but other APUs don't, we should reflect
that in the code. Meanwhile, fix a bug that on gfx902 svm aperture is not
added when calling hsaKmtGetNodeMemoryProperties().

Change-Id: Id840f2db0b14fda9ee713b219a9474c15f8a9771
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 110e754f64]
2018-08-09 21:39:37 -04:00
Yong Zhao d89e91656b Remove the use of IS_DGPU()
The information can be obtained directly from node id. Also improve the
whole logic for future compatibility.

Change-Id: I130733be4e7930d5953d5e81409905e60c2ec35e
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 4bb90d048c]
2018-08-07 18:07:04 -04:00
Shaoyun Liu 14ada05980 Thunk: Add gfx906 support on thunk
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>

Conflicts:
	src/topology.c

Change-Id: I692d9295a954d4eda08eba301312014f7b3969cb


[ROCm/ROCR-Runtime commit: 93d07cf916]
2018-05-29 15:38:26 -04:00
Jay Cornwall 5b079d80cf Allocate EOP queue local to GPU
On discrete GPUs place the EOP queue in VRAM. The reader/writer of this
queue is the CP and the size is small. Dispatch latency improves
through lower read latency in AQL completion phase.

Change-Id: Id8351dcddbd21fd7c7d699803c96434c9132db71
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>


[ROCm/ROCR-Runtime commit: e2c353dc0d]
2018-02-22 18:14:05 -05:00
Oak Zeng e305dc9c82 Use drm render device to map kfd BOs
Previously kfd device is used to map memory for CPU access.
However this is not compatible with how TTM handles CPU mapping
on eviction - memory won't be unmapped and remapped on restore.
This fixes the issue by mmapping memory using DRM render device.

This patch requires a coordinated kernel driver change to work.
To make it compatible with old kernel driver, some temporary codes
are included. Once the coordinated kernel driver is checked in,
the temporary codes can be removed.



Change-Id: Ie7b304c4a82b7e8d5ab703acb81d66430af4f0bc
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 68a2d286ca]
2017-11-02 09:06:26 -04:00
Yong Zhao e5784493c7 Add SVM aperture on gfx902
Because of HW design change, GPUVM aperture is no longer needed on GFX9
APUs. However, on APUs some functionalities still depend on GPUVM
aperture, so we choose to use SVM aperture instead to assume
the functionality of previous GPUVM aperture.

Change-Id: Ife7f0d598dd7989f2bcf7cdf3466d5a68703ca60
Signed-off-by: Yong Zhao <yong.zhao@amd.com>


[ROCm/ROCR-Runtime commit: 3b852b4437]
2017-10-16 15:06:09 -04:00
Yong Zhao 40cdf91bad Add gfx902 support
Change-Id: Iefc6d1bea0d1d2ea8768867c53f16cdf1279d38f
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: d0e2872011]
2017-08-03 10:27:56 -04:00
Felix Kuehling 0c811652ff Align large buffers to BigK or huge-page boundary
This should allow us to take advantage of BigK fragments and huge pages
and improve TLB efficiency for VRAM allocations. Huge pages only work
with 4-level page tables (gfx900 and up). BigK fragments work on older
GPUs.

Change-Id: I02e1fbf74de554e16fdaf44e44d03b47df45c3b0
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: c7bd7733e5]
2017-07-17 12:04:05 -04:00
Amber Lin 29124d3af3 Introduce debug level to Thunk
Existing Thunk has printf/fprintf in the code while normally libraries
don't print any message. This patch introduces a print machenism similar to
how the Linux kernel prints to console based on the log level. The default
is not to print any message, but setting HSAKMT_DEBUG_LEVEL will enable the
prints.

Change-Id: Ic071e122d35a82260218e9914cde4815e69df742
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: ccfe739929]
2017-06-26 16:33:17 -04:00
Amber Lin dd782c86c0 Implement hsaKmtGetQueueInfo interface
For items in HsaQueueInfo, control stack information comes from KFD, CU
mask information is maintained in Thunk, and others (queue detail error
and queue type extended) are ignored (value = 0) at this point.

Change-Id: Ib21370b0f52b2bb4ebe6a9b4b6ec6139cccb25ca
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 683fc96325]
2017-06-01 14:15:54 -04:00
Harish Kasiviswanathan 49805f82b1 Get PAGE_SIZE from system configuration
Change-Id: I87f383c443b873e13d36e80bfa034665bf493520
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 3b2f064cbc]
2017-05-02 16:54:32 -04:00
Amber Lin 4ddf99f4a9 Unify the device ID list
Integrate the supported device ID list distributed in topology, queue, and
pmc into one place: topology.

Change-Id: If035cf8e4a6fc6caff6c94ec627647cfb11c3d79


[ROCm/ROCR-Runtime commit: 4827b09119]
2017-03-06 16:26:51 -05:00
Felix Kuehling 73c7c197af Allocate paged system memory as userptr
Change-Id: I0864e678681788df37eccd9d7ebc70086e1f93bf


[ROCm/ROCR-Runtime commit: a90abcb317]
2017-02-02 10:32:53 -05:00
Harish Kasiviswanathan 6f2b43d96e Add fork support
If fork() is called, clear all duplicated data that is invalid in the
child process.

Change-Id: I4e27198060db593c630c6337b7071dfbd0d80b83
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: f1f62d863c]
2017-01-12 14:38:30 -05:00
Harish Kasiviswanathan 5d2336f1ca Add API entrypoints for IPC functionality
Implement three new APIs for IPC buffer sharing:
	-hsaKmtShareMemory()
	-hsaKmtRegisterSharedHandle()
	-hsaKmtRegisterSharedHandleToNodes()

Add new ioclts necessary for the above APIs.

Change-Id: Ia2b4d0dc91ec64bff959395d11c0536467404792
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 559e31d6ff]
2016-11-28 16:19:22 -05:00
Lan Xiao 742354161b libhsakmt: Add MarketingName and AMDName for all nodes - CPU & GPU
HSA thunk API is currently reporting engineering name to MarketingName
and returning NULL when querying for AMDName.

-Change current name reporting from MarketingName to AMDName.
-Use libpci to get MarketingName



Change-Id: I819a6de7b067a2e724a6695e7d800274b83a71f8
Signed-off-by: Lan Xiao <Lan.Xiao@amd.com>


[ROCm/ROCR-Runtime commit: 9cbbf30be7]
2016-08-23 10:49:27 -04:00
Harish Kasiviswanathan 14e60b6ab3 Get processor vendor from /proc/cpuinfo
Change-Id: I9039385d268ef1693fab121cbf1caf442129a12e


[ROCm/ROCR-Runtime commit: ee1dd5d9c2]
2016-03-15 15:37:52 -04:00
Felix Kuehling 03720306b9 Make hsaKmtAllocMemory more compliant with the Thunk spec
Allocations from GPU nodes will return VRAM, not system memory.
Only non-paged allocation from GPU nodes is supported. System
memory can only be allocated from CPU nodes (usually node 0).

The HostAccess flag is no longer used to distinguish the memory
type. It only indicates, whether the memory is mapped for CPU
access.

Maintain compatibility with broken KfdTests by returning system
memory for paged-memory requested from GPU nodes.

Change-Id: I514defede735f55e6de436f41944125b6f2c4ccf


[ROCm/ROCR-Runtime commit: 887b32fe86]
2016-02-10 10:29:54 -05:00
Ben Goz 18aab410cc Adding support to hsaKmtMapMemoryToGPUNodes
Change-Id: Iab6222402a43c3cd31b0efc5a316a6482986258e
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 7070f7ec5e]
2016-02-09 17:34:29 +02:00
Harish Kasiviswanathan b687eaf2c2 Don't limit number of supported HSA Nodes
Remove #define MAX_NODES 8

Change-Id: I756cadc652543dd17ea48a1c956adc08c3d2631a


[ROCm/ROCR-Runtime commit: 5e53205b9e]
2016-01-15 17:27:43 -05:00
Harish Kasiviswanathan 14358ee07f Don't limit number of supported GPUs
Stop using NUM_OF_SUPPORTED_GPUS. For now the definitions itself cannot
be removed as ioctl code is in upstream Kernel.

Change-Id: If846625a8ad5062d5483e762850c793d3c00b9d0


[ROCm/ROCR-Runtime commit: ce83dc623f]
2016-01-15 11:44:42 -05:00
Ben Goz 2fa7eef572 Adding support for mGPU
Change-Id: I5ed184e6a58b38d9dde48867f14513d161cf41a9
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: ea0f9d2a0b]
2016-01-04 15:35:15 +02:00
Harish Kasiviswanathan 71dc59b245 Correct parameter name for topology_is_dgpu()
The function expects device_id and not gpu_id.

Change-Id: I79794fd4e58e6e6adb26659da30f3e4d8e108434


[ROCm/ROCR-Runtime commit: 69662da3dc]
2015-10-23 18:43:45 -04:00
Harish Kasiviswanathan d38a3f1438 Fix init process apertures
Kernel ioctl AMDKFD_IOC_GET_PROCESS_APERTURES returns process apertures
only for GPU nodes. The current implementation assumed that this list of
GPU nodes returned by the ioctl has one to one correpondence to sysfs
topology nodes. This fails when non-GPU nodes exist in topology as in
case of Intel + gfx802

Fix this by using gpu_id (./sys/.../kfd/topology/nodes/1/gpu_id) to map
information obtained from kernel ioctl call.

Change-Id: I4ab8ae5354f12cf0b6609fc4b24182b82eb3677f


[ROCm/ROCR-Runtime commit: 5cc56a2647]
2015-10-15 15:38:14 -04:00
Harish Kasiviswanathan 462a775ec3 Fix hard-coded usage of Node 0
Use appropriate NodeId instead

Change-Id: I46af93b76978fea7bedb34457fcc0864ed4fe2d4


[ROCm/ROCR-Runtime commit: b6c6f79143]
2015-10-14 17:27:38 -04:00
Felix Kuehling 574fcdd340 Fix various dgpu memory management issues
Fix TONGA_PAGE_SIZE value and move it to libhsakmt.h for usiing it
consistently in all places that require the same alignment for the
same reason. Create a generic alignment helper macro to replace some
incorrect hand-coded size alignments.

Move virtual address and size alignments down into aperture management
functions. Alignment is a per-aperture property that is set during
fmm_init_process_apertures. Doing the alignment there ensures that
all allocations in the same aperture are aligned the same way. Finding
objects by size and address can take the alignment into account.

Also align the size of physical allocations to back aligned virtual
address allocations. CPU mappings do not need to be aligned.

Map anonymous pages over released memory mappings to allow the
backing pages to be released, while keeping the address space
reserved.

Add alignment parameter to free_exec_aligned_memory_gpu to match the
interface of allocate_exec_aligned_memory_cpu. It doesn't make sense
to allow an alignment parameter in one but assume a specific
alignment in the other.

Change-Id: I74226ca6938f4948f643e5aee1d474720cd89e78


[ROCm/ROCR-Runtime commit: 6a5ca4bc5a]
2015-10-13 19:14:56 -04:00
Ben Goz eaed099317 Adding support for local memory on dGPU
Change-Id: I1a926b11730ba295605eeb37c9b1fc438bed8a64
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 6170080cf6]
2015-09-21 14:13:15 -04:00
Ben Goz 9db147f2d4 Support gfx802 dGPU
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: fb8378a18b]
2015-08-30 14:13:53 +03:00