Add a view bit to avoid original resource destruction when parent
dependency doesn't exist with the image view cache
Change-Id: I8277afd575af8f29951c5d1a9f7d94d784251657
[ROCm/clr commit: b49e8e78e1]
Make sure parent_ field is cleared for the internal image views.
The internal image views don't require dependencies tracking.
The issue appeard only when Navi10 pitch workaround was enabled.
Change-Id: I376d212750085a9391f8c32fc2979dcb5d93c89c
[ROCm/clr commit: 6b89980fb2]
Blit manager requires an image view to reduce the amount
of copy kernels. Creation/destruction of a view in ROCr is
an expensive operation. Thus, runtime can cache views for fast access.
Change-Id: Ia67d775b481cc8326d91215ca22d4a73c1dddb59
[ROCm/clr commit: d29755452b]
let ROCr and addrlib decided whether a pitch is supported.
Then, check if we uses workaround.
Also improve image performance for Navi 1x in some cases.
Change-Id: If8bda46648b23c1dcfa26608ca3bb9cd89fef430
[ROCm/clr commit: b961d4a970]
- Make IPC interfaces generic between devices and rely on the IPC buffer
for attach/detach logic
Change-Id: Id3c18d122030329b7ee532bbb6317de9dd6a0bbe
[ROCm/clr commit: 9aa6f25f1c]
Rename VK interop to ExternalMemory object, since it should handle
DX interops also
Change-Id: I536ec46d3e53ece35234a2e29030393ad411b96d
[ROCm/clr commit: 3e5803c4c0]
Remove amdgpu-pro interface for persistent memory,
used in Liquidflash
Change-Id: I7d1720ad0875a62ebb2d7f96cba39601d560a5df
[ROCm/clr commit: 6dad2fc306]
For OCL, keep original control logic
FOr HIP, keep the fix for SWDEV-338781
Change-Id: I89de8d1e73cd103b3b4f62206eed72d45695dd6e
[ROCm/clr commit: 0a43f6bff3]
The heap must be cleared once per device, but ROCclr doesn't
create a queue per device in HIP. Hence, the clear operation will
be performed during the first queue creation.
Change-Id: I52ceb06d67d11cde6d019c5ab510059f426a9bfb
[ROCm/clr commit: 04bfd93569]
Pass active queue for transfers in the cache coherency layer.
That will allow to use device transfer queue only for
cases when active queue isn't available, because using device
transfer queue from another active queue may cause a deadlock
Change-Id: Ifbe7e0303b77dbf6eeda3939ffbc25a3df7472de
[ROCm/clr commit: 95d55fdfa8]
Current logic when creating a buffer view will end up going into the
allocation block. Even though no memory will be allocated, since
owner()->getSvmPtr() is already allocated, we'll still end up
calling updateFreeMemory().
Checking if we're creating a view, will skip the SVM allocation logic
and let us fall into the actual view creation logic. This won't end up
updating the free memory counter.
Change-Id: I1c260a9ef57895130b272ea1246e06e812b25b37
[ROCm/clr commit: f167136918]
- Don't notify if the batch is empty, because that means
the current command was processed already.
- Disable pinning optimization to avoid a race condition on stall.
- TS marker submition requires extra AQL barrier
to track the status.
Change-Id: I17eff4ad12ac66cfe1bb44048bebb1891805279d
[ROCm/clr commit: 24299e25bd]
1. Fix the size of the memory when releasing.
2. Make sure we only count the device memory
Change-Id: Ib4dcda79f313c4ee9cc1c7bab53f8076bce5f583
[ROCm/clr commit: 639d67866c]
- Correct GSL path to report targets using the TargetID syntax.
- Correct GSL path to check compatibility of code objects when
loading.
- Add concept of an device isa and create a registery used by ROCm,
PAL and GSL.
- Support XNACK and SRAMECC target features consistently for PAL and ROCm.
- Correct logic for NullDevices and asserts to avoid memory coruption.
- Allow all NullDevices to be created for HIP.
- Numerous other code improvements.
Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e
[ROCm/clr commit: c7e8d91e14]
HMM with xnack enabled should automatically update page tables,
but currently it doesn't perform that. For now, runtime will
force page table update on all devices unconditionally.
Change-Id: Idfa6e1c145e6c114856214dce042b8a8349e5c58
[ROCm/clr commit: 7d3aaa7a39]
Implement the global class for signals tracking per device queue.
Switch to the new tracking mechanism.
Change-Id: I3c4dda04b34e6d18d6a95510d84102909633b415
[ROCm/clr commit: 8698aeef0d]
We unmap a memory with a different pointer.
ROCr runtime might be confused and silently ignore the unmap request
Change-Id: Ic5a1387a426cf02a985a4ef8ff8ff05e6a870cbf
[ROCm/clr commit: e5588f188c]
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.
Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
[ROCm/clr commit: fdef6f722f]
German Andryeyev
kjayapra-amd
Alex Xie
Ajay
Sourabh Betigeri
Anusha GodavarthySurya
Julia Jiang
haoyuan2
Satyanvesh Dittakavi
Sarbojit Sarkar
pghafari
Saleel Kudchadker
Vladislav Sytchenko
Jason Tang
Ravi C Akkenapally
Tony Tye
Tao Sang
Jason Tang