Revīziju grafs

39 Revīzijas

Autors SHA1 Ziņojums Datums
Sean Keely b75a8d9ed0 Allow reducing max occupancy (max scratch waves) when applications request large amounts of scratch.
Also emit error messages to stderr if no async queue error callback was registered and queue fault messages are enabled (on by default).
Queue fault messages are controlled with env key HSA_ENABLE_QUEUE_FAULT_MESSAGE.

Change-Id: I496487b8d048b83aa95b9784e92928211f167b17


[ROCm/ROCR-Runtime commit: 0e17cc2887]
2016-12-20 16:52:59 -06:00
James Edwards e0576546f9 Readme and comment updates to ROCm 1.4
Change-Id: I2864a9c475b9ceb2fa08bfc35999c7e0e043b26d


[ROCm/ROCR-Runtime commit: 433a3bcde8]
2016-12-16 11:43:36 -06:00
Konstantin Zhuravlyov 578c17681b Revert "Bring loader in sync with stg/sc"
This reverts commit cdcc5ec921.

Change-Id: If99e8cc9e2afb525f690e49eb6538d8e950a5615


[ROCm/ROCR-Runtime commit: 08aded148a]
2016-12-14 15:14:36 -05:00
Konstantin Zhuravlyov cdcc5ec921 Bring loader in sync with stg/sc
Change-Id: I684522c442de0872007a7e4da8919067fc7b42b3


[ROCm/ROCR-Runtime commit: c798c60343]
2016-12-13 16:30:25 -05:00
Ramesh Errabolu a4c8e0fdca Per review comments
Change-Id: I44585a6dcf3c4f0ce10f0e895270c113790e0652


[ROCm/ROCR-Runtime commit: 935c1b0ba9]
2016-11-28 12:41:32 -06:00
Ramesh Errabolu e3d8eac639 Initial set of changes for ThreadTrace
Change-Id: I07ce31f9b4f508cef0fc9ca6dadcf26b6c90361e


[ROCm/ROCR-Runtime commit: eb2efb83d1]
2016-11-21 23:40:56 -06:00
Konstantin Zhuravlyov 05a7b5a9e4 Remove load_legacy parameter + change prefix for some loaded code object queries back to AMD
Change-Id: I74e905abd77dab3a7a00b5ced94cd9b5130365c5


[ROCm/ROCR-Runtime commit: 4b86843409]
2016-11-20 13:46:17 -05:00
Sean Keely 2e8c176e11 Add InterProcess memory sharing support.
Support is disabled pending KFD / Thunk readiness.

Change-Id: I55def748e3d56cbfcfa6e24983a0ab78567aa81d


[ROCm/ROCR-Runtime commit: 8081758a55]
2016-11-15 18:58:29 -06:00
Sean Keely c9e78a451b Add pointer info support.
Change-Id: I3edcc0bfddbf12465065c9bc3b6565288faff1b8


[ROCm/ROCR-Runtime commit: 9dd76dbeda]
2016-11-11 18:40:16 -06:00
Konstantin Zhuravlyov ee3b926381 Allocate only one segment for code object v2+
Change-Id: I7cd03b5c205d3ea5735f8f29820867ca90ac081b


[ROCm/ROCR-Runtime commit: 54245e064c]
2016-11-03 09:51:11 -04:00
Jay Cornwall c6bfeda697 Fix miscellaneous warnings flagged by Clang
Change-Id: I85a45cb3b44e4379b31bcc56af061fd1571f2af5


[ROCm/ROCR-Runtime commit: c30c25bd30]
2016-10-26 19:26:16 -05:00
James Edwards b9b6f69860 Update runtime CMakeLists.txt and utility files to support top level CMakeLists.txt build.
Change-Id: I4a0eb512af82908a24f2d1964b201c28023ccae5


[ROCm/ROCR-Runtime commit: 809356e0b5]
2016-09-27 11:58:31 -04:00
Jay Cornwall d5ecfae62f Refactor: Consolidate calls to hsaKmtAllocMemory
Route all device-visible system memory allocations through system_allocator.

Change-Id: I5e90a1bf491e432678a6d8ab1f9f3770734cbda1


[ROCm/ROCR-Runtime commit: 74f5aca93d]
2016-08-24 23:57:19 -04:00
Sean Keely 7e2179da7b Update clang-format file to clang-format v3.8.
Format HSA v1.1 core updates.

Change-Id: I540b5c0e5b3ec7522b09c2e070167812b3f17769


[ROCm/ROCR-Runtime commit: 54f1311e01]
2016-08-23 05:50:28 -05:00
Jay Cornwall 53cd59e689 Propagate errors from hsaKmtOpenKFD back to hsa_init
Errors are otherwise silently ignored and hsa_init completes successfully.

Change-Id: Ib1b7dbd7a65d40f869cdbb2792fa97132873d3d7


[ROCm/ROCR-Runtime commit: 0c9f96cfa4]
2016-08-22 17:28:48 -05:00
Konstantin Zhuravlyov e10cd184ef Update code object/isa/loader to hsa v1.1
- Includes Sean's latest changes
- Cleanups/improvements
- Fixes for few bugs that crept over from previous releases

Change-Id: I839dc4895bf13ebd0afc8843424387a9fef667b0


[ROCm/ROCR-Runtime commit: c2c993e0d8]
2016-08-22 15:03:23 -04:00
Konstantin Zhuravlyov 700347b6bf [NFC] Cosmetic improvements:
- Doxygenify comments
  - Match order of implementation with order of declaration

Change-Id: I3c7e486c4dd3616f4b10b2f3e69532a4b5fb9e8e


[ROCm/ROCR-Runtime commit: 01dc3a8ff3]
2016-08-06 14:41:08 -04:00
Jay Cornwall eb8ab3730b Invalidate caches after allocating a code object
Due to a misinterpretation of the HSA specification the microcode has,
until now, been responsible for ensuring a coherent view of the
amd_kernel_code_t object when acquire_fence_scope is set to agent or system.
To correct this the runtime must instead assume this responsibility.

Introduce GpuAgentInt::InvalidateCodeCaches to perform this operation
on-demand. Invoke this after code object allocation. Extend the Queue
implementations to support PM4 command submission, through which the
PM4 command ACQUIRE_MEM can be submitted to perform cache invalidation.
Submit through a runtime-managed queue shared with the blit implementation.

This change depends on microcode support and this is checked against the
running version. Older microcode builds will perform cache invalidation
themselves, so it is acceptable for this change to do nothing in that case.

Change-Id: I268dd2b83af3decdd9ad07430a81df8a2ecb6bd2


[ROCm/ROCR-Runtime commit: f76577ae43]
2016-08-02 13:30:55 -04:00
Jay Cornwall 4723abd67d Separate blit compute interface from queue creation
The runtime needs a queue on which to submit cache management commands.
Device-to-device blit copy already creates a queue unconditionally.
We can share this queue for both purposes.

This change restructures the BlitKernel interface to accept, rather than
create, a queue. GpuAgent creates queues as needed for both cache
management and blit compute.

Fix queue full detection in AcquireWriteIndex (<= vs <).

Change-Id: I61d0c6b9d04f2dba74872f0676ad791435778ba4


[ROCm/ROCR-Runtime commit: f7ab361347]
2016-07-29 09:20:25 -04:00
Jay Cornwall 8fe807f2a9 Replace SP3 dynamic assembly with pre-assembled binaries
This is the first part of transitioning to the LLVM-based assembler.
SP3 is deprecated and all references to the library are removed.
Pending LLVM support, relevant shaders have been precompiled.

Change-Id: I7d44cef5ded1836c4a74b77881af5bea8803d2c1


[ROCm/ROCR-Runtime commit: 712ea75377]
2016-07-16 16:38:32 -05:00
Jay Cornwall a1f109afe7 Recognize all CPU nodes in hsa_signal_create consumer list
On multi-node systems only the first CPU node was recognized in the
signal consumer list, causing fallback to non-interrupt signals.

Change-Id: I9bd0706bafbe046be9d7f210d05fa4cf1fcd16fa


[ROCm/ROCR-Runtime commit: b44417043b]
2016-07-09 18:40:39 -05:00
Ramesh Errabolu d260c22467 Export Amd Extension APIs including support for Version Control
Change-Id: I8c03cbd4049e8115ae00d51f193b9c31ac941f21


[ROCm/ROCR-Runtime commit: 95dc97da7b]
2016-07-06 13:50:18 -05:00
Konstantin Zhuravlyov b43cdae36b Implement new load map API.
Change-Id: I5f148fe66f899b2fa6a2e75430afa988f38db58d

[ROCm/ROCR-Runtime commit: 0e4cab3001]
2016-06-28 11:32:19 -04:00
Besar Wicaksono 2e60df69e4 Add interrupt signal support to SDMA
Change-Id: Ie2b192f3351a0c3bf1eb36ba9704825b18e6059b


[ROCm/ROCR-Runtime commit: aee8ab6ef0]
2016-06-14 14:26:25 -04:00
Besar Wicaksono 7b50eacba5 Blit SDMA support for gfx70x
Change-Id: Ie6f215890553ef41c3f36b349fc9cc39c2d38747


[ROCm/ROCR-Runtime commit: 103cd04236]
2016-06-02 06:18:36 -04:00
Besar Wicaksono 76dea4613a Add profiling support to DMA copy function
Change-Id: Iadeefa2692f35d9305ac1b242284a6220d5830a7


[ROCm/ROCR-Runtime commit: a8b00680b6]
2016-05-26 11:29:29 -04:00
Ramesh Errabolu a09c9bfb04 Refactor Scratch Memory Descriptor Initialization
Change-Id: Ib4a136c266646cc5d5f5afb98f4aaf9266d02072


[ROCm/ROCR-Runtime commit: 383ed6983f]
2016-05-25 22:17:43 -04:00
Besar Wicaksono 520d33a875 Use lazy initialization to create Blit objects
Change-Id: I388865030dc2538c5c881c055e38af52a57f6d87


[ROCm/ROCR-Runtime commit: bc589048a9]
2016-05-20 14:26:06 -04:00
Jay Cornwall 02a67f61c4 Implement optimized blit/fill kernels
Replace HSAIL kernels with SP3 shaders.
Support all alignment variations efficiently.

Change-Id: Icf7f5471f3ba68389f55484d82f2805dd9bc3827


[ROCm/ROCR-Runtime commit: 90ab72cd66]
2016-05-10 21:51:57 -05:00
Besar Wicaksono (xN/A) TX [TEXT] 4b44183941 Fix query HSA_AMD_AGENT_MEMORY_POOL_INFO_LINK_INFO
Querying HSA_AMD_AGENT_MEMORY_POOL_INFO_LINK_INFO between a gpu agent
and its own local memory pool returns a wrong information.
Fix: return link with 0 hop count.

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1257544]


[ROCm/ROCR-Runtime commit: 5a584fa1ab]
2016-04-13 12:39:25 -05:00
Besar Wicaksono (xN/A) TX [TEXT] 02b6c65740 Sdma wraparound optimization.
Remove mutex and just make the thread spin again if the queue is wrapping.
Remove the wait for the queue to finish wrapping, and just check if there is enough space to recycle when reserving queue space.

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1256713]


[ROCm/ROCR-Runtime commit: ea67bb8374]
2016-04-11 18:31:45 -05:00
Besar Wicaksono (xN/A) TX [TEXT] c8f0efbee1 Add global memory clock and width info on the agent attribute list and deprecate the ones in the memory region attribute list.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1256098]


[ROCm/ROCR-Runtime commit: 4ccc695b95]
2016-04-08 16:29:10 -05:00
Nikolay Haustov [TEXT] 6b9e626507 Cherry-pick CL 1250286 from SC stg.
HSA Finalizer: Add dumping of code object, ISA and executable to loader.

This is controlled by loader options -dump-all, -dump-isa, -dump-code, -dump-exec

The options can now also be set with env variable LOADER_OPTIONS_APPEND.

Added tests to finalizer_offline

Testing: smoke, dumping on hardware

Reviewed by: Konstantin Zhuravlyov

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1255351]


[ROCm/ROCR-Runtime commit: a795909bca]
2016-04-07 06:01:20 -05:00
Besar Wicaksono (xN/A) TX [TEXT] b156bd28b9 Cleanup TODO format
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1255182]


[ROCm/ROCR-Runtime commit: 823c254d61]
2016-04-06 16:50:50 -05:00
Besar Wicaksono (xN/A) TX [TEXT] 2caa405817 Add environment flag to enable sdma workaround that will wait for the sdma queue to be idle before updating the write pointer. Add class to manage environment flags.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1254004]


[ROCm/ROCR-Runtime commit: c95f96a9e4]
2016-04-01 17:13:45 -05:00
Zhuravlyov, Konstantin (x21446) MA 92a990b426 Clean up extensions and provide public extension/API to query host address given device address:
- Partially remove 'amd_load_map' extension because it is not used and will not be used
- Remove 'hsa_amd_query_kernel_host_address' API
- Add 'hsa_ext_amd_loaded_code_object' extension
- Add 'hsa_ext_amd_loaded_code_object_query_host_address' API
	- Most likely to be used by debugger, profiler, and hcc (printf)
- Update affected sources
	- 'hsa_system_extension_supported'
	- 'hsa_system_get_extension_table'
	- SoftCP path
- Integrate CLs 1250699, 1251204, 1251214 from stg sc

ReviewBoardURL: http://ocltc.amd.com/reviews/r/10091/
Testing: smoke (ok), teamcity (ok), samples on fiji (AQL and SoftCP) (ok)

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1251223]


[ROCm/ROCR-Runtime commit: f6565a2f70]
2016-03-24 19:00:30 -05:00
James Edwards (xN/A) TX 8504fcb6ca Separate open source core runtime code from DK makefiles.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1250152]


[ROCm/ROCR-Runtime commit: 7d2bc9d113]
2016-03-22 18:10:13 -05:00
James Edwards (xN/A) TX 6da3325470 Remove opensrc test files.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1249961]


[ROCm/ROCR-Runtime commit: 7d1e6c3a57]
2016-03-22 13:39:51 -05:00
James Edwards (xN/A) TX 67e6064a6a Check open source core runtime code into perforce. This includes license and README files.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1249136]


[ROCm/ROCR-Runtime commit: c9ffe0004e]
2016-03-20 15:39:40 -05:00