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Galantsev, Dmitrii c00b9ee7df Merge amd-staging into amd-master 20231205
Change-Id: Ib8b0672f8993cfd995d567f582dd9b33d03ddac4
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rocm_smi_lib commit: 1ae7164f20]
2023-12-05 10:28:15 -06:00
Galantsev, Dmitrii 1ae7164f20 Merge amd-staging into amd-master 20231205
Change-Id: Ib8b0672f8993cfd995d567f582dd9b33d03ddac4
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2023-12-05 10:28:15 -06:00
Ioannis Assiouras 4a96c2fe15 SWDEV-435715 - Acquire the streamSetLock prior to iterating the set in WaitActiveStreams
Change-Id: I0a9721dcde1a3716192d532e290d8a7afc8ac9fc


[ROCm/clr commit: 3c6505c2d5]
2023-12-05 04:12:24 -05:00
Ioannis Assiouras 3c6505c2d5 SWDEV-435715 - Acquire the streamSetLock prior to iterating the set in WaitActiveStreams
Change-Id: I0a9721dcde1a3716192d532e290d8a7afc8ac9fc
2023-12-05 04:12:24 -05:00
Satyanvesh Dittakavi 6259d20646 SWDEV-419480 - Disable the hiprtc std headers test
The corresponding change https://gerrit-git.amd.com/c/compute/ec/clr/+/940530
in clr is being reverted. This test can be enabled when this change
is reintroduced.

Change-Id: I7787d576b59b9000d43042ec5553219e748b0ae0


[ROCm/hip-tests commit: 4a60fe5fd1]
2023-12-05 08:09:56 +00:00
Satyanvesh Dittakavi 4a60fe5fd1 SWDEV-419480 - Disable the hiprtc std headers test
The corresponding change https://gerrit-git.amd.com/c/compute/ec/clr/+/940530
in clr is being reverted. This test can be enabled when this change
is reintroduced.

Change-Id: I7787d576b59b9000d43042ec5553219e748b0ae0
2023-12-05 08:09:56 +00:00
Satyanvesh Dittakavi 85e9925335 Revert "SWDEV-431175 - Remove datatypes from HIPRTC"
This reverts commit 6035b47801.

Reason for revert: This is considered a breaking change and requires
multiple apps to change their behavior. This will be reintroduced in later releases.

Change-Id: I0354ce4e0f5e6c402499a7a8c2aaf43bf5b1bfc7


[ROCm/clr commit: 270c6d48f1]
2023-12-05 02:32:38 -05:00
Satyanvesh Dittakavi 270c6d48f1 Revert "SWDEV-431175 - Remove datatypes from HIPRTC"
This reverts commit 629e279f72.

Reason for revert: This is considered a breaking change and requires
multiple apps to change their behavior. This will be reintroduced in later releases.

Change-Id: I0354ce4e0f5e6c402499a7a8c2aaf43bf5b1bfc7
2023-12-05 02:32:38 -05:00
Jaydeep Patel 0d74d8b187 SWDEV-430911 - Force SDMA only if explicitly specified & pick appropriate engine.
Change-Id: Ib34fa6b2782f74b753899fa8fddff646dc60c8ce


[ROCm/clr commit: 3daf8b334a]
2023-12-04 21:58:47 -05:00
Jaydeep Patel 3daf8b334a SWDEV-430911 - Force SDMA only if explicitly specified & pick appropriate engine.
Change-Id: Ib34fa6b2782f74b753899fa8fddff646dc60c8ce
2023-12-04 21:58:47 -05:00
Oliveira, Daniel e2a833f347 rocm_smi_lib: Fix GPU Metrics Max Elements Read Exceeded
Code changes related to the following:
  * Check smallest copy size for multi-valued metrics
  * Unit tests: gpu_metric_read
  * ROCMSMI examples

Build changes related to the following:
  * CMakeLists.txt

Change-Id: Ieb2363020fa21c93fbacd0edcc1d394eed183051
Signed-off-by: Oliveira, Daniel <daniel.oliveira@amd.com>


[ROCm/rocm_smi_lib commit: 8e0d3d5a39]
2023-12-04 17:01:08 -06:00
Oliveira, Daniel 8e0d3d5a39 rocm_smi_lib: Fix GPU Metrics Max Elements Read Exceeded
Code changes related to the following:
  * Check smallest copy size for multi-valued metrics
  * Unit tests: gpu_metric_read
  * ROCMSMI examples

Build changes related to the following:
  * CMakeLists.txt

Change-Id: Ieb2363020fa21c93fbacd0edcc1d394eed183051
Signed-off-by: Oliveira, Daniel <daniel.oliveira@amd.com>
2023-12-04 17:01:08 -06:00
Ioannis Assiouras 73c249bb59 SWDEV-435168 - Added virtual destructor in StreamCallback
Change-Id: I548f34e4f4208658a5a6c35927fc424415186354


[ROCm/clr commit: 8a53c97fd1]
2023-12-04 17:32:45 -05:00
Ioannis Assiouras 8a53c97fd1 SWDEV-435168 - Added virtual destructor in StreamCallback
Change-Id: I548f34e4f4208658a5a6c35927fc424415186354
2023-12-04 17:32:45 -05:00
Gopesh Bhardwaj 4e9dc3417f Getting Started docs for samples and tools (#261)
* getting started for amples and tools

* Adding getting started to documentation

* Addressing review comments

* minor update

* renaming rocprofv2 to rocprofv3 in doc

* Apply suggestions from code review

---------

Co-authored-by: Jonathan R. Madsen <jrmadsen@users.noreply.github.com>

[ROCm/rocprofiler-sdk commit: 5c42d7d82a]
2023-12-04 16:22:18 -06:00
Gopesh Bhardwaj 5c42d7d82a Getting Started docs for samples and tools (#261)
* getting started for amples and tools

* Adding getting started to documentation

* Addressing review comments

* minor update

* renaming rocprofv2 to rocprofv3 in doc

* Apply suggestions from code review

---------

Co-authored-by: Jonathan R. Madsen <jrmadsen@users.noreply.github.com>
2023-12-04 16:22:18 -06:00
Galantsev, Dmitrii ed3cfffd7e Server - Add -a/--address option
Change-Id: Ia9e8d76b9a4ba0aadc567142601a87f0ad0b69e4
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2023-12-04 15:26:44 -06:00
Galantsev, Dmitrii 45d7a2df04 Server - Add -a/--address option
Change-Id: Ia9e8d76b9a4ba0aadc567142601a87f0ad0b69e4
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rdc commit: ed3cfffd7e]
2023-12-04 15:26:44 -06:00
Giovanni LB f13f221780 Att param as unsigned integer
Change-Id: I4cd611c5e60e7c22d17c657a8ea5663dfb57e781
2023-12-04 15:23:48 -05:00
Giovanni LB 3615f5e3af Att param as unsigned integer
Change-Id: I4cd611c5e60e7c22d17c657a8ea5663dfb57e781


[ROCm/rocprofiler commit: f13f221780]
2023-12-04 15:23:48 -05:00
Jonathan R. Madsen 7ff6b6db7b Update documentation (#275)
- finished most of the TODOs

[ROCm/rocprofiler-sdk commit: 1c02e7a92a]
2023-12-04 13:43:22 -06:00
Jonathan R. Madsen 1c02e7a92a Update documentation (#275)
- finished most of the TODOs
2023-12-04 13:43:22 -06:00
Jonathan R. Madsen 27eb0516bb rocprofiler-register updates
- fix logic for using HSA_TOOLS_LIB when rocprofiler-register support is enabled
- report tool load failure for rocprofiler-register

Change-Id: Ife23aa3e6ed19174376cd694764583b73f8976cd
2023-12-04 11:44:58 -06:00
Jonathan R. Madsen a66287197e rocprofiler-register updates
- fix logic for using HSA_TOOLS_LIB when rocprofiler-register support is enabled
- report tool load failure for rocprofiler-register

Change-Id: Ife23aa3e6ed19174376cd694764583b73f8976cd


[ROCm/ROCR-Runtime commit: 27eb0516bb]
2023-12-04 11:44:58 -06:00
German a414a5c7a3 SWDEV-435015 - Disable sysmem allocation in abstraction layer
Change-Id: Idefdabd2997d618b962c42545ae67768c628c5d6


[ROCm/clr commit: 01217d0383]
2023-12-04 11:40:28 -05:00
German 01217d0383 SWDEV-435015 - Disable sysmem allocation in abstraction layer
Change-Id: Idefdabd2997d618b962c42545ae67768c628c5d6
2023-12-04 11:40:28 -05:00
Giovanni LB ce9a578350 Adding file mode availability check
Change-Id: I586556a998996c0117d35d966dadf5490831bffb
2023-12-04 13:08:37 -03:00
Giovanni LB d4a2b49f86 Adding file mode availability check
Change-Id: I586556a998996c0117d35d966dadf5490831bffb


[ROCm/rocprofiler commit: ce9a578350]
2023-12-04 13:08:37 -03:00
David Yat Sin 251601b20b Add RISC-V support
Patch provided by user Xeonacid via github:
https://github.com/RadeonOpenCompute/ROCR-Runtime/pull/172/

Change-Id: I5f9086b536383093e7995b9cfdc19dab213f0265
2023-12-04 15:05:22 +00:00
David Yat Sin 38ce852b12 Add RISC-V support
Patch provided by user Xeonacid via github:
https://github.com/RadeonOpenCompute/ROCR-Runtime/pull/172/

Change-Id: I5f9086b536383093e7995b9cfdc19dab213f0265


[ROCm/ROCR-Runtime commit: 251601b20b]
2023-12-04 15:05:22 +00:00
David Yat Sin f07b8f2250 Use CPU_SET_S instead of CPU_SET
Fix incorrect use of CPU_SET on variable size cpu_set_t

Suggested by Christopher E. Moore on github
https://github.com/RadeonOpenCompute/ROCR-Runtime/issues/130

Change-Id: I710b56683ba07c08dcd83c851bf72e4f127a0ad4
2023-12-04 15:05:22 +00:00
David Yat Sin d81bf9cd57 Use CPU_SET_S instead of CPU_SET
Fix incorrect use of CPU_SET on variable size cpu_set_t

Suggested by Christopher E. Moore on github
https://github.com/RadeonOpenCompute/ROCR-Runtime/issues/130

Change-Id: I710b56683ba07c08dcd83c851bf72e4f127a0ad4


[ROCm/ROCR-Runtime commit: f07b8f2250]
2023-12-04 15:05:22 +00:00
Giovanni LB e0c6c5e5bf Extending AQLprofile API to include counter dimensions
Change-Id: If59489a085959f3f765a30e3e445df5151e30350
2023-12-04 15:05:22 +00:00
Giovanni LB ecd768797e Extending AQLprofile API to include counter dimensions
Change-Id: If59489a085959f3f765a30e3e445df5151e30350


[ROCm/ROCR-Runtime commit: e0c6c5e5bf]
2023-12-04 15:05:22 +00:00
David Yat Sin a7a3358067 Implement alternate scratch
The alternate scratch memory is used for dispatches that have a low
number of waves but relatively large wave size.
This allows us to keep the tmpring_size.bits.WAVES field of the main
scratch to full occupancy.

Change-Id: I32d240fac4b7d38200d1eebc1b0fdc8a823920d3
2023-12-04 15:05:22 +00:00
David Yat Sin 6140d8a66d Implement alternate scratch
The alternate scratch memory is used for dispatches that have a low
number of waves but relatively large wave size.
This allows us to keep the tmpring_size.bits.WAVES field of the main
scratch to full occupancy.

Change-Id: I32d240fac4b7d38200d1eebc1b0fdc8a823920d3


[ROCm/ROCR-Runtime commit: a7a3358067]
2023-12-04 15:05:22 +00:00
David Yat Sin dca8f3a21d Implement async scratch reclaim
For devices where the CP FW supports asynchronous scratch reclaim, ROCr
is able to claw-back scratch memory that was assigned to an AQL queue.
With that ability, ROCr does not have to rely on using USO
(use-scratch-once) when assigning large amounts of memory to a queue.
If we reach a situation where we are running low on device memory, ROCr
will attempt to claw-back the scratch memory.

Change-Id: Iddf8ec84e37ab8b9fdc58bafbe2b61fe2acb6eb7
2023-12-04 15:05:22 +00:00
David Yat Sin 66b9fdc2d6 Implement async scratch reclaim
For devices where the CP FW supports asynchronous scratch reclaim, ROCr
is able to claw-back scratch memory that was assigned to an AQL queue.
With that ability, ROCr does not have to rely on using USO
(use-scratch-once) when assigning large amounts of memory to a queue.
If we reach a situation where we are running low on device memory, ROCr
will attempt to claw-back the scratch memory.

Change-Id: Iddf8ec84e37ab8b9fdc58bafbe2b61fe2acb6eb7


[ROCm/ROCR-Runtime commit: dca8f3a21d]
2023-12-04 15:05:22 +00:00
David Yat Sin 64070a9acc Refactor scratch handler function
Separate the event handler and scratch handler portions of the code into
separate functions.

Change-Id: Ifdb7461e816b0f2d3c1c0a74d6f020b4d6fc736c
2023-12-04 15:05:22 +00:00
David Yat Sin fa600434ee Refactor scratch handler function
Separate the event handler and scratch handler portions of the code into
separate functions.

Change-Id: Ifdb7461e816b0f2d3c1c0a74d6f020b4d6fc736c


[ROCm/ROCR-Runtime commit: 64070a9acc]
2023-12-04 15:05:22 +00:00
David Yat Sin fa317f8c41 Re-arrange and rename scratch elements that are used with main scratch
Change-Id: I4c1ff8cf4121a06b586fe49c70400226506bf95e
2023-12-04 15:05:22 +00:00
David Yat Sin b1942bff27 Re-arrange and rename scratch elements that are used with main scratch
Change-Id: I4c1ff8cf4121a06b586fe49c70400226506bf95e


[ROCm/ROCR-Runtime commit: fa317f8c41]
2023-12-04 15:05:22 +00:00
David Yat Sin 0344c8c0b6 Update queue structure to support async reclaim
Update queue structure to add members required for asynchronous reclaim
mechanism and dual-scratch. CP will set the AMD_QUEUE_CAPS_ASYNC_RECLAIM
bit on queue-connect to indicate whether the new features are supported.

The new members are ignored by previous versions of CP FW

Change-Id: Ic8e9ef41c5b1d04f09b43bc9b44b31527863d10f
2023-12-04 15:05:22 +00:00
David Yat Sin 03e87e3d66 Update queue structure to support async reclaim
Update queue structure to add members required for asynchronous reclaim
mechanism and dual-scratch. CP will set the AMD_QUEUE_CAPS_ASYNC_RECLAIM
bit on queue-connect to indicate whether the new features are supported.

The new members are ignored by previous versions of CP FW

Change-Id: Ic8e9ef41c5b1d04f09b43bc9b44b31527863d10f


[ROCm/ROCR-Runtime commit: 0344c8c0b6]
2023-12-04 15:05:22 +00:00
Shweta Khatri acf9e95027 Revert "Restore default code object version usage for ROCr and ROCr Test"
This reverts commit 6ef7fcedd1290b59190f81df1d25142ecb05d282.

Change-Id: Icc0300c25a89fcb99287d013863a00ace7e12129
2023-12-04 15:03:31 +00:00
Shweta Khatri 43f1ee386f Revert "Restore default code object version usage for ROCr and ROCr Test"
This reverts commit 6ef7fcedd1290b59190f81df1d25142ecb05d282.

Change-Id: Icc0300c25a89fcb99287d013863a00ace7e12129


[ROCm/ROCR-Runtime commit: acf9e95027]
2023-12-04 15:03:31 +00:00
Lancelot SIX 6916ce358a trap_handler: Fix handling of debugtrap for gfx11
For gfx11, the trap_handler fails to recognize a trap id 3 and report
the exception to the debugger if the debugger is attached.

This is because the 2nd level trap handler looks for the DEBUG_ENABLED
bit in ttmp13 instead of ttmp11.  This bit is set by the 1st level trap
handler and is part of the 1st/2nd level trap handler ABI.

Change-Id: Ib36361f53d9bcbbed52320d8c3a9ab2c0b28c7cd
2023-12-04 15:03:31 +00:00
Lancelot SIX 9ae972cf1e trap_handler: Fix handling of debugtrap for gfx11
For gfx11, the trap_handler fails to recognize a trap id 3 and report
the exception to the debugger if the debugger is attached.

This is because the 2nd level trap handler looks for the DEBUG_ENABLED
bit in ttmp13 instead of ttmp11.  This bit is set by the 1st level trap
handler and is part of the 1st/2nd level trap handler ABI.

Change-Id: Ib36361f53d9bcbbed52320d8c3a9ab2c0b28c7cd


[ROCm/ROCR-Runtime commit: 6916ce358a]
2023-12-04 15:03:31 +00:00
Lang Yu 991bbdcf24 Revert "Revert "Add support for GC 11.5.0 and 11.5.1""
This reverts commit ebc51dd0eb.

gfx1150/1151 is merged into mainline now.

Change-Id: Id179949318a37888c74abb5a8610d95bc2f22906
2023-12-04 15:03:31 +00:00
Lang Yu 43ae931ad5 Revert "Revert "Add support for GC 11.5.0 and 11.5.1""
This reverts commit a8e34eaec8.

gfx1150/1151 is merged into mainline now.

Change-Id: Id179949318a37888c74abb5a8610d95bc2f22906


[ROCm/ROCR-Runtime commit: 991bbdcf24]
2023-12-04 15:03:31 +00:00