Since access may only be manipulated on whole pages, suballocator fragments must cooperate to set the page's access.
Since the KFD does not migrate memory on access changes this implementation makes agent access sticky across the requests in a fragmented page.
Change-Id: I88479ed45fb40e9782b704526a7b8ffb22e7bd76
[ROCm/ROCR-Runtime commit: e9a6f2c3e6]
Track pointer info for sub 2MB fragment allocations in allocation_map_.
Add fragment support to IPC.
Change-Id: I00cfc2e2fa289aac90a4718c392f9bb056a61a87
[ROCm/ROCR-Runtime commit: 117be0b55a]
Added an API for creating signals with attributes.
Added two APIs for IPC operations on signals.
Initial use of exceptions for error handling.
Add ref counting to signals.
Removed spin loops from signal destructors.
Signals are no longer to be destroyed with delete, use DeleteSignal instead.
Added delete safety to doorbells.
Added secondary hsa_signal_t -> Signal* translation path for IPC enabled signals.
Change-Id: Id59065d002f0c2566b0a9425694da2ed27cb7d7f
[ROCm/ROCR-Runtime commit: c9642cf7af]
Also separate signal ABI block allocations from the runtime interface object.
Change-Id: If16763338db664f29163a1348f8f4c38cf0597b2
[ROCm/ROCR-Runtime commit: 2732b18092]
1. Correct amd::AqlQueue::ExecutePM4 to support interception.
2. Minor fixes to AqlPacket and SoftCP.
3. Minimal change to disable interception of runtime internal queues.
Change-Id: I103fece2ebf9a188d27f01e61221c737405d7253
[ROCm/ROCR-Runtime commit: bc0bd00746]
When a fatal memory fault occurs the scheduler context-saves all queues
in the process and notifies the runtime through the memory event. The
saved state contains all GPR/LDS data at the moment of the fault.
Retrieve this state and present it to the user if HSA_DEBUG_FAULT is set
to "analyze" and the wavefront caused the fault. If amdgcn-capable objdump
is in the PATH invoke this to disassemble code around the PC.
Queue lifetime is now managed by the runtime to allow querying the
context save state for all active queues.
Change-Id: I6fee662fad1c4f9aa125bf5c53d7d0ea1ab32f95
[ROCm/ROCR-Runtime commit: 75c9506f9d]
The trap protocol changed between gfx8 and gfx9. The return address
is in trap temporaries [0,1] on gfx9 rather than [4,5] on gfx8.
Unfortunately SP3 changes the meaning of the ttmp register aliases
in gfx9, further confusing the issue.
Clean up later when LLVM assembly build is introduced to the runtime.
Change-Id: I84ea9bf3736f060dd95d0361f9d5a0f9a3576178
[ROCm/ROCR-Runtime commit: f0a1c7c4c6]
When a new enough microcode build is running use a vendor AQL packet
to submit the PM4 IB.
Change-Id: Icd3e2b322c418477420ba4a29f4455ce340ef0d2
[ROCm/ROCR-Runtime commit: 4d62b9482a]
Gfx9 requires monotonic write pointer and doorbell.
Cound fields are 1-based compared with 0-based pre-Gfx9.
- Restructure implementation to use monotonic ring indices
- Remove redundant submission size checks (handled by AcquireWriteAddress)
- Unify copy/fill per-command limit (documentation is unclear)
Change-Id: I57c1675221d2e63aa319fee700d9951671e1bd65
[ROCm/ROCR-Runtime commit: 1cd46afe6d]
Currently HSA HW Profiler is failing to build due to this patch
This reverts commit 91866d4bbb.
Change-Id: Iabb2b958f33ba614a24b61bb370905b3b7362708
[ROCm/ROCR-Runtime commit: 5162a76616]
Initial work to import the latest (1.1) hsa_ext_image extension.
Change-Id: I4d55adb09ba4d4dbd43d47a4bc54077d4bc531d2
[ROCm/ROCR-Runtime commit: e0ce8855dd]
Also emit error messages to stderr if no async queue error callback was registered and queue fault messages are enabled (on by default).
Queue fault messages are controlled with env key HSA_ENABLE_QUEUE_FAULT_MESSAGE.
Change-Id: I496487b8d048b83aa95b9784e92928211f167b17
[ROCm/ROCR-Runtime commit: 0e17cc2887]
Route all device-visible system memory allocations through system_allocator.
Change-Id: I5e90a1bf491e432678a6d8ab1f9f3770734cbda1
[ROCm/ROCR-Runtime commit: 74f5aca93d]
- Includes Sean's latest changes
- Cleanups/improvements
- Fixes for few bugs that crept over from previous releases
Change-Id: I839dc4895bf13ebd0afc8843424387a9fef667b0
[ROCm/ROCR-Runtime commit: c2c993e0d8]
- Doxygenify comments
- Match order of implementation with order of declaration
Change-Id: I3c7e486c4dd3616f4b10b2f3e69532a4b5fb9e8e
[ROCm/ROCR-Runtime commit: 01dc3a8ff3]
Due to a misinterpretation of the HSA specification the microcode has,
until now, been responsible for ensuring a coherent view of the
amd_kernel_code_t object when acquire_fence_scope is set to agent or system.
To correct this the runtime must instead assume this responsibility.
Introduce GpuAgentInt::InvalidateCodeCaches to perform this operation
on-demand. Invoke this after code object allocation. Extend the Queue
implementations to support PM4 command submission, through which the
PM4 command ACQUIRE_MEM can be submitted to perform cache invalidation.
Submit through a runtime-managed queue shared with the blit implementation.
This change depends on microcode support and this is checked against the
running version. Older microcode builds will perform cache invalidation
themselves, so it is acceptable for this change to do nothing in that case.
Change-Id: I268dd2b83af3decdd9ad07430a81df8a2ecb6bd2
[ROCm/ROCR-Runtime commit: f76577ae43]
The runtime needs a queue on which to submit cache management commands.
Device-to-device blit copy already creates a queue unconditionally.
We can share this queue for both purposes.
This change restructures the BlitKernel interface to accept, rather than
create, a queue. GpuAgent creates queues as needed for both cache
management and blit compute.
Fix queue full detection in AcquireWriteIndex (<= vs <).
Change-Id: I61d0c6b9d04f2dba74872f0676ad791435778ba4
[ROCm/ROCR-Runtime commit: f7ab361347]
This is the first part of transitioning to the LLVM-based assembler.
SP3 is deprecated and all references to the library are removed.
Pending LLVM support, relevant shaders have been precompiled.
Change-Id: I7d44cef5ded1836c4a74b77881af5bea8803d2c1
[ROCm/ROCR-Runtime commit: 712ea75377]
On multi-node systems only the first CPU node was recognized in the
signal consumer list, causing fallback to non-interrupt signals.
Change-Id: I9bd0706bafbe046be9d7f210d05fa4cf1fcd16fa
[ROCm/ROCR-Runtime commit: b44417043b]
Querying HSA_AMD_AGENT_MEMORY_POOL_INFO_LINK_INFO between a gpu agent
and its own local memory pool returns a wrong information.
Fix: return link with 0 hop count.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1257544]
[ROCm/ROCR-Runtime commit: 5a584fa1ab]
Remove mutex and just make the thread spin again if the queue is wrapping.
Remove the wait for the queue to finish wrapping, and just check if there is enough space to recycle when reserving queue space.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1256713]
[ROCm/ROCR-Runtime commit: ea67bb8374]
HSA Finalizer: Add dumping of code object, ISA and executable to loader.
This is controlled by loader options -dump-all, -dump-isa, -dump-code, -dump-exec
The options can now also be set with env variable LOADER_OPTIONS_APPEND.
Added tests to finalizer_offline
Testing: smoke, dumping on hardware
Reviewed by: Konstantin Zhuravlyov
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1255351]
[ROCm/ROCR-Runtime commit: a795909bca]
Sean Keely
Evgeny
Kenny Ho
Jay Cornwall
Christophe Paquot
Konstantin Zhuravlyov
Kent Russell
James Edwards
Ramesh Errabolu
Besar Wicaksono
Nikolay Haustov [TEXT]