Commit Graph

306 Commits

Author SHA1 Message Date
Manocha, Rahul 4a93a614e5 SWDEV-539710 - Defer allocation of managed variable (#652)
Co-authored-by: Rahul Manocha <rmanocha@amd.com>

[ROCm/clr commit: 3f6f9d6081]
2025-07-31 08:30:23 -07:00
Betigeri, Sourabh 680c7fbf64 SWDEV-483895 - Use ROCr to reserve memory for HMM (#590)
[ROCm/clr commit: a1f056bd11]
2025-07-15 21:40:13 +05:30
Sang, Tao a777d6eca0 SWDEV-539145 - Simplify host memory pool management (#668)
* SWDEV-539145 - Simplify host memory pool management

Remove unnecessary variables and functions.
Make code simpler and clear.

* Change cpu_agent_info_ into pointer.

* Restore getPreferredNumaNode()

[ROCm/clr commit: 1351cd7fa8]
2025-07-11 10:38:40 -04:00
Sang, Tao 7fd322af90 SWDEV-508776 - support VGPRs validation (#274)
Clarify some VGPRs terms description.
Fix some wrong query logics of availableVGPRs_ and
availableRegistersPerCU_ in device info.
Add hipDeviceAttributeMaxAvailableVgprsPerThread
attribute query.
Remove hardcoding of following
 info_.vgprAllocGranularity_
 info_.vgprsPerSimd_

[ROCm/clr commit: 397f303d97]
2025-07-09 10:46:52 -04:00
Xie, Pengda 8e5921174f SWDEV-540576 - Abort if user request a core dump (#653)
* SWDEV-539414 - Return error status from runtime handler when HIP_SKIP_ABORT_ON_GPU_ERROR is false

* SWDEV-539414 - default handler when GPU core file is generated

* SWDEV-540576 - Abort if user request a core dump

Change-Id: I9e2c640acf559880bd13641de9103e660ef822a3

---------

Co-authored-by: Assiouras, Ioannis <Ioannis.Assiouras@amd.com>
Co-authored-by: agunashe <ajay.gunashekar@amd.com>

[ROCm/clr commit: 9c1bff0ae7]
2025-07-03 00:29:14 +05:30
Sang, Tao 287ec83f5c SWDEV-539145 - Support extended fine grained system memory pool (#603)
* Add hipHostMalloc() new flag hipHostMallocUncached which will force to allocate pinned
host memory on extended fine grained system memory pool.
* Add hipHostAlloc() new flag hipHostAllocUncached which will force to allocate pinned
host memory on extended fine grained system memory pool.
* Add hipHostRegister() new flag hipHostRegisterUncached which will force to map
host memory onto extended fine grained system momory pool.

[ROCm/clr commit: a7d7687b8f]
2025-07-01 10:10:10 +05:30
Sang, Tao da7c6f57ef SWDEV-539399 - Support ROCCLR_MEM_HSA_CONTIGUOUS (#610)
Fix missing support of ROCCLR_MEM_HSA_CONTIGUOUS in
hipExtMallocWithFlags().

[ROCm/clr commit: f4d78d427c]
2025-06-26 14:05:23 -04:00
Kudchadker, Saleel 3c9f80b4e4 SWDEV-535490 - Improve logging (#441)
- Include HIP version/githash in the logs
- Add a new method to print library path

[ROCm/clr commit: 5d53c83806]
2025-06-24 13:00:00 -07:00
Andryeyev, German fc2f5aaf22 SWDEV-533074 - Expose hipDeviceAttributeNumberOfXccs attribute (#336)
[ROCm/clr commit: 5cc172c99c]
2025-05-21 22:35:42 +05:30
Jayaprakash, Karthik a17e22a78c SWDEV-529929 - hipMemGetHandleForAddressRange implementation. (#245)
[ROCm/clr commit: 12131de4a9]
2025-05-20 15:56:04 -04:00
Jayaprakash, Karthik 4ea2d9a5ee SWDEV-531711 - Report correct error code based on device failure. (#286)
[ROCm/clr commit: f5b8db33f1]
2025-05-17 06:33:13 -04:00
Assiouras, Ioannis 4efd624960 SWDEV-525593, SWDEV-527293 - Acquire active queue after xferQueue is created (#165)
For xferQueue VirtualGPU::create is called after ProfilingBegin
so the active queue needs to be acquired.

[ROCm/clr commit: d3fb8eda8b]
2025-04-30 09:21:11 +01:00
Jiang, Julia 6ab34e0924 SWDEV-522634 - Fix device properties in hipInfo (#203)
[ROCm/clr commit: eb62fe9f62]
2025-04-29 11:29:47 -04:00
Jayaprakash, Karthik 49a527c826 SWDEV-506467 - Skip Abort in case of crash from the device. (#60)
Change-Id: I964b2f2647d068202e9c38fcddb1337da754df8d

[ROCm/clr commit: b2388dfb88]
2025-04-29 11:19:02 +05:30
Kudchadker, Saleel cd14def193 SWDEV-521647 - Fix tracking of hw_event (#206)
- When a command may possibly have two packets(like device heap
  initializer), and if there is no signal on the main kernel packet the
tracking was broken as it marked HW event of the command as the first
packet signal.
- Make sure if no completion signal is attached to the second packet
  then clear the HW event for the command.

[ROCm/clr commit: 072fb0804e]
2025-04-25 08:46:44 -07:00
Sang, Tao a9068182f4 SWDEV-493275 - Support scratch limit (#20)
Support programmatic query and change of scratch limit on
AMD devices.

Change-Id: Id5da355a77366f97868e462847f3916e87fd2af6

[ROCm/clr commit: 1113eff3f9]
2025-04-24 17:15:25 -04:00
Yao, Longlong 6015dda120 SWDEV-518966 - Avoid creating Arena Memobj for VMM pointer (#39)
Change-Id: I69c6c0a1464d01e674ac929de34ab10047012f1a

Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>

[ROCm/clr commit: 0de73eeaf8]
2025-04-11 16:55:53 +05:30
Patel, Jaydeepkumar b217d3a4e6 SWDEV-508632 - Align address to 2 MBs for hidden heap allocation. (#29)
[ROCm/clr commit: b5c9cbc236]
2025-04-02 16:33:29 +05:30
Andryeyev, German 5c7c86f66d SWDEV-517481 - Add dynamic queue management (#37)
Enabled by defaulty. DEBUG_HIP_DYNAMIC_QUEUES controls the feature

[ROCm/clr commit: 28967982b2]
2025-03-19 11:22:50 -04:00
Branislav Brzak c81185cf26 SWDEV-516564 - SWDEV-512817 - Remove mentions of gfx940 and gfx941
Change-Id: Ia069fcb9c6948c3fc9a00961593c9dcc59609375


[ROCm/clr commit: c2d1776ebd]
2025-03-05 04:26:07 -05:00
Saleel Kudchadker d0a7ae02cf SWDEV-513197 - Unify getBuffer implementation
- Use getBuffer/releaseBuffer in BlitManager
- Cleanup XferBuffer as we use ManagedBuffer for both reads/writes

Change-Id: I2661b85dd012763b17a38a743fec1b1d79125f67


[ROCm/clr commit: 37d606d193]
2025-02-28 12:47:51 -05:00
German Andryeyev a7f3ad7867 SWDEV-515356 - Make the round-robin queue selection
- Add custom compare to the map of queues, which will help with
 the round-robin selection

Change-Id: Ie67a820bfb1a5b484a1b3edced967eed94228bb8


[ROCm/clr commit: ba8e740be4]
2025-02-20 11:09:54 -05:00
Vladana Stojiljkovic 7078aab436 SWDEV-510059 - Format CU mask properly
Change-Id: I80e94b4f3ea25f6988fc06d83aeb398e81ccddd1


[ROCm/clr commit: 061c5d877f]
2025-02-13 11:02:56 -05:00
kjayapra-amd 892d7bb064 SWDEV-488290 - Remove Stream to Engine logic and rely on engine query status HSA API.
Change-Id: I469ab6679360c8ee8d4ee515678a8aa8d4578ebf


[ROCm/clr commit: cc62a82347]
2025-02-04 13:00:16 -05:00
Jimbo Xie cc229f251f SWDEV-504383 - Cleaned up kForcedTimeout10us and removed IsHwEventReadyForcedWait
Also removed active_wait_timeout

Change-Id: I7a429f003c09a4df267b5c0983050704260094c6


[ROCm/clr commit: 4872b420c9]
2025-01-31 14:40:18 -05:00
kjayapra-amd 712987ed08 SWDEV-509280 - Combine multiple definitions of callbackQueue into a single function.
Change-Id: Ibbb56136bec2beed71c202d75e8aec9e82640a4e


[ROCm/clr commit: 0324014710]
2025-01-30 15:58:11 -05:00
German Andryeyev ae379965dd SWDEV-459826 - Add a crash dump for a failed queue
The logic can analyze the AQL queue state and
find a failed AQL packet with the kernel's name

Change-Id: I1a478fa2c25462cd07a194784958bdf22454b897


[ROCm/clr commit: ea0b092af8]
2025-01-28 14:27:46 -05:00
taosang2 590465543d SWDEV-507969 - Fix wrong VGPRs for some devices
Change-Id: Ia8fc19564272e2c7171d991376bf896a99085a97


[ROCm/clr commit: 799e54aa0d]
2025-01-22 10:11:47 -05:00
Evgenii Averin ef2a812d0a SWDEV-505769 - Fix typo
Change-Id: I2d3f65ed68157718c4439a9da7d2dcdfcbb9f93d


[ROCm/clr commit: b62995ce1a]
2025-01-08 21:31:17 -05:00
taosang2 da613fbbeb SWDEV-479958 - Support different address mode
Support different address modes in X, Y, Z directions

Change-Id: If1db5a8af33c92dd14b48968c3e8eceb97daea6c


[ROCm/clr commit: d82d6a78cf]
2024-12-23 16:39:54 -05:00
Saleel Kudchadker 7d7aa8b69c SWDEV-497145 - Use rocr copyOnEngine API for staged copies
- Refactor blit code and clean ASAN instrumentation
- Use unified function for rocr copy
- Enable shader copy path for unpinned writeBuffer/readBuffer paths
- Set GPU_FORCE_BLIT_COPY_SIZE=16 which means we will use BLIT copy for
  pinned copies or unpinned H2D/D2H copies < 16KB

Change-Id: I42045cca79234b340dbf53dafb93044199736ae4


[ROCm/clr commit: 7863eb92dc]
2024-12-04 13:38:13 -05:00
Satyanvesh Dittakavi 01c73b561f SWDEV-491967 - Add the right VGPRs per SIMD and VGPR Granularity for gfx12
- Default values are being assigned causing occupancy calculation to go
wrong without the right values defined for gfx12 ASICs
- Also added the these values for gfx1105

Change-Id: I611cc3a8ed8c57f2def637310ce1c3a48c16a574


[ROCm/clr commit: a26dc29eb9]
2024-11-01 12:47:23 -04:00
Konstantin Zhuravlyov 04628d2d1f SWDEV-428601 - Don't enforce 1 isa per device in rocm backend
- Device can have multiple isas as per HSA spec
  - First isa is most specific one, so this change is sort of a NOP

Change-Id: Ib332af21745f2e6a7c25db8986bf7717501059bc


[ROCm/clr commit: 3387f48b56]
2024-11-01 11:01:02 -04:00
Anusha GodavarthySurya 2dccb30f6f SWDEV-485904 - propagate hsa_amd_vmem_address_free error to hip API
Unit_hipMemSetAccess_GrowVMM test fails with
HSA_STATUS_ERROR_RESOURCE_FREE silently

Change-Id: I7a78410e432de4a2e877062782abf8761645f392


[ROCm/clr commit: b498103f9b]
2024-10-21 10:12:32 -04:00
Saleel Kudchadker b9497ea70e SWDEV-301667 - Enable ROCr logging
- Use AMD_LOG_LEVEL=5 to dump AQL packets in ROCr

Change-Id: I2c044a5304c4eaf3d3af20e62d1f54c98d4fbaa4


[ROCm/clr commit: e36666e536]
2024-10-04 19:22:12 -04:00
German Andryeyev f8fc11c2d8 SWDEV-483586 - Unblock staging H2D transfers
Although unpinned copies require synchronizations
in HIP, runtime can avoid syncs for H2D copies with
a staging buffer

Change-Id: If2203c6bc0cbd89742823688dc8e89e9acd873b2


[ROCm/clr commit: 29cc678d8d]
2024-09-21 10:25:27 -04:00
Maneesh Gupta e87bf2096d SWDEV-485179 - Revert "SWDEV-459254 - Overwrite cacheline size to 256 for gfx12, as it is used for kernarg alignment."
This reverts commit 1f63650bf96e01e48f879aa58b80e2130dd4a567.

Reason for revert: <INSERT REASONING HERE>

Change-Id: I6d7ed87c09d9b77116548dce1f30ac4711c2c09d


[ROCm/clr commit: 2d1c6ee23e]
2024-09-20 11:33:34 -04:00
kjayapra-amd f19260d568 SWDEV-480772 - Remove name variable from amd::Monitor class.
Change-Id: Ie2a4fa44f485786227230f8a892e090e718aa30e


[ROCm/clr commit: 12a39fbf22]
2024-09-19 11:55:01 -04:00
kjayapra-amd eecbcddaf3 SWDEV-439234 - Access check before memcpy and kernel operations.
Change-Id: I7057125c03460db205409e19980145298c190fe2


[ROCm/clr commit: 6211037f63]
2024-09-06 14:30:00 -04:00
Rahul Manocha c430e1c44d SWDEV-478921 - Destroy Queue created by Coop Launch
Change-Id: I7f31ce05421479ff1de138cae26aafa071e956e2


[ROCm/clr commit: ddbd7039b0]
2024-09-02 02:35:08 -04:00
kjayapra-amd a064de92b8 SWDEV-464828 - Initial implementation of VMM IPC on PAL/Windows.
Change-Id: I3d5e148fad9105704db6724b00df06bef4fc9d2f


[ROCm/clr commit: e7a7feb273]
2024-07-16 10:38:35 -04:00
Satyanvesh Dittakavi da5bff9464 SWDEV-471935 - Destroy hsa queues with cumask set
Fixes the memory leak with hipExtStreamCreateWithCUMask API.
hsa queues with cumask set are not being reused and created
everytime the API is called, But these queues were not being
destroyed during hipStreamDestroy causing memory leak.

Change-Id: Ibfbe019bbd73604e98eca80461efe53fa64bb701


[ROCm/clr commit: 191869b252]
2024-07-16 10:02:42 -04:00
Julia Jiang 3c7ae28776 SWDEV-472710 - Adding gitattributes and remove trailing spaces
Change-Id: Ic8ad2071745f0ffe6a2e120bfebb6d90bf270f87


[ROCm/clr commit: dd30e0e893]
2024-07-15 12:39:56 -04:00
Ioannis Assiouras f3a77127b4 SWDEV-472309 - Check if vmm support exists before enabling vm in mempool
Change-Id: I6ae2fb18a306595e0f3a56e144658a4a720e7a37


[ROCm/clr commit: 0053584aac]
2024-07-12 10:11:03 -04:00
taosang2 20417d5b0f SWDEV-467540 - Fix reference of freed locks
1.Move global amd::monitor listenerLock before global
class runtime_tear_down as it will be referenced in
~RuntimeTearDown() after main(). It should be freed
later than runtime_tear_down.

2.Update  Device::~Device() to SVM free coopHostcallBuffer_
before context_ is released and freed.

Change-Id: I1d21378ff463477d3238d71e5e2a1a7d6b9147ad


[ROCm/clr commit: 544c45364f]
2024-06-18 13:58:36 -04:00
Anusha GodavarthySurya 291f079669 SWDEV-467102 - Hidden heap init for graph capture
If the graph has kernels that does device side allocation,  during packet capture, heap is
allocated because heap pointer has to be added to the AQL packet, and initialized during
graph launch.

Handle race with wait when 2 kernels with device heap are enqueued on multiple streams.

Change-Id: I45933b77fcaf7bc8fdf1bc906462e32b5d8d3688


[ROCm/clr commit: 57156c524d]
2024-06-17 02:07:25 -04:00
Satyanvesh Dittakavi 30c4d5805e SWDEV-464927 - Update the Get by PCI BusId logic and Hop count
- Update the intra socket weight for partitions within single socket as
it is changed to 13 by the driver.
- Use the PCIe function to distinguish the partitions of the same device
such as TPX mode in gfx942.

Change-Id: I8e64023d44e37c2dbb105cbb343441a48021ba7b


[ROCm/clr commit: 1815fc808d]
2024-06-10 04:46:50 -04:00
Ioannis Assiouras 75104df3b2 SWDEV-464648 - code and comment cleanups
Change-Id: I5ba3f1bff500b3cd5903c2f441017735e688f83f


[ROCm/clr commit: 8f42ad6aa3]
2024-06-07 22:38:09 +01:00
Ioannis Assiouras 407d1346f2 SWDEV-463865 - changed device,roc and pal namespaces to be nested under amd
Change-Id: Icad342843c039c634e249a13a7aa31400730b1dd


[ROCm/clr commit: 775dc204aa]
2024-06-07 12:23:06 -04:00
kjayapra-amd ea36bc11ce SWDEV-464455 - Init Segment flags and check for valid segment before passing to hsa APIs for allocation.
Change-Id: Ibe640093acdb7856115b6a4109bcf010adf20353


[ROCm/clr commit: 1590b39f9e]
2024-06-07 10:40:57 -04:00