Commit Graph

5593 Commits

Author SHA1 Message Date
Ioannis Assiouras e97c777df1 SWDEV-442421 - Fixed case where hipIpcGetMemHandle erroneously returns hipSuccess
Change-Id: Ie322a1a0165111d2ca129e68f49b54fe93aa088e


[ROCm/clr commit: b5fadf9cd1]
2024-02-05 05:08:11 +00:00
kjayapra-amd 9bff044c87 SWDEV-437832 - Adding device property to check if the device is accelerator.
Change-Id: I8349e99c03422c268bbb60a8c143bd492d9cec09


[ROCm/clr commit: b366a7c992]
2024-02-05 05:08:11 +00:00
Anusha GodavarthySurya 49e684361f SWDEV-422207 - Added debug env to dump graph during Instantiation
Change-Id: Ibde2ae5b8d240f3986bcd168facc513a319c0f17


[ROCm/clr commit: 0a055f874b]
2024-02-05 05:08:11 +00:00
Lang Yu 2860991fb4 SWDEV-439419 - Unlock host ptr when device ptr equals host ptr
hsa_amd_memory_lock_to_pool() and hsa_amd_memory_unlock()
should be called balanced.

Change-Id: I8b1549861bff752aabbb6399d717d1e346079a38
Signed-off-by: Lang Yu <Lang.Yu@amd.com>


[ROCm/clr commit: cc29df873a]
2024-02-05 05:08:11 +00:00
Ioannis Assiouras e79d60996c SWDEV-441201,SWDEV-441727 - Move BlitProgram creation after trap handler build
Change-Id: I89199ccc4bdf79940dc6693e07c03115c52bf613


[ROCm/clr commit: 5d322c027a]
2024-02-05 05:08:11 +00:00
Ioannis Assiouras b72a7113fb SWDEV-432599 - Added null checks for rocMemory ptrs in copyMemory
Change-Id: I8ccda2c915dad22c4ea67556dfaab9ba47770069


[ROCm/clr commit: 28743d8dbd]
2024-01-18 15:48:30 -05:00
Jaydeepkumar Patel 5b6349bb60 Revert "SWDEV-359287 - uniform_work_group_size is interger type is 1 for true and 0 for false. Lighting kernel's init sets uniform work group flag and hence not need to set it from options."
This reverts commit 1b05247a03.

Reason for revert: Waiting for staging results before finally merging it.

Change-Id: Iaabb510325f50147f368108e98531291217627c0


[ROCm/clr commit: 77be355fd9]
2024-01-18 01:29:31 -05:00
Jaydeep Patel 1b05247a03 SWDEV-359287 - uniform_work_group_size is interger type is 1 for true and 0 for false. Lighting kernel's init sets uniform work group flag and hence not need to set it from options.
Change-Id: I8d3a9a6ed1c3bddaaa86f7cdc242a45e6a1d09f6


[ROCm/clr commit: ea25e65834]
2024-01-17 04:42:52 -05:00
pghafari 0fe462b63e SWDEV-441258 - remove full path for HIP LOG windows
Change-Id: Ibad6e9542c0cede38f5a114dcd352356ddedf019


[ROCm/clr commit: 0cff14c9e1]
2024-01-16 15:26:06 -05:00
German 37ed51c99c SWDEV-440746 - Enable hipExtAnyOrderLaunch extension for PAL
Extension allows to execute the kernels without a wait barrier and L1
invalidation.

Change-Id: I96c485204303f54a0240b93134f4560673e4bd17


[ROCm/clr commit: 13c6f56ca9]
2024-01-16 15:20:39 -05:00
Saleel Kudchadker 34fd1b7fe5 SWDEV-301667 - Remove resetFenceDirty
Dont track the status of fence_dirty_ flag on the host, instead clear it
when we submit a barrier on the respective stream.

Change-Id: I4d98dbf20c81379c9c5da9f5b67629a8f9f6dfcd


[ROCm/clr commit: 0b0df605d4]
2024-01-15 15:43:14 -05:00
German 339523c475 SWDEV-440746 - Limit WG for compute P2P
Use only 16 workgroups for compute P2P copies.
That should be enough to utilize XGMI bandwidth.

Change-Id: I60dfe019279bb95f93c8874244c1738aad1896d8


[ROCm/clr commit: 31101c6219]
2024-01-12 14:56:29 -05:00
Konstantin Zhuravlyov b98c4c2873 Revert "Removed some options"
This reverts commit 4abdfe5489.

Reason for revert: multiple tickets filed. i will re-instate this change after fixing those.

Change-Id: I66152e3643c73ec1d240d0fcddf2119f8f4848a8


[ROCm/clr commit: 5f7ebda6aa]
2024-01-10 13:35:42 -05:00
Saleel Kudchadker a87782e941 SWDEV-439242 - Fix perf regression
This issue is due to the fact that we set fence_dirty_ flag for every
kernel launch. Whenever any next HIP API is caused, the stream logic
assumes fence is dirty and queues a marker, when its not needed.

Change-Id: I10a49ee951daa92221aa6be75e2334849579a45d


[ROCm/clr commit: d6b4892600]
2024-01-10 11:45:02 -05:00
German ab59c1e7fa SWDEV-301667 - Fix HSAIL compilation path for Blit
Recently some unused compiler options for HSAIL path were removed,
 but it affected blit kernels compilation. Hence, remove those options.
Also delete assert for device to device copy in SDMA path for now.

Change-Id: Ib5d7f063af2ab4a3fc5d73d426e39c391b1011ac


[ROCm/clr commit: eaa61fc740]
2024-01-09 17:51:30 -05:00
German 7461a5b46f SWDEV-438532 - Enable wave limit for HSAIL
Luxmark still uses HSAIL path and one subtest can benefit from the wave limit.

Change-Id: I16c94e09cd6e2afd6341cb76bf2e9ab7b7713214


[ROCm/clr commit: dec1158d04]
2024-01-09 17:00:50 -05:00
German ba4a3cd9f4 SWDEV-439241 - Keep direct map for MGPU
Single OCL context with multiple devices should use direct map
even with persistent memory, because cache coherency layer.

Change-Id: I02a48830440203a1dea176acd4dff4452b70f133


[ROCm/clr commit: 49037b9762]
2024-01-08 18:14:15 -05:00
German 5718f13901 SWDEV-438958 - Calculate persistent memory stored in the cache
- Make sure persistent memory from resource cache is properly adjusted
in free memory calculation.

Change-Id: I74ef68975ccde4694fb1cb904617c418e85dfc9f


[ROCm/clr commit: 85c15d720d]
2024-01-08 10:11:52 -05:00
ksankisa 82fd83009c SWDEV-404921 - Add dynamic LDS size hidden kernel argument
Change-Id: If99019058e4bfdc988ef5fc4cef001b772380453


[ROCm/clr commit: f554a075c7]
2024-01-06 08:46:55 +05:30
Saleel Kudchadker 8d5fa39c5b SWDEV-365820 - Refactor build path
This is an initial change before we refactor the build/link paths for
kernel launches for HIP. This current change is needed as compiler was
setting some dump file which needed fs access which has slowdowns for
NFS mounted file systems

Change-Id: I828f9bb04d789b4f8c05c1ed08767f325efeb47c


[ROCm/clr commit: 3f2f7252aa]
2024-01-04 14:20:59 -05:00
Satyanvesh Dittakavi d1901f2017 SWDEV-434846 - Limit the gpu single allocation percentage for all MI300 versions
Change-Id: I33dea3eaab249ce3f9a624d38267489f99cd530c


[ROCm/clr commit: 755eb2962c]
2024-01-03 23:47:44 -05:00
Saleel Kudchadker dfb1087c3e SWDEV-422207 - Tag captured kernel names for graphs
Change-Id: I9540daa4abf9c340541a681037e2dca4eec821ed


[ROCm/clr commit: dfd4635f91]
2024-01-03 11:50:05 -05:00
German 4750a76899 SWDEV-404889 - Enable debugger interface in PAL
Add GPU_DEBUG_ENABLE to control ttpm behavior. If enabled,
then HW will collect more debug info at some perf cost

Change-Id: Icee0686b903a7b1bd483710b9d611877cd43c6aa


[ROCm/clr commit: 7d661bc7df]
2024-01-02 11:51:42 -05:00
Satyanvesh Dittakavi f423584145 SWDEV-379212 - Handle template kernels with hiprtc lowered names
Change-Id: Ib8e6493a1f342f92a35031d5ee39b2e22132b56a


[ROCm/clr commit: dc8f66b86f]
2024-01-02 03:28:28 -05:00
Konstantin Zhuravlyov 4abdfe5489 Removed some options
-xnack, -force-wgp-mode, -force-wave-size-32, -round-trip-spirv,
-fe-gen-spirv, -lower-pipe-builtins=0|1, -lower-atomics=0|1,
-set-lds=<value>, -set-scalar-registers=<value>,
-set-vector-registers=<value>, -limit-scalar-registers=<value>,
-limit-vector-registers=<value>, -sc-xnack-iommu,
-faa-for-barrier/-fno-a-for-barrier, -sc-dev-format, -verify-lwspir,
-verify-hwspir, -ffma-enable/-fno-fma-enable,
-fmad-enable/-fno-mad-enable, -fdisable-avx/-fno-disable-avx,
-fforce-llvm/-fno-force-llvm, -print-compile-phases,
-kernel-cache-enforce-miss, -kernel-cache-wipe, -kernel-cache,
-sc[=<filename>]/--load-sc-dll[=<filename>],
-be[=<filename>]/--load-be-dll[=<filename>],
-cg[=<filename>]/--load-cg-dll[=<filename>],
-link[=<filename>]/--load-link-dll[=<filename>],
-opt[=<filename>]/--load-opt-dll[=<filename>],
-fe[=<filename>]/--load-fe-dll[=<filename>],
-cl[=<filename>]/--load-cl-dll[=<filename>], -just-kernel=<kernel-name>,
-use-debugil, -fmulti-level-call/-fno-multi-level-call,
-fdebug-call/-fno-debug-call, -fmacro-call/-fno-macro-call,
-fstack-uav/-fno-stack-uav, -fdef-res-id/-fno-def-res-id,
-wokth=int/--waves-opt-kernel-threshold,
-ilkth=int/--inline-kernel-size-threshold,
-ilsth=int/--inline-size-threshold, -ilcth=int/--inline-cost-threshold,
-scopt=int/--sc-opt-level, -flib-no-inline/-fno-lib-no-inline,
-fuser-no-inline/-fno-user-no-inline,
-scras=int/--sc-si-opt-reg-alloc-strategy, -fsc-post-ra-sched,
-fsc-live-sched/-fno-sc-live-sched, -fsc-use-buffer-for-hsa-global,
-fsc-schedule-no-reorder, -fsc-min-reg-schedule,
-fsc-bias-schedule-to-minimize-insts,
-fsc-bias-schedule-to-minimize-regs, -fsc-disable-merge-memory,
-fsc-disable-loop-unroll, -fsc-use-mubuf/-fno-sc-use-mubuf,
-fsc-selective-inline/-fno-sc-selective-inline,
-fsc-keep-calls/-fno-sc-keep-calls, -slc=0|1/--simplifylibcall,
-stack-alignment=<n>, -fdiv2fmul=0|1, -prt-opt-liveness=0|1,
-liveness=0|1, -SRAE-threshold=<value>, -memcombine-max-vec-gen=<value>,
-small-global-objects, -fast-fmaf, -fast-fma, -bfo=0|1, -ebb=0|1, -aa,
-mem2reg=0|1, -licm=0|1, -unroll-allow-partial,
-unroll-threshold=<positive integer>, -unroll-count=<positive integer>,
-apt/--ap-threshold=<positive integer>, -srt/--sr-threshold=<positive
integer>, -fdebug-linker/-fno-debug-linker, -fbin-gpu64/-fno-bin-gpu64,
-fbin-disasm/-fno-bin-disasm, -fbin-bif30, -fbin-hsail/-fno-bin-hsail,
-fbin-amdil/-fno-bin-amdil, -fbin-spir/-fno-bin-spir, -fonly-bin-source,
-fper-pointer-uav/-fno-per-pointer-uav

Change-Id: I1af5b0a11b55bf75b727057143159fbbf1bb8f0e


[ROCm/clr commit: 15b8cf911a]
2023-12-21 10:18:37 -05:00
Anusha GodavarthySurya 67bb022698 SWDEV-422207 - Fix simple graph test when DEBUG_CLR_GRAPH_PACKET_CAPTURE flag is enabled
- For new AccumulateCommand we enqueue nop barrier packet. So during stream sync we need system flush.

Change-Id: I0b97b626bcdae582ef95e7c95030d78df1fa5a54


[ROCm/clr commit: 748c6b3520]
2023-12-20 22:50:36 -05:00
kjayapra-amd 30d6b89d6f SWDEV-413997 - Enable Virtual Mem support by default.
Change-Id: Ia3db3919701708cf95574692e1d47375ca99d7fd


[ROCm/clr commit: e05923b139]
2023-12-20 12:49:16 -05:00
German e6578eda9c SWDEV-1 - Promote PAL verison to 843
Change-Id: I2b8d2fd1df61b376598da53bef530243f8d6e757


[ROCm/clr commit: adf9406a16]
2023-12-19 10:25:32 -05:00
German Andryeyev 67597f4901 SWDEV-436869 - Destroy host memory
Recent changes disabled system memory allocation
in the abstraciton layer. That requires memory
allocation/destruction in ROCR. Add destruction logic.

Change-Id: I68fe6b0a620ca743fe5850052ea0efa8bb7931c2


[ROCm/clr commit: a6d480e098]
2023-12-15 16:39:41 -05:00
German cba839f38d SWDEV-436796 - Enable device memory for kernel arguments
Extra CPU read back will be performed before every submission to make sure
previous writes over PCIE reached GPU. HDP flush is done by CP.

Change-Id: I402d28ca26c8cee4a3920feb3599af8c285d0889


[ROCm/clr commit: cfc07c88ee]
2023-12-15 13:11:50 -05:00
German fa8e88b108 SWDEV-432575 - Disable direct map for persistent memory
Persistent memory should use direct access for write map and
indirect for read map.

Change-Id: I9fc84836d60088b24012ed25f7ef8c16e33796a3


[ROCm/clr commit: c8b3253a24]
2023-12-15 10:59:01 -05:00
Jaydeep Patel 526e60cb70 SWDEV-411343 - Import VK buffer memory exported by name.
Change-Id: Idc7c840fcd6bf758ecc29ffd6558d24e5bd0a25b


[ROCm/clr commit: 9551d48e7f]
2023-12-14 22:16:11 -05:00
kjayapra-amd 9a53a2bec3 SWDEV-413997 - Fixing MGPU cases on PAL side by passing Global Context to virtual alloc.
Change-Id: I6614058d1456d199d710b12acd95160a79aa48c8


[ROCm/clr commit: ec010e4d2d]
2023-12-14 11:34:32 -05:00
German Andryeyev 7130b87d5c SWDEV-436859 - Enable pitch for COPY_HOST_PTR
Original logic didn't use pitch because, abstraction layer had
a sysmem copy without pitch. Since extra sysmem copy was
disabled, the code has to accept pitch values from the app.

Change-Id: Ia9fba7b33ddff4e9109b4e63d0d6afa52f501c8f


[ROCm/clr commit: fb3dfcf889]
2023-12-13 16:50:16 -05:00
Satyanvesh Dittakavi 542044aadc SWDEV-434846 - Correct the vgprs per simd for MI300
Change-Id: Id4862da7611f64392bfc1538fb644801ec0a9e7f


[ROCm/clr commit: b2102fe939]
2023-12-13 03:06:21 -05:00
Jatin Chaudhary 1114efcc0d SWDEV-431399 - use x86 intrinsics only x86 platforms
This was highlighted by github issue:
https://github.com/ROCm-Developer-Tools/clr/issues/32
On RISC-V platforms this header might not be present.

Change-Id: I5f0959a7b281c760802e76541d50693d1a3902be


[ROCm/clr commit: 12461dbd6a]
2023-12-12 19:10:50 -05:00
German fe71f14732 SWDEV-434241 - Replace size_t with uint64_t
The kernel accepts uint64_t, but with 32bit OCL build size_t was 32 bit

Change-Id: I6fe37d2e5e69c7bd62d7b1bd4cace758758b3482


[ROCm/clr commit: b3171d08e6]
2023-12-08 16:56:29 -05:00
Jaydeep Patel 0d74d8b187 SWDEV-430911 - Force SDMA only if explicitly specified & pick appropriate engine.
Change-Id: Ib34fa6b2782f74b753899fa8fddff646dc60c8ce


[ROCm/clr commit: 3daf8b334a]
2023-12-04 21:58:47 -05:00
German a414a5c7a3 SWDEV-435015 - Disable sysmem allocation in abstraction layer
Change-Id: Idefdabd2997d618b962c42545ae67768c628c5d6


[ROCm/clr commit: 01217d0383]
2023-12-04 11:40:28 -05:00
German Andryeyev d60fabacbe SWDEV-434298 - Add destination offset
The end pointer in copy buffer requires destination offset

Change-Id: I01f2967144f741761fd2ce3244fd8d04564d986f


[ROCm/clr commit: 44761fe89b]
2023-11-29 16:33:29 -05:00
German Andryeyev eec1e978f0 SWDEV-434298 - Change copy buffer kernel
The new copy kernel can limit the number of launched workgoups.
It can copy in chunks of 16 bytes or 4 bytes.
Workgoup size is increased to 512 or 1024

Change-Id: Ic3fefa2d5bda6afebd1acc4d41ad310b138af6df


[ROCm/clr commit: ed4e1fec98]
2023-11-28 16:56:30 -05:00
taosang2 cc6e0c2a32 SWDEV-431104 - Query atomics attribute in Win
Make hipDeviceAttributeHostNativeAtomicSupported return
right value in Windows

Change-Id: I149a8629769cd0d5848ffefb24f1752678a685b8


[ROCm/clr commit: 1faf1a4cb9]
2023-11-24 09:16:41 -05:00
Jaydeep Patel 7933b88d7c SWDEV-431879 - Introduce IsHandlerPending back.
It seems that due to removal of vdev()->isHandlerPending(),
Marker queued to ensure finish is not enqueued and that cause
hung at waiting event for kernel enqueue command.

Change-Id: I364abb2dcb4897b11a7eb61b5d85013b69292792


[ROCm/clr commit: eecbc2e436]
2023-11-23 08:45:19 -05:00
German Andryeyev e390ec044f SWDEV-432174 - Change the fillBuffer kernel
- Add the new fillBuffer kernel, which allows to launch a limited
number of workgroups for memory fill operation
- Switch fill memory to 16 bytes write by default
- Allow to limit the workgroups with DEBUG_CLR_LIMIT_BLIT_WG

Change-Id: Ibad1822f2d42b2fc71bcfc1917c31409c0623e8e


[ROCm/clr commit: f1dc81f427]
2023-11-16 14:25:55 -04:00
Saleel Kudchadker cb9a715e04 SWDEV-422207 - Report kernel names for activity profiling
- Report kernel names for optimized graph path
- Refactor code so that we store profiling info in Accumulate command

Change-Id: Ib97735a0239aeb9fc3a50a4bb7126dd0bcadc8af


[ROCm/clr commit: b056686607]
2023-11-15 14:38:07 -05:00
Saleel Kudchadker 153bb15f46 SWDEV-301667 - Support device kernel args for PCIE
Change-Id: I5e51602bea5a68734227fd62e11ab68eb1ad81c1


[ROCm/clr commit: 5c591b5877]
2023-11-15 14:37:41 -05:00
Jatin Chaudhary 2361cc0dab SWDEV-431399 - fix first set of memory leaks in clr, found in rtc tests
change constexpr variable names to match the C++ style we follow.

Change-Id: Ibc59a65d8ff2ca765da7bf5e653c0650fb3714c4


[ROCm/clr commit: ce27581465]
2023-11-14 20:39:45 -05:00
Ioannis Assiouras 803ef23320 SWDEV-432329 - Remove outdated install instructions from hipamd/rocclr subdirs
Change-Id: Ie6793e0a12689aed201d6f6278b8484d707ebdec


[ROCm/clr commit: f6e0f2613c]
2023-11-14 18:55:10 -05:00
Vikram eef9872d9b SWDEV-423946 - Make hash string to int conversion platform independent
The "long" type size seems to be platform dependent, causing hash value
overflow on implementations where "long" is 4 bytes. This addresses the
scenario.

Change-Id: I4e3c0df457e35b139dcc496d832210ba2cb849ba


[ROCm/clr commit: 1f8ead914a]
2023-11-14 12:01:44 -05:00
Ioannis Assiouras 8f679127a3 SWDEV-428244 - Fixed the computation of the start address of KernelParameters.values_
For avx build, the start address of values_ buffer in KernelParameters is not
correct as it is computed based on 16-byte alignment.

Change-Id: I3b28ae02d2c9c0517d4a348d95ae8c6721bec83d


[ROCm/clr commit: c4f773db0b]
2023-11-14 05:52:01 -05:00