This reverts commit dfa7790030.
Reason for revert: Deferred to a future release.
Change-Id: Ia66c37f0ab9734dee73c930d10d7469d5fd57254
[ROCm/clr commit: 5dc104b3ea]
Remove alignment to granularity for IPC handles as ROCr has a patch that
will internally validate pointer sizes against requested size during
allocation instead of size aligned to page size. This patch is needed
together with this patch from ROCr:
f8a42a3a:Use user requested size for memory fragments
Change-Id: I28b25558ea03c836b44fafdb34b7330cf6887424
[ROCm/clr commit: fa1b7925cf]
Heap initialization used device queue, but it shoudl be used for
cooperative launches only. Heap initialization must use the same queue
as the current dispatch.
Change-Id: I856621bf82bbdeb1c2d0fbc4970e90d09af805cb
[ROCm/clr commit: 67af16bdf3]
This reverts commit 7a5c07bf4e.
Reason for revert: performance drop in Quicksilver app
Change-Id: I2bdf42ad0a235a74e2bb4d38f86471e9affbd7a6
[ROCm/clr commit: 3e88081961]
Remove amdgpu-pro interface for persistent memory,
used in Liquidflash
Change-Id: I7d1720ad0875a62ebb2d7f96cba39601d560a5df
[ROCm/clr commit: 6dad2fc306]
This reverts commit 06593a072f.
Reason for revert: ROCr query should now be usable in upcoming release.
Change-Id: I2207761ca6af5d585d090bae1af09eb9a8e9bad6
[ROCm/clr commit: a52f5bda8f]
The ROCclr assigns zero-based IDs to GPUs in the order they are
discovered. That zero-based ID is what is used to identify the GPU
on which the HIP_OPS activity took place.
When multiple ranks are used, each rank's first logical device always
has GPU ID 0, regardless of which physical device is selected with
CUDA_VISIBLE_DEVICES. Because of this, when merging trace files from
multiple ranks, GPU IDs from different processes may overlap.
The long term solution is to use the KFD's gpu_id which is stable
across APIs and processes. Unfortunately the gpu_id is not yet exposed
by the ROCr, so for now use the driver's node id.
Change-Id: Ib78854527d600d175bb76e2df0747c33f898c615
[ROCm/clr commit: 9a82118c85]
- Store last fence scopes and use the last value to determine if we need a cache flush again. This helps cases where hipExtLaunchKernel API is
used.
- Purge code for ROC_EVENT_NO_FLUSH
Change-Id: I531cf9c9c60d5e2b3a9e265d0f52f79ed2fa8a8c
[ROCm/clr commit: 9b5cbd37a2]
- rocr attribute needs to be updated after each iteration
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I3afb2d7954ef3de37f5f5f9d3cc7757fdacffcec
[ROCm/clr commit: 50e0ddb055]
Maintain status of handler callback. For event records we no longer
submit callbacks to reduce the load on the async handler thread. However
without a callback we leak command memory/decrement refcounts. Indicate
status of the handler which we can use to queue a callback when
finish is called.
Change-Id: I89fd02f3d047a0e8162664ee17581a14795f1928
[ROCm/clr commit: 5df34a2f7a]
Move hidden heap creation to the kernel launch to make sure it's
allocated on the actual first usage.
Change-Id: I1b65a82fc06d9129ed45a69765bf14ea3d945b04
[ROCm/clr commit: 4975f69337]
The heap must be cleared once per device, but ROCclr doesn't
create a queue per device in HIP. Hence, the clear operation will
be performed during the first queue creation.
Change-Id: I52ceb06d67d11cde6d019c5ab510059f426a9bfb
[ROCm/clr commit: 04bfd93569]
Implement map/unmap for PAL backend
Create commands since PAL uses the IQueue to map/unmap
Change-Id: I97e26a7d28ae5e10774c9ca65307153100945621
[ROCm/clr commit: 67657d6099]
- check pcie atomci support for printf functionality
- if not enabled printf wont work
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Ib366e8e71772b02210c4a830bca4bd8cc7a11664
[ROCm/clr commit: 15f1632dfa]
Adding virtual memory management APIs to rocclr.
The HIP layer will handle virtual allocs on devices.
Change-Id: Ia978f105c2c3fed3959c77580ba228e845105754
[ROCm/clr commit: b5f555f9ec]