Commit Graph

68 Commits

Author SHA1 Message Date
Anusha GodavarthySurya 06ffd15060 SWDEV-366636 - Fix performance drop in TF-RCCL models
Change-Id: Idc845bb0dab858b94b9d2720cae8308cac2e7328


[ROCm/clr commit: f98dcf9d7f]
2023-02-17 00:48:13 -05:00
Maneesh Gupta d7fdd9fcb8 SWDEV-368235 - Revert "Remove obsolete env variables"
This reverts commit dfa7790030.

Reason for revert: Deferred to a future release.

Change-Id: Ia66c37f0ab9734dee73c930d10d7469d5fd57254


[ROCm/clr commit: 5dc104b3ea]
2023-02-15 07:25:00 +00:00
Anusha GodavarthySurya 24eec94928 SWDEV-380035 - Check for agent and ptr match for hsa LOCKED ptr
Change-Id: I2503aa05512aebc3535963e188ca8d1dbfab08f0


[ROCm/clr commit: fa35239b4b]
2023-02-15 00:12:42 -05:00
German Andryeyev b180effdb6 SWDEV-381633 - Use blit manager on app's queue
Heap initialization used device queue, but it shoudl be used for
cooperative launches only. Heap initialization must use the same queue
as the current dispatch.

Change-Id: I856621bf82bbdeb1c2d0fbc4970e90d09af805cb


[ROCm/clr commit: 67af16bdf3]
2023-02-09 09:43:13 -05:00
German dfa7790030 SWDEV-368235 - Remove obsolete env variables
Change-Id: I7e14d53297e79e2f68b3a6cc40251ad7db9eb5ab


[ROCm/clr commit: 7b50c935f8]
2023-02-03 13:44:24 -05:00
German 6eec7a361e SWDEV-377991 - Remove liquidflash support
Remove amdgpu-pro interface for persistent memory,
used in Liquidflash

Change-Id: I7d1720ad0875a62ebb2d7f96cba39601d560a5df


[ROCm/clr commit: 6dad2fc306]
2023-01-23 10:40:57 -05:00
kjayapra-amd e295beb8ba SWDEV-371904 - Adding pseudo fine grain flag to hsa memory allocation for device fine grained memory.
Change-Id: I8cada90f0e3880dfbc5bf5a3fac4554e7a0cb08e


[ROCm/clr commit: e56a611b92]
2022-12-11 08:15:17 -05:00
Saleel Kudchadker 0dd9add8e1 SWDEV-352001 - Store last scopes for dispatch
- Store last fence scopes and use the last value to determine if we need a cache flush again. This helps cases where hipExtLaunchKernel API is
used.
- Purge code for ROC_EVENT_NO_FLUSH

Change-Id: I531cf9c9c60d5e2b3a9e265d0f52f79ed2fa8a8c


[ROCm/clr commit: 9b5cbd37a2]
2022-09-22 11:34:10 -04:00
Maneesh Gupta 92f6e1a0d2 SWDEV-350289 - Fix build warnings due to file re-org
Change-Id: I0066fa163b9f25fdde4c5b3baed1ef0654390c06


[ROCm/clr commit: 289062682a]
2022-08-10 03:05:56 -04:00
Sarbojit Sarkar a70f836779 SWDEV-344210 - Fixed page fault when mempool accessed from remote device
Change-Id: Ie41b0c0499f7733d4541ccd50b3d0d976c6431c9


[ROCm/clr commit: a28b22d9b4]
2022-08-09 23:26:27 -04:00
sdashmiz 3389e6077a SWDEV-334233 - add support for p2p in windows
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I9109120b5444c400e65cfff869cb36e876ffd1fc


[ROCm/clr commit: e176e27bf7]
2022-07-14 15:07:33 -04:00
German Andryeyev acf2856677 SWDEV-339296 - Delay hidden heap allocation till the usage
Move hidden heap creation to the kernel launch to make sure it's
allocated on the actual first usage.

Change-Id: I1b65a82fc06d9129ed45a69765bf14ea3d945b04


[ROCm/clr commit: 4975f69337]
2022-06-14 12:18:34 -04:00
German Andryeyev 0ecf22bb53 SWDEV-336024 - Clear device heap to 0
This reverts commit 8624574866.

Reason for revert: Fix regressions

Change-Id: I7d883e1c3cbd27bb64b581ec800243ad7dfe24fd


[ROCm/clr commit: 07c1b9a998]
2022-05-19 09:10:08 -04:00
German Andryeyev 8624574866 SWDEV-336024 - Clear device heap to 0
The heap must be cleared once per device, but ROCclr doesn't
create a queue per device in HIP. Hence, the clear operation will
be performed during the first queue creation.

Change-Id: I52ceb06d67d11cde6d019c5ab510059f426a9bfb


[ROCm/clr commit: 04bfd93569]
2022-05-11 11:03:56 -04:00
Julia Jiang 1d74dfe1d5 SWDEV-334574 - Rename _bkendDevice in VDI
Change-Id: I1c04dad226e08f02bca11fa0d1981fafa7ea2d2a


[ROCm/clr commit: b7c7917256]
2022-04-27 11:21:24 -04:00
Sarbojit Sarkar 8649f60ad7 SWDEV-333438 - Fix for hipEnablePeerAccess segfault
Change-Id: I60720d1d9b9c522d15fe17dcfbc609571a4fd266


[ROCm/clr commit: 6b15e0a1cc]
2022-04-26 05:21:52 -04:00
Christophe Paquot 5f42bfd145 SWDEV-322620 - Virtual Memory Management
Implement map/unmap for PAL backend
Create commands since PAL uses the IQueue to map/unmap

Change-Id: I97e26a7d28ae5e10774c9ca65307153100945621


[ROCm/clr commit: 67657d6099]
2022-04-22 18:09:26 -04:00
sdashmiz dafc64ea0a SWDEV-204804 - Detecing pcie atomic support
- check pcie atomci support for printf functionality
- if not enabled printf wont work

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Ib366e8e71772b02210c4a830bca4bd8cc7a11664


[ROCm/clr commit: 15f1632dfa]
2022-04-22 08:53:16 -04:00
Christophe Paquot 1024cb58a7 SWDEV-322620 - Virtual Memory Management
Adding virtual memory management APIs to rocclr.
The HIP layer will handle virtual allocs on devices.

Change-Id: Ia978f105c2c3fed3959c77580ba228e845105754


[ROCm/clr commit: b5f555f9ec]
2022-04-15 00:10:02 -04:00
Saleel Kudchadker 3d0100c5ab SWDEV-301667 - Add cache state for a device
- Add a global cache state for a device to indicate scopes of submitted
AQL packets
- Remove scopes for TS marker if hipEventReleaseToDevice is passed. Set
env ROC_EVENT_NO_FLUSH=1 to use NOP AQL for event records.
It would flush caches by default with system scope release.
- Calling finish() should ensure if caches are flushed, if not queue a
marker

Change-Id: Ibbbdbb1cd7ac61cb35649169212142545be159e0


[ROCm/clr commit: 8eeaa998c0]
2022-04-12 12:27:31 -04:00
German Andryeyev 2f380870df SWDEV-328670 - Enable arena for ROCr interops
Add ROCR memory detection and enable arena mem object for possible
access in HIP

Change-Id: Icf86ac789176bfee4ea8d36b0970a817d4c6a2f7


[ROCm/clr commit: 28597ec5b5]
2022-03-30 16:46:36 -04:00
Saleel Kudchadker 4dbec887a2 SWDEV-301667 - Selectively queue handler
- Queue handler for hipEventRecord(aka marker_ts_) only if there is a
callback associated with it.

Change-Id: I8a9877ae0e342556053abbaacc9510744a8e772a


[ROCm/clr commit: 3c3c0ca4c5]
2022-03-24 19:46:28 -04:00
Sarbojit Sarkar d58efdd1a8 SWDEV-325708 - Query for FineGrained support
Change-Id: Idd20a71467595ab6577bf47c081c437a4b166988


[ROCm/clr commit: 3c2dc1f646]
2022-03-16 05:09:42 -04:00
German Andryeyev 7d5ed33e8f SWDEV-307185 - Create heap for device memory allocator
Pass the allocated heap with the kernel arguments

Change-Id: Icdec09b7f937845c39e21cbca7071dc3ba791af9


[ROCm/clr commit: 7b114a2b8b]
2022-03-04 00:44:41 -05:00
Saleel Kudchadker 04a391004a SWDEV-299893 - Set preferred node affinity
Set affinity to the closest node of the current GPU. This reduces
the latency to fetch kernel args since device would query the CPU cache
of core which did the dispatch. This behavior is controlled with
AMD_CPU_AFFINITY env var(disabled by default)

Change-Id: I65afba62cb818ea25a311b88d1c0dd5c51330292


[ROCm/clr commit: b192beea52]
2021-11-19 04:42:42 -05:00
German Andryeyev 3393396aaa SWDEV-292018 - Switch to internal signals for markers
Add ref counting to ProfilingSignal class to track the last release.
If a signal was used in the marker, then don't reuse it,
but create a new one for internal usage.
Don't rely on HSA callback for the command status update if there
are no pending dispatches.

Change-Id: I19f14ed9d80acfe79993b343b2187635f8428a20


[ROCm/clr commit: ff15c0893e]
2021-08-22 23:56:07 -07:00
agunashe 49f0546637 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261


[ROCm/clr commit: d96481fb36]
2021-08-22 23:56:07 -07:00
pvellien e23597d4a4 SWDEV-285333 - Introduce Address sanitizer hostcall service
Change-Id: Id29aacd09d0a9934a027446c57c7095804e1a454


[ROCm/clr commit: c11c02f2c7]
2021-08-22 23:56:07 -07:00
German Andryeyev 9f03f68a8a SWDEV-290160 - Switch to global HSA signals
Runtime can't assign internal HSA signals for HIP events, because
HIP application can destroy the HIP stream or signal reuse may
occur internally. Switch to global HSA signals for HIP events.

Change-Id: Ieaea2d6b039e492b2e7c5112782a8f4e601e50a1


[ROCm/clr commit: ce8dad2ecc]
2021-08-22 23:56:07 -07:00
German Andryeyev a9abd850ea SWDEV-284671 - Add HW event wait to improve hipDeviceSynchronize
If AMD event contains a reference to a HW event, then runtime
could check/wait for HW event. CPU status update will occur later
after HSA signal callback, but it's not important for the result.

Change-Id: I591391a953bbdba6a25ac07e2cd98aeb17cd4596


[ROCm/clr commit: 85c70a7495]
2021-08-22 23:56:07 -07:00
kjayapra-amd aae0d4ca51 SWDEV-286346 - Implement Arena Memory Object for externally created memory.
Change-Id: I8530602d89edf83ad367c52167e48a1559ee1e18


[ROCm/clr commit: 1c49d8816c]
2021-05-18 10:59:52 -04:00
Brian Sumner 567d9cc617 SWDEV-285332 - move common context into parent
Change-Id: I99ceb62ad948e1fa9d1dcaa5ede98626cc95bea7


[ROCm/clr commit: 6d09a83b2d]
2021-05-09 09:18:39 -07:00
pghafari b6e62f99d0 SWDEV-245532 - HIP - Vulkan interop semaphores
linuxpro syntax update

Change-Id: Id77e0d82c504fb7a1bd8edfac7dc962e428c87b4


[ROCm/clr commit: 89168d4812]
2021-04-28 13:48:25 -04:00
pghafari 45a930465e SWDEV-245532 - HIP - Vulkan interop semaphores
linuxpro syntax update

Change-Id: I947f24f67ed59c15fe5047348b0c005e19e93544


[ROCm/clr commit: 6e69bcef9e]
2021-04-28 07:44:22 -04:00
pghafari dbb9c74540 SWDEV-245532 - HIP - Vulkan interop semaphores
Change-Id: Ib79328ce4ec2f8ac3aade59fde4fd30e2d6e5cba


[ROCm/clr commit: 582d12b32f]
2021-04-26 13:20:58 -04:00
Vladislav Sytchenko 7b3014ec69 SWDEV-280473 - Remove HSAIL support from the ROCm backend
In adition to removing the HSAIL logic from the ROCm backend, guard all
of the HSAIL includes in the common layer behind the WITH_COMPILER_LIB
define. This is to avoid including HSAIL headers when building with
no support for it.

In common logic replace the use of the aclType enum with the new
Program::file_type_t enum. This is essentially a local copy of the HSAIL
enum to avoid including any HSAIL headers.

Change-Id: Ica0651d1b29dfccc255cc584eb82a5cb35e1b520


[ROCm/clr commit: cbeb372e46]
2021-04-12 14:55:06 -04:00
Jason Tang 44eb6b02dc SWDEV-1 - Change file mode back to 644
Change-Id: I433740d65c8f648e346107f6d8fa57d69463b713


[ROCm/clr commit: c13f9df42a]
2021-03-05 10:17:58 -05:00
kjayapra-amd d4707ff166 SWDEV-259566 - Adding support to retrieve handle for offsetted pointer.
Change-Id: I4a700c31a9ab481c4ea43923af57e83247555ab0


[ROCm/clr commit: 95e3a6d985]
2021-03-04 12:28:59 -05:00
Vladislav Sytchenko 086bdf83b4 SWDEV-232428 - Push hostcall implementation to the device layer
This change unifies the hostcall implementation for all the backends,
by pushing the common logic to the device layer. This is done by
replacing the use of hsa_signal_t with device::Signal (a light wrapper
around it).

Change-Id: I7b6fca7930b5a0b199da5d85e2e048354cc04e7b


[ROCm/clr commit: 671778bdd3]
2021-02-16 17:19:57 -05:00
kjayapra-amd 4583cbafee SWDEV-270013 - Allocate kernel_arguments from kern_arg & finegrain pool instead of coarse grain.
Change-Id: Id4c6977934fdd6ef2311f6e75593801f1e51983c


[ROCm/clr commit: 2df099df9e]
2021-02-15 18:20:08 -05:00
kjayapra-amd 4693ecf345 SWDEV-270013 - Adding code to differentiate between kern_arg + fine_grain and fine_grain segment of system memory.
Change-Id: Id0404b2dab8561946ad0a90a77030582f7e021a4


[ROCm/clr commit: 85fafb0561]
2021-01-28 09:48:17 -05:00
Tony Tye 902cf1a239 Update code object handling for GSL, PAL and ROCm
- Correct GSL path to report targets using the TargetID syntax.

- Correct GSL path to check compatibility of code objects when
  loading.

- Add concept of an device isa and create a registery used by ROCm,
  PAL and GSL.

- Support XNACK and SRAMECC target features consistently for PAL and ROCm.

- Correct logic for NullDevices and asserts to avoid memory coruption.

- Allow all NullDevices to be created for HIP.

- Numerous other code improvements.

Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e


[ROCm/clr commit: c7e8d91e14]
2021-01-14 11:11:51 -05:00
Tony Tye 3463b51be1 Make roc::Device::getBackendDevice non-virtual
Make roc::Device::getBackendDevice non-virtual and only defined by
roc::Device and not roc::NullDevice. It is only meaningful for an
online device.

Change-Id: Ic333a3a42f650bea524e80dab587a34f1353e593


[ROCm/clr commit: 08f3126f6c]
2021-01-13 08:24:28 +00:00
Tony Tye 44f9840f0e Make roc::Device constructor and create() method private
Make roc::Device constructor and create() method private as creating
devices is performed by the factory static methods.

Change-Id: Ifa2edb8ec645b4ce6070c4aef355b9ef88294cf1


[ROCm/clr commit: c1ea70b539]
2021-01-13 08:24:28 +00:00
Tony Tye 29ca46821b Add stronger checking
- Add assertions to enforce that objects are of the correct kind and
  have been allocated.

- Make destructors check if objects have been allocated before
  deleting.

- Operations that require a non-NullDevice return failure if given a
  NullDevice.

- Use static_cast rather than reinterpret_cast when cohersing from a
  base class to a derived class.

Change-Id: I02ee0ea9d7982fd7ca29d49c9b02cfae111b7127


[ROCm/clr commit: e5431676d4]
2021-01-13 08:24:28 +00:00
Aryan Salmanpour e8c7cf569f Add an environment variable for setting a global CU mask
Change-Id: I773b152023c7b8e1e679a42015748f9b23fd946d


[ROCm/clr commit: d03ee6eff6]
2020-11-20 10:05:09 -05:00
Jason Tang 091f1e8e85 Change file mode 755 back to 644
Change-Id: I4ba5d66997ffd3331c56674d4bf805160dcdf049


[ROCm/clr commit: 25cc965c76]
2020-10-19 15:09:32 -04:00
Sarbojit Sarkar 70d71642d2 [perf]hipMalloc performance optimization
Change-Id: I6e8a918cc1c4cafad197b09e10755cd180e11ead


[ROCm/clr commit: 4a025e1a87]
2020-10-06 03:19:41 -04:00
German Andryeyev 7229c259ca Add support for CPU device in advise
Change-Id: I7250e0183580c14cd3d6050ef85f9ce26e36f4a8


[ROCm/clr commit: df63547906]
2020-10-05 12:52:46 -04:00
Aryan Salmanpour b01d49542c Fix a crash when printf used in a kernel launched on a stream with custom CU mask
SWDEV-249719 - root cause: queues with custom CU mask are not inserted
into queuePool_ (i.e., queue of reusable HSA queues) of ROC device class
causing a crash when creating hostcall buffers for printf

Change-Id: Ieee7005d9a5a30b3113394ce23ee65927126d0d6


[ROCm/clr commit: 2e199bd492]
2020-09-25 09:25:19 -04:00