Test Thunk multiple threads register and deregister same userptr race
condition, to emulate application register same userptr to multiple
GPUs using multiple threads.
Use thread barrier to sync the threads, to start register userptr at
same time.
Change-Id: I6723dc39f75908026fa14a490e39e1fe49a13a1b
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 92076f6f1b]
This patch is to add yellow carp support on thunk.
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: Icfecc3fd1f472c9924f934c6a5352448356d83df
[ROCm/ROCR-Runtime commit: a55551309c]
Limit test buffer size to 3/4 total VRAM size, and max 1GB.
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I937e10b0a6bd8215e3865b50f22ce75b3982a6f7
[ROCm/ROCR-Runtime commit: fd131e875e]
Add a blacklist for gfx1xxx12, using the same list as gfx1012
Change-Id: I7e620dba8a36f6f89152a48066234884150a15dd
[ROCm/ROCR-Runtime commit: b2fb2a3470]
Warn that HSA_FORCE_ASIC_TYPE may be needed if the engine major id
assertion fails.
Change-Id: I67e01e99c3d1bdc84630ccfae489dce5e77961b5
[ROCm/ROCR-Runtime commit: 408fca0278]
Aperture locking is too fine-grained, it has race between find userptr
and allocate userptr object.
Change _fmm_allocate_device and fmm_allocate_memory_object to not take
the aperture lock, the callers take it, this implements an atomic find
userptr or allocate a new one.
Change-Id: I6773404e22c1f4382a211c5a9817df23c5534a2a
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: c4d5ee28f0]
This is causing PSDB/OSDB failures so disable it until investigation is
done
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I666cd45fdf8ae585486adc7cf43eacd1700704bb
[ROCm/ROCR-Runtime commit: 5796225011]
To test ACCESS_IN_PLACE GPU mapping update to system memory.
Change-Id: I5b990215f39692e829128d848125e1ae0d571e03
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 351a41ac76]
CoherentHostAccess flag member moved from HSA_MEMORYPROPERTY
to HSA_CAPABILITY struct. Now this is reported to the
topology as a capability of the device instead of a device
memory property.
Change-Id: I48e43e4b4a0635b711b62933734587facdfbf88b
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: f85b428265]
it is to optimize memory allocation latency, which
changes alignment from 2MB to 1GB.
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: I7818e9f13b17e2c0992e75b17f978dc03a018a57
[ROCm/ROCR-Runtime commit: 973b35bc06]
Device cgroup can limit accessible devices. Handle the cases where
p2p_links are not accessible
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I513dc75ad14e4f2d426cf2fbd301bcba12b4ee54
[ROCm/ROCR-Runtime commit: e28b3fe8b3]
blacklist some svm related test cases until they are solved.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I05e2d965d89bcbf3d43bed2873297e98ad0738ef
[ROCm/ROCR-Runtime commit: 9e0fc7f3c6]
It needs to skip LocalMemoryTest because it doesn't support local memory
with no dgpu path.
Change-Id: Iedb6f6deba55e239b21747d933cf2d7005623106
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
[ROCm/ROCR-Runtime commit: 55cb03dbae]
The updated sp3 compiler does not support GFX10 temperaly.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Change-Id: Idd9336663814b7925d9742eee0bd310d00945d3e
[ROCm/ROCR-Runtime commit: b8ef20e35c]
Fixes assembler error. The SP3 backend if already set to FamilyId.
Change-Id: I7721a555b05688b16993a03242a765694594825a
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 86a68b2774]
Increasing the timeout will avoid some test failures. This shouldn't
mask any issues as any incomplete shaders should still hang and would
just time out at 180 sec instead of 120 sec.
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: If4e893ab80d9d159bd0b8b112aa7574abc5e4f44
[ROCm/ROCR-Runtime commit: 9168dfe041]
amdgpu_cs_submit can fail intermittently if another process has too much
memory reserved at the time. Allow a small percental of command
submissions to fail to make the test more robust.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If9f62b2b6f67be71420016d4e38d4dd6b6bca9a5
[ROCm/ROCR-Runtime commit: 8baf02e80b]
Delayed page faults from a terminated process can be attributed to the
next process with the same PASID. Work around that by adding a delay
after the Exception tests to allow the kernel to clean up any fault
storms before the next test.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Id310c13ea9eb92b04d37b95d91a0dd60bd9954e5
[ROCm/ROCR-Runtime commit: bd68646772]
If the signal arrives too late, it interrupts waitpid. Handle this
situation gracefully.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If4925c352c81ba7fef8a940460b91f5e720b451e
[ROCm/ROCR-Runtime commit: 25288e07dc]
It is gfx90a VF device ID, for virtualization support.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I9e51d6b58c702d185e6758a9c511e9b8bc72c2f5
[ROCm/ROCR-Runtime commit: d8d8e3ddd6]
After unregistered memory is added, now default access attribute
is returned based on xnack configuration.
Change-Id: I8ef44fe1e165ba009622e8112436c1f7a683f6cb
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: 0a2d7d8319]
It is to address gfx90a HW memory model changes.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: Ie5c5c5ee5ddfb75c0b4f625baf59ce37b4cc7c31
[ROCm/ROCR-Runtime commit: a6703395f6]
KFDSVMEvictTest.QueueTest shader asm code need update to support gfx10
and gfx9, skip the test to unblock CI test.
Change-Id: Id2842127cf5fc98a652afa82035a4b3603bf5c33
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 7d53e94750]
Fixes assembler error. The SP3 backend if already set to FamilyId
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: If127a71693b293e2748b06efb668a359b939cd14
[ROCm/ROCR-Runtime commit: e06d549337]
gfx10 GPUs such as gfx1030 need new assembly code to test
the GWS. Removed scalar stores and added proper usage of DLC and
VSCNT waits. Removed gfx9-specific assembler meta-values.
Change-Id: I2bbdb77692ace2dba10997f721ba9decaa9be82a
[ROCm/ROCR-Runtime commit: c1c46d9c97]
KFD changes are ready, all SVM tests should pass now. Skip SVM tests if
the SVM API is not supported.
Change-Id: I5e358565a0458eea45eae0aaf4969ce3a36574a7
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: e8990cf830]
New properties SVMAPISupported added in Thunk spec HSA_CAPABILITY, read
from sysfs from KFD topology.
New local memory property flag CoherentHostAccess added to Thunk
HSA_MEMORYPROPERTY, read from sysfs from KFD topology.
Change-Id: I83933f0e5a61508508168873209dba4af0b77295
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: e8f369b385]
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.
Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: bb441d0bdd]
Add function definitions to support SVM (shared virtual memory)
and xnack set.
Change-Id: Ia97ad9d0c449d8d500d799f702e1a58e87d65a56
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: c44a4be776]
Add svm (shared virtual memory) range and xnack mode
APIs.
Change-Id: Ibd8d7fe566dc200730da0c892caa71aad7589ebd
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: ce26348f3a]
Query the KFD interface version once and store it in a global variable.
This makes it more efficient for KFD APIs to query the API version
later.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I267f3465f754e78fb21a7c42c5877cd68eaa9d05
[ROCm/ROCR-Runtime commit: 43ce63b68b]
This can be overwritten by changing BUILD_SHARED_LIBS=true, but we
default it to static to allow for merging into ROCr
Change-Id: Ic286ef7903a5bc788fe3b84bb13b15bdd3a6f60b
[ROCm/ROCR-Runtime commit: d748d6dce7]
These are failing as well, due to the SP3 shader merge. Blacklist them
as well to avoid more segfaults
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I07e142a1aad9b2a5304230f333eeaf4392bea4b7
[ROCm/ROCR-Runtime commit: 66da1c9cd2]
The old bit was deprecated, because old buggy user mode depends on it
being always 0. The correct value is now reported in a new bit. New user
mode handles the reported EDC setting correctly, so we can report the
correct value in a new bit.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ib5d5ed2519810e650458c6b69c97670dab435ddb
[ROCm/ROCR-Runtime commit: d287c60246]
This reverts commit 07b0758bee.
SVM is not ready yet. This was merged by accident.
Change-Id: I8901594a72e785ba5d25a6448718a570e76fe117
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: 41cd7aea2f]
This reverts commit 08e65a397a.
SVM is not ready yet. This was merged by accident.
Change-Id: I1bee102823e7e612be8e8f2e0f50580e8692cc80
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: 5edd00136d]
This reverts commit a247255a6a.
SVM is not ready yet. This was merged by accident.
Change-Id: I372f7d293fd38429ec570bc0e0add7e612871594
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: 4ebda913cd]
This reverts commit 2c1c2cfdf8.
SVM is not ready yet. This was merged by accident.
Change-Id: I7c0d835a0d3a448f2ac1094f818601e5d6363045
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: a8f4c43fef]
Philip Yang
Aaron Liu
Kent Russell
Sean Keely
changzhu
Alex Sierra
Yifan Zhang
Harish Kasiviswanathan
Chengming Gui
Mike Li
Felix Kuehling
Eric Huang
Joseph Greathouse
Roberto Di Remigio
Cole Nelson