Commit Graph

48 Commits

Author SHA1 Message Date
Ori Messinger f2173254e4 Report domain with HsaNodeProperties
PCI domain has moved to 32-bits to accommodate virtualization,
so a 32-bit integer is exposed for domain to reflect this change.

Change-Id: I0d767acadcdc8e4277db203b5865dd67dd001cef
Signed-off-by: Ori Messinger <ori.messinger@amd.com>
2019-08-23 11:59:19 -04:00
Jonathan Kim 836dfd0752 libhsakmt: update dbg enable trap and add query debug events
Add data out for enable trap to return poll fd to user space.
Add query debug events interface.

Change-Id: Ia4afde1cf167e6aa61d502380a8b329ee89d5f44
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
2019-08-07 10:04:33 -04:00
Oak Zeng 45d717d860 Add node property to report number of GWS
Change-Id: I81263ca7ebfa3c0f9f1be78acfa0920e47d551b1
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2019-06-10 21:07:45 -05:00
Philip Cox c2c1385e29 libhsakmt: Update wave suspend/resume API
This is updating to the new suspend and resume API for the
KFD and the thunk.  We now support passing in a list of queues
to suspend, and not just all of the queues for the process.

The kfdtest testcase was also updated so it still compiles.

Change-Id: I71d1b178476bd9df0c311bdedaa6a891528cebcf
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
2019-05-03 10:32:47 -04:00
Philip Cox d21e9d5bbd libhsakmt: Update HsaQueueInfo for GetQueueInfo
hsaKmtGetQueueInfo needs to return the control stack size, and the
wave state size for the debugger.  These changes are needed to support
returning the new values.

Change-Id: Ib4c60e0ea34446c06aef4a86996250989f348a69
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
2019-05-03 10:32:47 -04:00
Oak Zeng 804aa90a22 Add MMIO_REMAP heap type
Add a MMIO_REMAP heap type and expose mmio virtual address
through HsaKmtGetNodeMemoryProperties



Change-Id: I1e585e6dfbec8fa7c85f1dda7b89b763a8e2c439
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2019-04-30 15:40:50 -05:00
Oak Zeng 1046a1fd72 Introduce XGMI SDMA queue type
Change-Id: I8c6ff04f92c2bbea0bab94ddb8cc4cceb5d74d02
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2019-03-07 19:42:20 -05:00
Oak Zeng 414a3508d6 Thunk interface to get SDMA engine info
Add SDMA engine info fields to node properties and
modify get node properties API to read SDMA engine
info from sysfs

Change-Id: Iea877b5bc008cc9df9405daf564a359535f1bc9f
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2019-03-07 14:09:43 -05:00
Oak Zeng dd6c6e7bc6 Revert "Add more SDMA queue type"
This reverts commit 5173e71810.

Change-Id: I0a52a44a5d141b398d0898bea52e4dcf41dc950f
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2019-01-21 10:37:56 -06:00
Philip Cox 37858f2311 Initial gfx9 debugger node suspend/resume
Change-Id: I2a5dac3d02265c11f5b6985ab457e2d1caa0a033
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
2019-01-11 09:00:54 -05:00
Eric Huang 8ee93b3187 libhsakmt: add RAS support v2
RAS feature enabling bit and errors return are implemented in
existed topology and event mechanism.

v2: change library interface.

Change-Id: I75807c080b5b26e8115240b05b3d7016cb05a31a
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
2018-12-13 10:17:12 -05:00
Eric Huang 29d11d02e8 Revert "libhsakmt: add RAS support"
This reverts commit 1fbe010354.

Change-Id: I739b17e057f2a8a0f4375741955209d2477c704a
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
2018-12-08 19:42:33 -05:00
Eric Huang 1fbe010354 libhsakmt: add RAS support
RAS feature enabling bit and errors return are implemented in
existed topology and event mechanism.

Change-Id: I9b018bba80cf4a6998e42a7bff64318c689b1d2a
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
2018-11-23 11:42:34 -05:00
Oak Zeng 5173e71810 Add more SDMA queue type
Those new types are used to create SDMA queue on specific engine

Change-Id: I91c3bcc14fef7404cf42b256a18651432e171091
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2018-11-13 14:52:01 -05:00
Gang Ba c54c1dbdcb Add code to support packet capture and replay in the Thunk
This feature only support dgpu for now.

Change-Id: Ic766ec06892c955dd605ecc335a776335edc0df2
Signed-off-by: Gang Ba <gaba@amd.com>
2018-10-31 16:53:46 -04:00
Philip Cox 105edd4bb4 Fix Debug Thunk spec mismatch
Move debug trap support capabilities to their own
structure to fix thunk spec vs header mismatch.



Change-Id: I6694601bfa36097502c8ab932e082d7a4645d5b2
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
2018-10-24 11:32:12 -04:00
Shaoyun Liu f9faf05fd9 Thunk: Add xgmi thunk interface definition
Add XGMI related defines in thunk according to the document
HSAKMT library interface specification v1.16

Change-Id: Ib25ff0ddf7380c97d06bd76fb730915e7c634270
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
2018-08-27 13:13:37 -04:00
Philip Cox db92d5af23 Add GFX debug trap control code
Add initial support for the kfd debugger trap support
for GFX9 chips.

   - Adding support for Enable/Disable trap support
   - Setting debug trap support data
   - Setting wave launch trap override
   - Setting wave launch mode

Change-Id: If39f2395c4b6cf56249cf76f1c44cfcbdcef891c
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
2018-08-22 14:40:15 -04:00
Philip Yang 1bf93d4e89 Export microcode version of sDMA
Change-Id: I86fa5da5e72af13a2e76e6e3be4667a7220923d5
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2018-03-19 08:38:50 -04:00
Laurent Morichetti 056ddbbc82 Silence Valgrind warnings
Change-Id: I8803f3d310fccd69d0d04b2464b00dccc40270e3
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2018-01-25 16:48:17 -05:00
Oak Zeng 68a2d286ca Use drm render device to map kfd BOs
Previously kfd device is used to map memory for CPU access.
However this is not compatible with how TTM handles CPU mapping
on eviction - memory won't be unmapped and remapped on restore.
This fixes the issue by mmapping memory using DRM render device.

This patch requires a coordinated kernel driver change to work.
To make it compatible with old kernel driver, some temporary codes
are included. Once the coordinated kernel driver is checked in,
the temporary codes can be removed.



Change-Id: Ie7b304c4a82b7e8d5ab703acb81d66430af4f0bc
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2017-11-02 09:06:26 -04:00
Amber Lin 683fc96325 Implement hsaKmtGetQueueInfo interface
For items in HsaQueueInfo, control stack information comes from KFD, CU
mask information is maintained in Thunk, and others (queue detail error
and queue type extended) are ignored (value = 0) at this point.

Change-Id: Ib21370b0f52b2bb4ebe6a9b4b6ec6139cccb25ca
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-06-01 14:15:54 -04:00
Amber Lin 9f19acbdb7 Add more non-priv PMC blocks to gfx70x/GFX7
HSA Thunk Spec was updated to include more non-privileged blocks for
profiling. This patch adds those newly added non-privileged blocks for
gfx70x.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>

Change-Id: Id745ac236c871e8e61a128a2460784f9c9c354b6
2017-04-25 13:08:10 -04:00
Amber Lin 73eff30d7d Add TCA block to PMC support
Add TCA to PMC tables.

Change-Id: Ia4164ab4581ea3f539706f534f672e5c24f5362f
2017-03-20 10:22:21 -04:00
Harish Kasiviswanathan e79521b556 Add API entrypoints for Cross Memory Attach
Implement two new API for cross memory read and write operation.
 - hsaKmtProcessVMRead
 - hsaKmtProcessVMWrite

Add new ioclts necessary for the above APIs.

Change-Id: I0c153e3b4e1f32b7a8b102ad5c774d9ae9bfc2fa
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2017-02-17 16:59:51 -05:00
ozeng cb0f851560 libkmt: Misc fixes in thunk
1. Translate thunk queue priority to kfd priority
2. Initialize event SyncVar
3. Added HSAint32 data type


Change-Id: I7decc1be7cbe9c84cb670d9a7c99050b62ba98f3
2017-02-06 17:19:40 -05:00
Harish Kasiviswanathan 559e31d6ff Add API entrypoints for IPC functionality
Implement three new APIs for IPC buffer sharing:
	-hsaKmtShareMemory()
	-hsaKmtRegisterSharedHandle()
	-hsaKmtRegisterSharedHandleToNodes()

Add new ioclts necessary for the above APIs.

Change-Id: Ia2b4d0dc91ec64bff959395d11c0536467404792
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2016-11-28 16:19:22 -05:00
Amber Lin 51e4d27c37 Add pointer attributes API
Add two pointer attributes APIs:
hsaKmtQueryPointerInfo - allow the user to query the memory information
    using a pointer. This pointer can point to any address inside the
    range known to HSA.
hsaKmtSetMemoryUserData - allow the user to attach data to a pointer to
    add memory tracking information. This pointer must match the start
    address of a memory allocation or registration.
TODO: This patch implements support on dGPU. Needs to add APU.

Change-Id: I4711809274248434901f0794f50ebfa13a7371a8
2016-09-07 17:24:46 -04:00
Yong Zhao 8351b3d2e8 Implement hsaKmtGetTileConfig in thunk
Change-Id: Iba8d8efa46e3c268a03442d3db568e1b19230e94
2016-09-06 16:24:29 -04:00
Lan Xiao 9cbbf30be7 libhsakmt: Add MarketingName and AMDName for all nodes - CPU & GPU
HSA thunk API is currently reporting engineering name to MarketingName
and returning NULL when querying for AMDName.

-Change current name reporting from MarketingName to AMDName.
-Use libpci to get MarketingName



Change-Id: I819a6de7b067a2e724a6695e7d800274b83a71f8
Signed-off-by: Lan Xiao <Lan.Xiao@amd.com>
2016-08-23 10:49:27 -04:00
shaoyunl 79077811f5 Add Imprecise flag for memory access fault
KFD may not be  able to provide the precise VM fault address and status.
This flag will indicate whether the event data has the fault details

Change-Id: I15ffd5c25f555003c6450cc0700efb769418f76b
2016-03-14 15:17:17 -04:00
Felix Kuehling 0ed29f5191 Report SVM heap in topology
The Runtime requested this information so they can tell easily
whether a pointer is part of HSA shared address space or not.


Change-Id: If2041ed34031636677d692bc2dc6625634027ed4
2016-03-14 11:52:36 -04:00
Harish Kasiviswanathan 1c1bc32477 Sync IOLINK defines to thunk spec
Current thunk spec v1.07 dated Feb 1, 2016

Change-Id: Ie1821f7f1903ac48b76cb68d452a6073d3a3c8d9
2016-03-11 18:59:57 -05:00
Felix Kuehling 61ec3df2f9 Add support for hsaKmtRegisterGraphicsHandleToNodes
Change-Id: I6fd7154dea78188480d5cb89ac237bad572356c4
2016-03-10 11:16:02 -05:00
Yair Shachar c42ec0b82c name unnamed struct within HsaMemMapFlagd union
For aligning with RT definitions

Change-Id: I4dca0c5818fdcea6c596a48c7516835fc595a289
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com>
2016-03-07 18:43:03 +02:00
Ben Goz 7070f7ec5e Adding support to hsaKmtMapMemoryToGPUNodes
Change-Id: Iab6222402a43c3cd31b0efc5a316a6482986258e
Signed-off-by: Ben Goz <ben.goz@amd.com>
2016-02-09 17:34:29 +02:00
Ben Goz e37863d7f2 Adding HsaMemMapFlags struct
Change-Id: Ib0ee6dede1169582fd58bfca648347c3f8aa0b54
Signed-off-by: Ben Goz <ben.goz@amd.com>
2016-01-31 05:16:53 -05:00
Ben Goz e61500c46e Adding support for new AQL Queue Memory allocation
Change-Id: If84fc4b961627dbdd0b77b1c509a3c9a4c709b9f
Signed-off-by: Ben Goz <ben.goz@amd.com>
2015-10-22 13:13:54 +03:00
Felix Kuehling b94ae66c62 Update HsaMemFlags.ui32.CoarseGrain comment
As advised by Paul Blinzer

Change-Id: Icabf4acd94866ddbbe53faf48a71e1113f0c76b6
2015-10-05 16:48:50 -04:00
Felix Kuehling f2f45cc0e4 Add CoarseGrain memory flag
Change-Id: If8ac0339ae8c809c6e6a4f56592a4061d110ea94
2015-09-30 18:07:04 -04:00
Amber Lin 082f8314c4 Sync up HSA_ENGINE_ID type with Windows/Perforce
HSA_ENGINE_ID in Perforce added ui32 to the typedef while in Git it doesn't.
This causes conflicts to RT applications. Decision being made is to change Git
to match Perforce.

Change-Id: I7e9c6437b023bb23ec9578737f8534e9453589b9
2015-09-24 00:10:52 -04:00
Amber Lin a3925a3a19 Enable version info via thunk interface
- Replace HSAuint32 with HSA_ENGINE_ID for EngineId type so it explicitely
  presents version information for ucode and GfxIP
- Created a GfxIP lookup table to pass the version information. This lookup
  searches for matching device ID.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: John Bridgman <John.Bridgman@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
2015-07-31 14:56:33 -04:00
Oded Gabbay eb2d3cfcdf Add missing DoorbellType field to HSA_CAPABILITY
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
2015-05-02 12:10:04 +03:00
Oded Gabbay f0a7fcccc9 Match as much as possible hsakmt.h and hsakmttypes.h to p4
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
2015-02-03 11:13:13 +02:00
Ben Goz 25441796bd Supporting new thunk spec - adding relevant memflags
Signed-off-by: Ben Goz <ben.goz@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@amd.com>
2015-02-01 14:33:33 +02:00
Alexey Skidanov 36ccd7f867 Adding memory event type and definition of memory exception data
Signed-off-by: Alexey Skidanov <Alexey.Skidanov@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@amd.com>
2014-11-27 15:54:21 +02:00
Ben Goz bd7e10b0ec Adding support in allocating executable memory
Signed-off-by: Ben Goz <ben.goz@amd.com>
2014-12-07 14:36:21 +02:00
Oded Gabbay 813af2b89a Add definitions of HSA functions and types
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
2014-07-29 10:55:52 +03:00