76333 Commits
Author SHA1 Message Date
kent.russell@amd.com 3fa81a26e4 rocm_smi.py: Fix order of CE and UE reporting
We append CE then UE, but in the table right after, it goes UE then CE.
Fix the order of the table, and add capitals for consistency

Change-Id: I208f37685508ab1e2ff83d3456620bbbf3a16268


[ROCm/amdsmi commit: 248c6f79f4]
2022-12-08 12:28:37 -05:00
Dalibor Stanisavljevic a2a38a5aa2 SWDEV-371210 - Fixed pcie link speed
Change-Id: I736d8095c05ee0685db0c209ea0fdb5832e14744
Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>
2022-12-08 12:03:50 -05:00
Dalibor Stanisavljevic 4893f52636 SWDEV-371210 - Fixed pcie link speed
Change-Id: I736d8095c05ee0685db0c209ea0fdb5832e14744
Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>


[ROCm/amdsmi commit: a2a38a5aa2]
2022-12-08 12:03:50 -05:00
Dalibor Stanisavljevic b93baf686d SWDEV-371191 - Fixed amdsmi_get_bad_page_info
Change-Id: I97134f548164eff588d9caa9b9f31c4361c78804
Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>
2022-12-08 12:03:34 -05:00
Dalibor Stanisavljevic 2763959846 SWDEV-371191 - Fixed amdsmi_get_bad_page_info
Change-Id: I97134f548164eff588d9caa9b9f31c4361c78804
Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>


[ROCm/amdsmi commit: b93baf686d]
2022-12-08 12:03:34 -05:00
sdashmiz 6a661a9f15 SWDEV-367833 - return success for null stream
- return success for query on null stream

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Ifc2cf705e1962565c68de7b1777f870c5a4d56cf


[ROCm/clr commit: fefff25364]
2022-12-08 11:41:37 -05:00
sdashmiz fefff25364 SWDEV-367833 - return success for null stream
- return success for query on null stream

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Ifc2cf705e1962565c68de7b1777f870c5a4d56cf
2022-12-08 11:41:37 -05:00
kjayapra-amd e47e613948 SWDEV-363865 - Use COMGR path to unbundle code object in HIPRTC.
Change-Id: Ie6a48ab2792bb3f7ae1e62d716ecc35b8e24fe16


[ROCm/clr commit: 7319dc36c1]
2022-12-08 08:34:33 -05:00
kjayapra-amd 7319dc36c1 SWDEV-363865 - Use COMGR path to unbundle code object in HIPRTC.
Change-Id: Ie6a48ab2792bb3f7ae1e62d716ecc35b8e24fe16
2022-12-08 08:34:33 -05:00
Dalibor Stanisavljevic b4b761d02f SWDEV-370223 - Change the name of the header to amdsmi.h
Change dev to device_handle throughout the file
Change the pcie_info pcie_speed field type to uint32_t
Add AMDSMI prefix before amdsmi_mm_ip enum

Change-Id: I242145389ddc3f2ad05dfd6ca371640f4d118fc4
Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>
2022-12-08 13:34:34 +01:00
Dalibor Stanisavljevic b48024d883 SWDEV-370223 - Change the name of the header to amdsmi.h
Change dev to device_handle throughout the file
Change the pcie_info pcie_speed field type to uint32_t
Add AMDSMI prefix before amdsmi_mm_ip enum

Change-Id: I242145389ddc3f2ad05dfd6ca371640f4d118fc4
Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>


[ROCm/amdsmi commit: b4b761d02f]
2022-12-08 13:34:34 +01:00
Chauncey Hui 22ca7dc91e SWDEV-2 - Change OpenCL version number from 3540 to 3541
[ROCm/clr commit: cbc66bf89d]
2022-12-08 03:00:09 -05:00
Chauncey Hui cbc66bf89d SWDEV-2 - Change OpenCL version number from 3540 to 3541 2022-12-08 03:00:09 -05:00
David Yat Sin ecdebef0b9 Add agent info for fw and sdma ucode
Add two new agent info fields:
HSA_AMD_AGENT_INFO_UCODE_VERSION
HSA_AMD_AGENT_INFO_SDMA_UCODE_VERSION

Change-Id: I51cb853724b23a26e945e5c1ac32c16d0cb3bc31
2022-12-07 19:07:31 -05:00
David Yat Sin 652a617846 Add agent info for fw and sdma ucode
Add two new agent info fields:
HSA_AMD_AGENT_INFO_UCODE_VERSION
HSA_AMD_AGENT_INFO_SDMA_UCODE_VERSION

Change-Id: I51cb853724b23a26e945e5c1ac32c16d0cb3bc31


[ROCm/ROCR-Runtime commit: ecdebef0b9]
2022-12-07 19:07:31 -05:00
pghafari ed6108c2d6 SWDEV-368166 - hipGraphAddMemcpyNode1D paramcheck
adding parameter check for hipGraphAddMemcpyNode1D

Change-Id: I94dc944bd55ea04b8e9288a27c8f58dd3720161b


[ROCm/clr commit: 5acc2cdcc2]
2022-12-07 18:29:11 -05:00
pghafari 5acc2cdcc2 SWDEV-368166 - hipGraphAddMemcpyNode1D paramcheck
adding parameter check for hipGraphAddMemcpyNode1D

Change-Id: I94dc944bd55ea04b8e9288a27c8f58dd3720161b
2022-12-07 18:29:11 -05:00
Saleel Kudchadker 7ba49616e9 SWDEV-371123 - Use barrier value packet for event records
Change-Id: I5e5e5e89e0d96a2430b4682d168b76848fa5b94e


[ROCm/clr commit: 4f64d89026]
2022-12-07 17:57:36 -05:00
Saleel Kudchadker 4f64d89026 SWDEV-371123 - Use barrier value packet for event records
Change-Id: I5e5e5e89e0d96a2430b4682d168b76848fa5b94e
2022-12-07 17:57:36 -05:00
Wenkai Du bb27f5c8ba Fix typo in detecting Intel platforms (#661)
[ROCm/rccl commit: b953544a59]
2022-12-07 13:36:11 -08:00
Wenkai Du b953544a59 Fix typo in detecting Intel platforms (#661) 2022-12-07 13:36:11 -08:00
Jason Albert b4cde9adec Doxygen related cleanup
- Made all doxygen formatting consistent with @ use
- Added @file definition to fix a lot of missed references
- Simplified return definitions for easier maintainability
- Fixed bad formatting and missing section closures

Signed-off-by: Jason Albert <jason.albert@amd.com>
Change-Id: I02cc55f7d0ae277f318a4620978af096f56cac6c
2022-12-07 10:41:33 -05:00
Jason Albert 599141cf35 Doxygen related cleanup
- Made all doxygen formatting consistent with @ use
- Added @file definition to fix a lot of missed references
- Simplified return definitions for easier maintainability
- Fixed bad formatting and missing section closures

Signed-off-by: Jason Albert <jason.albert@amd.com>
Change-Id: I02cc55f7d0ae277f318a4620978af096f56cac6c


[ROCm/amdsmi commit: b4cde9adec]
2022-12-07 10:41:33 -05:00
Jason Albert 3b1584915b Set status codes to fixed values
Assign fixed values to status codes to prevent enum auto assign
from changing them.

Signed-off-by: Jason Albert <jason.albert@amd.com>
Change-Id: I0ca1de7ba503ce8a75c56026f5a54e212204595b
2022-12-07 10:39:26 -05:00
Jason Albert 0e5519726b Set status codes to fixed values
Assign fixed values to status codes to prevent enum auto assign
from changing them.

Signed-off-by: Jason Albert <jason.albert@amd.com>
Change-Id: I0ca1de7ba503ce8a75c56026f5a54e212204595b


[ROCm/amdsmi commit: 3b1584915b]
2022-12-07 10:39:26 -05:00
Chauncey Hui 9323ba1345 SWDEV-2 - Change OpenCL version number from 3539 to 3540
[ROCm/clr commit: c8e66f4cf8]
2022-12-07 03:00:08 -05:00
Chauncey Hui c8e66f4cf8 SWDEV-2 - Change OpenCL version number from 3539 to 3540 2022-12-07 03:00:08 -05:00
Jaydeep Patel 2411eeba32 SWDEV-366086 - Validations for negative scinerios.
Change-Id: Icca87de775bf7f8c4d18f911f7bee21fafdcff55


[ROCm/clr commit: e2279b3869]
2022-12-06 21:27:37 -05:00
Jaydeep Patel e2279b3869 SWDEV-366086 - Validations for negative scinerios.
Change-Id: Icca87de775bf7f8c4d18f911f7bee21fafdcff55
2022-12-06 21:27:37 -05:00
Cole Ramos c57f435ef0 Merge pull request #50 from AMDResearch/python-logging
Python subprocess logging

[ROCm/rocprofiler-compute commit: 7aa073d91c]
2022-12-06 16:22:17 -06:00
Cole Ramos 7aa073d91c Merge pull request #50 from AMDResearch/python-logging
Python subprocess logging
2022-12-06 16:22:17 -06:00
colramos-amd d45ab313f5 Throw a warning if unable to update timestamps
Signed-off-by: colramos-amd <colramos@amd.com>


[ROCm/rocprofiler-compute commit: efe6d9f19a]
2022-12-06 15:24:36 -06:00
colramos-amd efe6d9f19a Throw a warning if unable to update timestamps
Signed-off-by: colramos-amd <colramos@amd.com>
2022-12-06 15:24:36 -06:00
colramos-amd 3e4eab2a57 Merge branch 'dev' of github.com:AMDResearch/omniperf into python-logging
[ROCm/rocprofiler-compute commit: 99d603b9dd]
2022-12-06 14:50:14 -06:00
colramos-amd 99d603b9dd Merge branch 'dev' of github.com:AMDResearch/omniperf into python-logging 2022-12-06 14:50:14 -06:00
Tao Sang ea9808ac40 SWDEV-370659 - Add lock for HSAIL only
Add lock for HSAIL only in order to fix test failures
in math brute force and integer_ops tests.

Change-Id: I5f14cdcaa4ee9867fdae63fff197a0f21ee5f1d4


[ROCm/clr commit: f29d3bc3ac]
2022-12-06 15:50:04 -05:00
Tao Sang f29d3bc3ac SWDEV-370659 - Add lock for HSAIL only
Add lock for HSAIL only in order to fix test failures
in math brute force and integer_ops tests.

Change-Id: I5f14cdcaa4ee9867fdae63fff197a0f21ee5f1d4
2022-12-06 15:50:04 -05:00
Cole Ramos 533d6ff8b7 Merge pull request #49 from AMDResearch/37-add-l1-l2-bw
Add metric for L1-L2 BW

[ROCm/rocprofiler-compute commit: 8741bb0930]
2022-12-06 14:34:16 -06:00
Cole Ramos 8741bb0930 Merge pull request #49 from AMDResearch/37-add-l1-l2-bw
Add metric for L1-L2 BW
2022-12-06 14:34:16 -06:00
kjayapra-amd 74adc2e9f2 SWDEV-241902 - Using COMGR APIs for extracting Code object.
Change-Id: I2dd662babf805d2de6e037bf41f7306e523da7d5


[ROCm/clr commit: 5e4f430e03]
2022-12-06 12:17:12 -08:00
kjayapra-amd 5e4f430e03 SWDEV-241902 - Using COMGR APIs for extracting Code object.
Change-Id: I2dd662babf805d2de6e037bf41f7306e523da7d5
2022-12-06 12:17:12 -08:00
colramos-amd 741d9e4d05 Add L1-L2 BW metric to configs and dashboard #37
Signed-off-by: colramos-amd <colramos@amd.com>


[ROCm/rocprofiler-compute commit: b0542923e2]
2022-12-06 13:44:00 -06:00
colramos-amd b0542923e2 Add L1-L2 BW metric to configs and dashboard #37
Signed-off-by: colramos-amd <colramos@amd.com>
2022-12-06 13:44:00 -06:00
Bill(Shuzhou) Liu 8d347bb6c4 Return errors when set clock range
Instead of using assert to abort the application, the fix will
return the error code if the input parameters is incorrect.

Change-Id: I00861ddf1198386fb322ea06232a7178fb5ef4bd
2022-12-06 12:39:43 -06:00
Bill(Shuzhou) Liu ebfd8e1b23 Return errors when set clock range
Instead of using assert to abort the application, the fix will
return the error code if the input parameters is incorrect.

Change-Id: I00861ddf1198386fb322ea06232a7178fb5ef4bd


[ROCm/amdsmi commit: 8d347bb6c4]
2022-12-06 12:39:43 -06:00
Cole Ramos ebc42ea633 Merge pull request #48 from AMDResearch/36-update-l1-bw-calculations
Update L1D BW calculations

[ROCm/rocprofiler-compute commit: 80b03bc8a5]
2022-12-06 11:36:24 -06:00
Cole Ramos 80b03bc8a5 Merge pull request #48 from AMDResearch/36-update-l1-bw-calculations
Update L1D BW calculations
2022-12-06 11:36:24 -06:00
colramos425 51b5f5101d Merge branch 'dev' of github.com:AMDResearch/omniperf into python-logging
[ROCm/rocprofiler-compute commit: 5cd0503a11]
2022-12-06 10:38:10 -06:00
colramos425 5cd0503a11 Merge branch 'dev' of github.com:AMDResearch/omniperf into python-logging 2022-12-06 10:38:10 -06:00
colramos425 c1a73defd2 Add VL1D BW to the L1D Cache Accesses table
Signed-off-by: colramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 0b01dc7ec7]
2022-12-06 10:32:23 -06:00