Includes some workarounds and HMM.
Conflicts:
opensrc/hsa-runtime/core/runtime/amd_topology.cpp
opensrc/hsa-runtime/core/util/flag.h
Change-Id: I22976f07964a43dbb228a6231777dbd599112b8d
[ROCm/ROCR-Runtime commit: 7333c77e22]
When no isa's are available no callbacks should be invoked. This
is not an error and should return success.
Change-Id: Ie4048aa8cbe5c3fdf5431f6a865021549ecf8a13
[ROCm/ROCR-Runtime commit: 4197461b7f]
Sramecc is misreported in kfd 4.0 and prior. To prevent possible
corruption due to d16 instructions, deny use of gfx906 with older
kfds and correct misreport for gfx908. Denial of gfx906 may be
overridden by setting HSA_IGNORE_SRAMECC_MISREPORT=1.
Change-Id: I7d5c3a716fad01c348f8b88cd508cedbf914c989
[ROCm/ROCR-Runtime commit: 45fbe5b192]
Park the wave, if it is stopped, to avoid halting it at an s_endpgm
instruction if the architecture does not support it.
Free ttmp6 by converting the dispatch_ptr into a queue packet index
(25-bit) and storing it in ttmp7[24:0].
Save the exception PC in ttmp11[22:7] ttmp6[31:0].
Change-Id: Iaa3c5baf5b488c0b534044d338f12bffa63ddce2
[ROCm/ROCR-Runtime commit: ea6ee0aa81]
Scratch cache was not updated for IOMMUv2 systems previously.
This both negates the cache and causes segfault during scratch
release.
Change-Id: I71e81d6b642d65ca135868ff7225ea173529d458
[ROCm/ROCR-Runtime commit: 191664cd20]
Legacy p2p copy path incorrectly transfered in whole pages rather than
the requested size.
Change-Id: I9aa7337754f9e32f587a0cc5305f8ffeb6196f10
[ROCm/ROCR-Runtime commit: 34ac62274a]
Replace the stop reasons ttmp11.trap_raised and ttmp11.excp_raised
with ttmp11.wave_stopped which indicates that the trap handler has
halted the wave as the result of an event (trap, single-step or
exception).
If the wave is stopped because of a trap, also record the trap_id in
ttmp11.saved_trap_id[7:0].
Save status.halt in ttmp11.saved_status_halt, so that it can be
restored when resuming a wave (changing a wave's state from stopped to
running or single-stepping).
Change-Id: I7322f59b60e8cc1b92bf5f067dba606a3109ef49
[ROCm/ROCR-Runtime commit: 9ca79d072a]
This patch is to let ROCr recognize new gfx10.3.3 ISA.
Change-Id: Ied23eee2752e14c19c8c0a6d7789fded9940e31e
Signed-off-by: Huang Rui <ray.huang@amd.com>
[ROCm/ROCR-Runtime commit: feeb2f62e2]
To support single stepping the instruction preceding an s_endpgm,
unwind the PC by 8 bytes and set ttmp11[9] to notify the debugger
that the wave is halted with a modified PC.
Bump the debug r_version for this new trap handler ABI.
Change-Id: I55e4e0d65576f92da14a336266c31c513baab547
[ROCm/ROCR-Runtime commit: 8aec53969f]
Each SE must be assigned equal numbers of slots and slots
must be assigned in units of whole groups.
Change-Id: I8f3677237fa6f2e2d25e3e78210c5a7a0ad792f3
[ROCm/ROCR-Runtime commit: 7bc6aac5d2]
- Use consistent naming in Isa class.
- Remove unused Isa methods.
- Simplify Isa methods.
Change-Id: I7c4045d08fbfe0d94b3181db8ebc5e5ed8c8cc82
[ROCm/ROCR-Runtime commit: 6bbf6b1c9c]
Store target ID string in isa registry and use for returning agent and
isa name.
Change-Id: I72a20d8ff963c73d86392158aff3853e4c9bfdbd
[ROCm/ROCR-Runtime commit: 853ccc762e]
- Remove gfx800, gfx804 and gfx901 as they do not exist.
- Map the V2 note record of "AMD:AMDGPU:8:0:0" to gfx802 as they are
the same target just connected to a differnt motherboard.
- Correct typo for supporting gfx902:xnack+.
- Support agent names with a minor or stepping version greater than 9.
Change-Id: Ife933449f60ab4687e2aaab9baf4c9fc5b86339d
[ROCm/ROCR-Runtime commit: 12eb2764cd]
Add missing target names and make all parts consistent with which
targets are supported.
- Add gfx805 as a supported target.
- Add all ELF targets to genric code.
- Make offline loader match supported targets.
Change-Id: Idab4d69edc71645aecaa83aa55e29c1aeee4c1d6
[ROCm/ROCR-Runtime commit: b443397bcc]
Code object V2 had the ability to support the following queries:
- HSA_CODE_SYMBOL_INFO_KERNEL_KERNARG_SEGMENT_SIZE
- HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_KERNARG_SEGMENT_SIZE
- HSA_CODE_SYMBOL_INFO_KERNEL_KERNARG_SEGMENT_ALIGNMENT
- HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_KERNARG_SEGMENT_ALIGNMENT
However code object V3 onwards cannot support these as the kernel
descriptor changed. These queries need to be deprecated.
Until then return more reasonable values:
- For kernarg alignment return 16 which is the minimum alignment
required by the HSA standard.
- For kernarg size return the field from the kernel descriptor which
is a hint. If it is 0 then the compiler is not specifying the kernarg
size, or the kernel has no kernarg.
Change-Id: I19ce6cd0f3658a2bf62277492f39100ea5ab4256
[ROCm/ROCR-Runtime commit: ef755e4c82]
Avoids calling to KFD to map/unmap scratch allocations for
every large scratch using dispatch.
Change-Id: I9fab5705251ec82b03e4f2f2ca6da7cdccabefb9
[ROCm/ROCR-Runtime commit: 27e044ae4d]
Improves HIP event performance in directed benchmarks where
clock sync latency is significant.
Change-Id: I78b724a14a8f5b6a9a2b9f4d85afe9d8b81808a6
[ROCm/ROCR-Runtime commit: 32d0fcafa9]
The modern meaning of the construct if( NOT ON ) was added in CMake 2.8,
but when the cmake_minimum_required not set in user code and no policy
level is set in the CMake config, then CMake 2.8 features cannot be
used. In old CMake (the default), ON is interpreted as a variable, and
because it is not defined, it is considered false. The same is true of
OFF.
This change sets a variable as ON, so that old CMake interpretation is
correct, and the if works as expected regardless of policy version.
Change-Id: I67d7ed4ceaf8248eeb5a1c7f54009d72313f3f5d
[ROCm/ROCR-Runtime commit: 4a35f560f6]
Names test good:
hsa-rocr-dev_1.2.0.30900-crdnnv.415_amd64.deb
hsa-rocr-dev-1.2.0.30900-crdnnv.415.el7.x86_64.rpm
hsa-rocr-dev-1.2.0.30900-crdnnv.sles151.415.x86_64.rpm
http://confluence.amd.com/display/GPUCPT/Package+File+Naming
Note: rpm requires 'devel' instead of 'dev', to be a subsequent
patchset.
Change-Id: Id6a422f3c335448b52c70c77ed39c9041114b80f
Signed-off-by: Cole Nelson <cole.nelson@amd.com>
[ROCm/ROCR-Runtime commit: 90f2dd5b1b]
Temporary workaround while language and compiler teams sort out
handling both modes.
Change-Id: I5d676cd546382dba05ec0b62bb885baa854614f6
[ROCm/ROCR-Runtime commit: a09ba8bcc8]
The error checking macro IS_OPEN returns an hsa_signal_t.
This conflicts with the return type of uint32_t.
Add an assert and rely on spurious return rule to return zero
when rocr is not initialized.
Change-Id: Ifc9bb75e22ecdd675273de59b31e5026a69c62e0
[ROCm/ROCR-Runtime commit: a3c4aaf95a]
For small copies cache flush latency is larger than data transfer
latency in local VRAM. Select SDMA for small copies.
Environment key HSA_FORCE_SDMA_SIZE is added for easy adjustment
of the small copy size. This may be removed after tuning is done.
Change-Id: I733fa0ae01c616617c5de50e71226b51fd589ef2
[ROCm/ROCR-Runtime commit: 2a0c6774fb]
l_name is populated by strdup which requires using free rather
than delete.
Change-Id: I9d9bdcfaa3ef095502270f332b95a0ee5c0bbcfc
[ROCm/ROCR-Runtime commit: 9c20f0e649]
We want wraparound behavior here but we don't want to trigger sanitizer
warnings. Converting to int64_t and then wraping around by cast to
uint64_t avoids the UB issue that triggers the sanitizer warning.
Change-Id: I9400b988dce7899e9ba42cab3e35c7ffedec8fe1
[ROCm/ROCR-Runtime commit: 5f43778a51]
Konstantin Zhuravlyov
Mike Li
Tony Tye
Sean Keely
Ramesh Errabolu
Cole Nelson
Laurent Morichetti
Jason Tang
Evgeny
Huang Rui
Chris Freehill
Cordell Bloor
Pruthvi Madugundu