Граф коммитов

239 Коммитов

Автор SHA1 Сообщение Дата
Jay Cornwall 60da601be4 Handle traps, illegal instruction, memory violations through queue signal
Report traps and fatal exceptions through a wavefront's
amd_queue_t.queue_inactive_signal. Previously, only traps were
reported and requireed the compiler to pass in the signal pointer
in s[0:1].

The signal is obtained through a mapping from doorbell index to
amd_queue_t*. The doorbell is fetched within a wavefront through
the gfx9+ S_SENDMSG(MSG_GET_DOORBELL) instruction.

Change-Id: I319b45f2e15dfcfe4db8f4065da1136e9539a42b


[ROCm/ROCR-Runtime commit: ff8f439112]
2019-07-01 22:59:41 -04:00
Jay Cornwall 822d838eae Replace gfx9 SP3 trap handler with LLVM, fix IB_STS restore
Assembler toolchains are moving from SP3 to LLVM. Replace trap handler
source code with LLVM equivalent.

Fix a trap issue with SQ_WAVE_IB_STS restore. Mostly harmless as all
traps are currently considered fatal to the wavefront.

Change-Id: Iacecd9dd31a1d96a083c8b8327f442f33c861f9f


[ROCm/ROCR-Runtime commit: 6ed686ee29]
2019-07-01 22:59:27 -04:00
Sean Keely 872c359ba2 Initial support for deallocation callbacks.
Adds hsa_amd_register_deallocation_callback and hsa_amd_deregister_deallocation_callback
to notify when HSA memory has been released.

Change-Id: I1f33cee250ca890e5c2e7fddfa4479aa5874651d


[ROCm/ROCR-Runtime commit: 299874f17d]
2019-06-26 04:12:17 -05:00
Sean Keely 5d5d40fcf9 PTHREAD_STACK_MIN may differ from system parameters.
Restrict stack adjustment to non-default stack requests and allow
stack growth within reason (20MB cutoff).

Change-Id: I320280c711402ac29683e94c7246b7c32c797611


[ROCm/ROCR-Runtime commit: 0c0e634458]
2019-06-17 21:04:17 -05:00
Sean Keely ca44cbb3d9 Revert to SystemClockCounter for HSA system time.
CPUClockCounter is not NTP adjusted (CLOCK_MONOTONIC_RAW) so should be 
better for measurements.  However, it is implemented with syscall while
CLOCK_MONOTONIC is implemented via vDSO.  The latency increase becomes
significant when language layers make corresponding clock measurements.
Reverting to CLOCK_MONOTONIC will reduce latency and allow small
duration events to be measured at the cost of incorporating NTP
frequency skew errors.  NTP may adjust frequency by 500ppm so limits us
to ~3 decimals in elapsed time.

Change-Id: I920b9f707f47109d80d6c256c475638c03fb8d76


[ROCm/ROCR-Runtime commit: 4b22d24346]
2019-06-17 21:07:26 -04:00
Sean Keely b754622b33 Allow hsa_status_string when HSA is closed.
API is a stateless lookup of RO data and needed to interpret
hsa_init error codes.

Change-Id: If80cba2f697843d08e529da0f790acf3c37127a7


[ROCm/ROCR-Runtime commit: 22de0e7fb9]
2019-05-24 22:40:03 -04:00
Sean Keely b9c2754101 Add exception and error safety for CreateThread.
Change-Id: I82aaf64e039ca9614b4948deec1f87147f56279a


[ROCm/ROCR-Runtime commit: 9f81bdfbe1]
2019-05-24 22:39:55 -04:00
Sean Keely f336a19a0f Correct pthread join/detach handling.
Joined threads can not be joined more than once nor can they be detached.
Thread library wait and close allows multiple waits and separate close so
this fixes the pthread implementation.

Change-Id: I0019271a438f11ed4c6c11854011f5c4f6e16b65


[ROCm/ROCR-Runtime commit: a913549190]
2019-05-16 12:14:06 -05:00
Sean Keely bdda9b4f0e Correlate errors for time stamps which predate process start.
Small times may be given to time conversion if GPU clocks are used to
accumulate elapsed time.  Because HSA APIs deal in absolute time this
leads to large conversion offsets of order system uptime.  Variation
in relative clock ratio estimation may be amplified in this case,
destroying elapsed time measurements.

This patch fixes the relative clock ratio used for times which predate
the call to hsa_init.  This correlates errors in such times allowing
the elapsed time to be correctly computed.

The effective maximum system uptime before elapsed time conversion becomes
inaccurate is ~3.5 months.  GPU event timestamps are good for process uptime
of ~3.5 months.  These are limited by double's mantissa precision.

Change-Id: I48752ff354920439d91016d6f2b0c8ddfa60b445


[ROCm/ROCR-Runtime commit: 6e2a056e1b]
2019-05-14 17:35:06 -04:00
Sean Keely ec39134408 Expose HDP flush registers.
Exposed via agent info query.  Only valid if fine grain PCIe memory is enabled.

Change-Id: Ib4770901592ec047276458926a947737f9b93bb5


[ROCm/ROCR-Runtime commit: 06376e726b]
2019-05-11 00:04:47 -04:00
Sean Keely 5b71bc65b7 Patch from github.
At the moment it is not possible to build ROCr with Clang. This is
a spurious limitation. The present PR addresses it by guarding GCC
only flags and by fixing some additional warnings that Clang triggers;
one of said warnings did outline a rather interesting issue with math
being done on void*s. - AlexVlx

Void ptr arithmetic had already been fixed in amd-master branch.

Change-Id: I5ee97e20b5c40b10dd73facecabe75f02ba46462


[ROCm/ROCR-Runtime commit: e89f9807f1]
2019-04-29 16:17:24 -04:00
Felix Kuehling d810b66917 Use non-paged memory for IPC signals
Non-paged memory can be IPC-shared even when HSA_USERPTR_FOR_PAGED_MEM
is enabled.

Change-Id: I8b1fa6d7a4a9327c78a77b3679697fbf55397093
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 0c6b9532d4]
2019-04-29 09:20:11 -04:00
Sean Keely bdf4b84f82 Don't create blits when copy profiling is enabled.
Change-Id: I879827133957ee610c3381ea30c536ec7d10ffab


[ROCm/ROCR-Runtime commit: 1251842900]
2019-04-18 20:00:02 -05:00
Jay Cornwall 2c3c92208d Detect memory event through Flags field insetad of Failure
KFD no longer reports MemoryAccessFault.Failure with retry fault
implementation. ROCr ignores the memory event when Failure = 0.

Use the Flags field instead, which will be non-zero when the
event is triggered.

Change-Id: Ie90799a303b0b2f1b476b20ffafdde79ae137182


[ROCm/ROCR-Runtime commit: 56f280c8a7]
2019-04-15 19:16:07 -05:00
Ramesh Errabolu fd05ee66a7 Remove instantiation of MemoryRegion for heap type SVM surfaced by ROCt
Change-Id: Ib4ff7e7cabe9aacb811888aeb74f652dcb57f9e0


[ROCm/ROCR-Runtime commit: ba029ebe21]
2019-04-10 18:33:07 -05:00
Sean Keely 59e91f0be8 Add hsa_amd_memory_lock_to_pool.
Makes malloc memory accessible to GPUs so that the memory has the
capabilities of the pool it is locked to.
This admits fine grained locked memory and reserves API space for any future
special CPU pools.

Change-Id: If8c3dd8582a43f19d3d36b3763c1a688cc419ef0


[ROCm/ROCR-Runtime commit: a535e18cc1]
2019-03-29 01:09:21 -05:00
Sean Keely 6121ae4f6b Fix void* arithmetic.
GCC allows arithmetic on void* treating void as char.  Clang and
the language spec does not.

Change-Id: I939f2432f276979bb81881406e10528597ac6001


[ROCm/ROCR-Runtime commit: e5de33dd9a]
2019-03-28 12:49:19 -05:00
Sean Keely cdd2c26ac4 Disable sram-ecc reporting via ISA until HCC is fixed.
Change-Id: I0382825884b727173385f04da9f2088650c3ba1d


[ROCm/ROCR-Runtime commit: 7ea0cd688f]
2019-03-21 17:46:56 -04:00
Sean Keely 953355e0f7 Report SRAM ECC errors through the system event handler.
Modify the system event handler to support multiple users.
Name memory fault reason codes.

Change-Id: I1b5979b36ab15637eb2be59a61e2d57e76d0a70e


[ROCm/ROCR-Runtime commit: 67376e06ab]
2019-02-27 18:08:07 -05:00
Sean Keely 8b90c223ac Loader support for SRAM ECC.
Change-Id: I0c6791c356d9186cc8dabae9fd698b1d4de19b09


[ROCm/ROCR-Runtime commit: 3c3db0243e]
2019-02-25 18:30:05 -05:00
Sean Keely f7dbaf103b Add fine grain vram pool.
Part 1 of 2.
Enables fine grain vram over PCIe based on env flag.
Part 2 will extend to XGMI.

Change-Id: I8ad506e004b398d56d462b0200274eae2293a461


[ROCm/ROCR-Runtime commit: c56d86100b]
2019-02-21 13:08:11 -05:00
Sean Keely c66675d192 Suppress exception reporting for well defined invalid signal handles.
hsa_exceptions with empty what() strings will not report in debug builds.

Change-Id: I0d424d3b1d3044808ece1720a460a57d68bf878e


[ROCm/ROCR-Runtime commit: 344d964f9f]
2019-02-15 19:35:57 -05:00
Ramesh Errabolu 30363b9dbb Allows users, via env ROCR_VISIBLE_DEVICES, to surface a subset of Gpu devices
Change-Id: I5662639d5d70f054831969669f9d30dec356dd5a

Update per review comments

Change-Id: I18c7d7cb00b261493b61c2cf5454d486166f40d8


[ROCm/ROCR-Runtime commit: 3fbf03af76]
2019-02-06 02:02:29 -06:00
Sean Keely f39ed0dc23 Unify APU and dGPU initial queue scratch allocation.
Both support dynamic scratch allocation so there is no reason
to preemptively allocate on APUs.

Change-Id: I22eaec01a83a091ee9dc1f594a1a9106e8dd81fc


[ROCm/ROCR-Runtime commit: 65d39cc476]
2019-01-25 02:11:39 -05:00
Jay Cornwall 268ae92794 Remove legacy microcode version check in GpuAgent::InvalidateCodeCaches
Fixes instruction cache invalidation when using microcode branches.

Change-Id: I932676e683983145f5c807204e592fb5e530c8af


[ROCm/ROCR-Runtime commit: 079eadd71b]
2019-01-22 16:39:52 -06:00
Konstantin Zhuravlyov 564ac4b348 Loader updates for code object v3
- Fix loading in some cases
  - Fix symbol kind

Change-Id: I721b4a35972b6d2a6d0ac733ab770b096cc74e17


[ROCm/ROCR-Runtime commit: c1ad82a6b7]
2019-01-18 15:41:01 -05:00
Ramesh Errabolu efc2ac9024 Initialize queue buffer with Invalid Pkt Headers
Change-Id: I4166f1359746ee6829b730bac2db358af72ab16e


[ROCm/ROCR-Runtime commit: 28c3f9a269]
2018-11-21 19:09:10 -05:00
Sean Keely d79cd9abf3 Check max wave scratch limits.
HW has limited bits for wave scratch base address stride.  Enforcement
prevents programs with larger than supported scratch allocations from
running and clobbering neighboring scratch space.

Change-Id: I574da888e9d1d5e290a9c0025ba13b5ef9f1e5c0


[ROCm/ROCR-Runtime commit: 8e4177382a]
2018-11-16 20:59:20 -05:00
Sean Keely d5c5f476fb Disable forced explicit selection of public vs internal HSA interfaces.
Temporary to reenable OCL builds on TC.

Change-Id: Ia81f2f9a9dd10ae8ce9627313247a586a8711584


[ROCm/ROCR-Runtime commit: 269be0be2e]
2018-11-16 15:26:26 -06:00
Sean Keely 799e40f3b9 Cache KFD Events used by user allocated InterruptSignals.
Change-Id: I7f102f880fea9c78febe28cd262f93ee77f03184


[ROCm/ROCR-Runtime commit: 4e8597681b]
2018-11-12 22:37:42 -06:00
Sean Keely ed18ee7f38 Add pooling for Signal ABI blocks (SharedSignal).
Makes better use of memory and greatly reduces mmap count.

Change-Id: Ib444cd1ccd144986adbcc7cec297a966e2c08bc7


[ROCm/ROCR-Runtime commit: 8323b2e1d7]
2018-11-12 22:37:28 -06:00
Sean Keely 9652ba6de2 Remove legacy SVM region concept.
Also rename blit_agent to region_gpu and add comments to clarify
its role in deprecated region API support rather than to do blits.

Change-Id: I80b1043db2e1c5d40a58fc801eef70a688ea9169


[ROCm/ROCR-Runtime commit: 936ecd1885]
2018-11-09 06:27:53 -06:00
Sean Keely 3f55198dd5 Move VM fault handler init to after all devices are registered.
During registration we must not call any function that depends on registered
data as the lists are not yet complete.  This includes signal allocation since
allocating shared GPU mapped memory depends on the list of GPUs.

Change-Id: I94d59e847802c546c2a5a0d9f55fe5ac3fd1d878


[ROCm/ROCR-Runtime commit: dda9c17b45]
2018-11-09 03:10:08 -06:00
Sean Keely 37aead15c7 Ensure runtime cleanup when hsa_init ref count reaches 0.
Delete the runtime object when the last hsa_shut_down occurs.

Change-Id: I2005d52d06702eaef166714fd5e471cc277924db


[ROCm/ROCR-Runtime commit: 9ec37b5103]
2018-10-22 19:32:00 -05:00
Evgeny e53c7c63c0 aqlprofile extension version check
Change-Id: If824764f199eca15a0341cdf6177d8d6353e29f3


[ROCm/ROCR-Runtime commit: d788a53972]
2018-10-22 15:36:57 -04:00
Sean Keely b8de13150b Report internal queue creation to tools.
Debug agent requires handles to internal queues for single step debugging.
Added tools only API hsa_amd_runtime_queue_create_register for reporting.

hsa_amd_runtime_queue_create_register sets a callback which is invoked
when internal queues are created.

Change-Id: Ia5190ae724fadba686c15f25b2cd085350eeff0e


[ROCm/ROCR-Runtime commit: 757502ccd6]
2018-10-20 23:12:27 -04:00
Sean Keely 5aa7af4280 Fully initialize GPU agents before loading tools.
Required for debug agent requires copy API and trap handler to be initalized
prior to loading.  Existing tools do not make use of internal queue or scratch
memory intercept which is what PostToolsInit allows.

PostToolsInit() will be removed in a following cleanup change.

Change-Id: If43377843808e3eff0defd9204910a67a852902f


[ROCm/ROCR-Runtime commit: 5975c465ad]
2018-10-20 23:12:14 -04:00
Sean Keely b0013a3e4d Refactor of Runtime::CopyMemory()
Change-Id: I32a7cb24d00660ff4471d121ef7b3c2eec8fced2


[ROCm/ROCR-Runtime commit: 6852282a07]
2018-10-20 14:38:50 -04:00
Sean Keely 5f454d102d Use ptrinfo rather than apertures in hsa_memory_copy
Apertures now overlap with the change to 48bit addressing which
precludes using aperture checks to discover buffer ownership.
Switches to ptrinfo to decide which device a buffer owned by.

This corrects faults in the legacy hsa_memory_copy api.

Change-Id: I5c7ce0216e1cdc96f836fc6fec9c3defdf4b9d90


[ROCm/ROCR-Runtime commit: 1e0d690948]
2018-10-11 13:34:53 -04:00
Jay Cornwall e2454b084b Revert "Extend SDMA disable list until firmware stability resolved"
This reverts commit 795fd231b0.

Change-Id: I17b379e4d0e49a79dc8d4a60f01ea424fda24f02


[ROCm/ROCR-Runtime commit: f1ffbc3286]
2018-10-05 15:17:27 -04:00
Ramesh Errabolu f4d18d5256 Capture number of Numa Nodes present on system
Change-Id: Ic789a6b9da8e316cb483e50b0fe9faa03798f97c


[ROCm/ROCR-Runtime commit: 01eea21d6c]
2018-09-18 16:27:30 -05:00
Ramesh Errabolu 14767d0f4c ROCr changes to enable small BAR P2P over xGMI
Change-Id: I6aaa3fe2565cdf7e15d58a7484d6bd5916ffff64


[ROCm/ROCR-Runtime commit: f007870792]
2018-09-17 22:54:40 -04:00
Sean Keely 01b35916c7 Check fill addresses for alignment.
Check was documented but missing.

Change-Id: I97951635d794fd22e20c25d20e9d0e35035254af


[ROCm/ROCR-Runtime commit: 3357cadeec]
2018-09-05 16:34:19 -04:00
Sean Keely a550bf2687 Remove redundant initialization.
LinkInfo is already initialized to zero in its default constructor.

Change-Id: Ifa4fb886cce9b474c6879c9c82744044ab394082


[ROCm/ROCR-Runtime commit: 2843988dd7]
2018-08-29 19:36:07 -04:00
Sean Keely 0af87e4a02 Refactor blocking sdma commands.
Remove fence pool and use two signals.  Two signals allows overlapped
submission and copy while reducing thread busy polling.

Change-Id: Idb5f8e4c7f482a596ffce9e7799191fdd785a216


[ROCm/ROCR-Runtime commit: 56ed5c8904]
2018-08-29 19:13:23 -04:00
Sean Keely 61b53915d7 Implement SDMA copy rect for gfx9.
Fix pitch overflow due to small element detection.
Add wide pitch 2D copy handling.
Cleanup code duplication.

Change-Id: I93b1584aba8e5964957eb7ab3544df806ca3e2f9


[ROCm/ROCR-Runtime commit: e0839ab27e]
2018-08-29 19:13:07 -04:00
Sean Keely 94f2f17cb0 Add debug checking of time stamps validity.
Can only check that the signal has some time stamp, can't check if
the translating agent matches the last used agent or not.

Change-Id: I62943a864318808059c617280bb65a269dfadd1b


[ROCm/ROCR-Runtime commit: aca00b7238]
2018-08-26 12:36:35 -04:00
Sean Keely fe44e57a6c Expose ROCr build ID.
Adds HSA_AMD_SYSTEM_INFO_BUILD_VERSION=0x200 to hsa_system_info_t.
This returns a const char* pointing at the build string (git describe).

Change-Id: I73e6612482bf6ffc4037fd365808eb9211a650ad


[ROCm/ROCR-Runtime commit: cd8e5c1da8]
2018-08-20 20:44:32 -05:00
Sean Keely 896a035951 Experimental flag to swap copy agent for async copy APIs.
Adds env flag HSA_REV_COPY_DIR.  If set to 1 async copy will
copy from dst device to src device rather than from src to dst.

Change-Id: I3095642066fa026dc112c2eac06db9393341cd7e


[ROCm/ROCR-Runtime commit: 6c47780620]
2018-08-09 10:58:14 -04:00
Jay Cornwall 795fd231b0 Extend SDMA disable list until firmware stability resolved
Change-Id: I5e21cb761ae970ba2b68edd97b1564b36ca1f0f4


[ROCm/ROCR-Runtime commit: 5e1ccdc4a9]
2018-08-08 11:20:14 -05:00