Debugger path is taken for (trap_id >= 3) and single step exceptions.
Other traps/exceptions behave as before.
Change-Id: I276c0eb69953709968353a57717ee017d22348a2
[ROCm/ROCR-Runtime commit: 78e754935c]
Strip should only apply to the output target library. Symlinks
with .so endings which will be relocated during install will cause
strip to fail, aborting the build.
Change-Id: Ieb598c2cec5277d9d14c8afa88b91ca2c7f4412d
[ROCm/ROCR-Runtime commit: 851ee799c4]
Using branch point for count since last change since we don't
have questions answered on tags yet.
Removed unused CMake files.
Restructured CMake to use the cache rather than only commandline
and be ccmake & cmake-gui friendly.
Dependency search paths are added for the Repo tree layout.
Search paths still needed for install paths.
Simplified packaging. hsa-ext-rocr-dev package and contents now
build from the package CMake rather than being 3 separate projects.
Not applying new version number or new install paths!
Change-Id: Ibea50dc8a6ab091e91857f78833f5379a4511547
[ROCm/ROCR-Runtime commit: 6c3acda664]
- Use new buffer resource descriptor layout
- Handle wave32 scratch allocation error from CP
- Make wavefront size a property of scratch allocation requests
- Repurpose wave64-specific amd_queue_t.scratch_workitem_byte_size field
- Clear index_stride field in V# on gfx10, calculated per-dispatch by CP
Change-Id: If2acdf6430772abd4d6a8c792fc8c11260764dda
[ROCm/ROCR-Runtime commit: f8d0ccd159]
This is mostly un-edited from Perforce. We will make other required
edits in future commits.
Change-Id: I55a809f2f23f03d60e4dcd1fb947ad558e737027
[ROCm/ROCR-Runtime commit: 08841faf4c]
doorbell_queue_map should always be allocated or we will need to
add branches around all accesses.
Change-Id: I994c0eaf4be62c1a4a37bd06894272dba1fc1da6
[ROCm/ROCR-Runtime commit: f9d3796db8]
sdma end ts must be 256 bit aligned in oss 3.0 and prior. Using
the ts pool requires copying into the signal and is a significant
performance penalty for small copies.
SharedSignal is 128 bytes due to alignment so can host the end ts.
Move sdma end ts into SharedSignal and remove ts pool and ts copy.
Change-Id: I7899bda36ebc9adcaad1d3a3d2b7a489857cc9e8
[ROCm/ROCR-Runtime commit: ec5ac95dce]
Impacts GPU_ONLY signal type latency when waiting for small operations.
Using this type improves total SDMA small copy performance by ~40% if
the signal is allowed to spin freely.
Change-Id: I27aa128c63a1bacb3f51fb08f166e4e1d6fef651
[ROCm/ROCR-Runtime commit: 5adb73fffd]
Remove agent lookup in time stamp translation for IPC signals. The copy
agent handle is not shared so does not need to be checked for cross
process use. Cross process copy-timestamp read is illegal and continues
to deliver garbage.
Store the copy agent properly when doing CPU-CPU copies.
Change-Id: Ib4008f66ff866922047749dd556c84a32021c1fd
[ROCm/ROCR-Runtime commit: ea8c99f452]
ucode versions are per asic so not valid for feature enablement outside
of bringup/dev. Feature is older than the latest ioctl change that
the thunk depends on so use of this patch with kernel packages that
don't contain the feature is not possible in a supported environment.
Change-Id: I36b14176a7d642017ef1518aeade454b0f3dc749
[ROCm/ROCR-Runtime commit: 8133563a93]
Also removed an unnecessary cache flush in dependency barrier packet.
Change-Id: I573df3bdf0a10df0bcd78025672c44038f8091ff
[ROCm/ROCR-Runtime commit: 4647a5454d]
This is to allow allocations in system memory that exceed sizes
reported by a CPU device
Change-Id: I3d10d192aafcefbe4107f69b7c5e30bf7f836619
[ROCm/ROCR-Runtime commit: 3201f68f72]
If M0[23] is set then the driver will interpret the interrupt as a
debug event, rather than a signal event.
Clear M0 before sending the interrupt. All paths here are terminal so
it's not necessary to save/restore M0.
Change-Id: Ibd85b8cc6f8556941f2308a2c3fa3c68702cd606
[ROCm/ROCR-Runtime commit: ad717d2e98]
Includes
-"Report SRAM ECC errors through the system event handler."
(bf6af52892b1f677697309a7946f651bfe8e9061)
-"Fix async memory test; temporarily disable NUMA memory test"
(8f1a9494cd)
-Temporary disable of rocrtst
Change-Id: Ide9fc999b01ab810f00a56fc3733d07be45117c7
[ROCm/ROCR-Runtime commit: 04da198a31]
agentOwner from thunk reflects the GPU which holds the device alias.
We need to return a CPU to better reflect that the memory is system memory.
Change-Id: I9233f8779a4bfd471f68dbbbce07ae4528412e18
[ROCm/ROCR-Runtime commit: 6e07bc8dc4]
Allow user specified profiles if the HSAIL note is not found.
Konstantin reviewed and approved. HSAIL note is not generated by LLVM.
Change-Id: I40fbfbaedd6787b6a716507918f698d02007afe1
[ROCm/ROCR-Runtime commit: 465a8eb40b]
This will allow the default target list to be branch
specific.
Change-Id: If8ecc14e2b7fb5ed2eb25ab447480308d539b248
[ROCm/ROCR-Runtime commit: d699039284]
Report traps and fatal exceptions through a wavefront's
amd_queue_t.queue_inactive_signal. Previously, only traps were
reported and requireed the compiler to pass in the signal pointer
in s[0:1].
The signal is obtained through a mapping from doorbell index to
amd_queue_t*. The doorbell is fetched within a wavefront through
the gfx9+ S_SENDMSG(MSG_GET_DOORBELL) instruction.
Change-Id: I319b45f2e15dfcfe4db8f4065da1136e9539a42b
[ROCm/ROCR-Runtime commit: ff8f439112]
Assembler toolchains are moving from SP3 to LLVM. Replace trap handler
source code with LLVM equivalent.
Fix a trap issue with SQ_WAVE_IB_STS restore. Mostly harmless as all
traps are currently considered fatal to the wavefront.
Change-Id: Iacecd9dd31a1d96a083c8b8327f442f33c861f9f
[ROCm/ROCR-Runtime commit: 6ed686ee29]
Adds hsa_amd_register_deallocation_callback and hsa_amd_deregister_deallocation_callback
to notify when HSA memory has been released.
Change-Id: I1f33cee250ca890e5c2e7fddfa4479aa5874651d
[ROCm/ROCR-Runtime commit: 299874f17d]
In several places aql packets were written to queue all at once
instead of doing the header atomically. These cases have been
fixed.
There were a few hsa_signal leaked that have been addressed.
There was some duplication of code that has been addressed.
Addresses ROCMOPS-456
Change-Id: Ia1869bc370f92e49ac560301df47741d5f76978e
[ROCm/ROCR-Runtime commit: 081a2cc875]
Qingchuan Shi
Jay Cornwall
Sean Keely
Chris Freehill
Christian Sigg
Ramesh Errabolu
Konstantin Zhuravlyov