Limit test buffer size to 3/4 total VRAM size, and max 1GB.
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I937e10b0a6bd8215e3865b50f22ce75b3982a6f7
[ROCm/ROCR-Runtime commit: fd131e875e]
Add a blacklist for gfx1xxx12, using the same list as gfx1012
Change-Id: I7e620dba8a36f6f89152a48066234884150a15dd
[ROCm/ROCR-Runtime commit: b2fb2a3470]
Warn that HSA_FORCE_ASIC_TYPE may be needed if the engine major id
assertion fails.
Change-Id: I67e01e99c3d1bdc84630ccfae489dce5e77961b5
[ROCm/ROCR-Runtime commit: 408fca0278]
Aperture locking is too fine-grained, it has race between find userptr
and allocate userptr object.
Change _fmm_allocate_device and fmm_allocate_memory_object to not take
the aperture lock, the callers take it, this implements an atomic find
userptr or allocate a new one.
Change-Id: I6773404e22c1f4382a211c5a9817df23c5534a2a
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: c4d5ee28f0]
Certain special signals do not carry their updates via their signal
value. These signals are wrappers around special KFD events, of
which the only current instance informs about VM faults. We either
need to check each signal for this special event type or rely on
the checking done in hsa_amd_signal_wait_any. Since there will always
be a small number of these signals it doesn't make much since to
penalize the performance path with this check. Additionally we know
that the signal indicated by hsa_amd_signal_wait_any is satisfied so
don't need to recheck it's conditions.
Change-Id: I9fc6298300ad543d823ecd28ca8fab4ad26c23ef
[ROCm/ROCR-Runtime commit: 3d6a18b67c]
Clang now warns about set but unused variables. It also now
recognizes -Wno-error=unused-but-set-variable so this patch moves
that option back to the general options list.
Change-Id: Id800e87eb688b9441b14380e2246ad586179f31a
[ROCm/ROCR-Runtime commit: 26808295f8]
This is causing PSDB/OSDB failures so disable it until investigation is
done
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I666cd45fdf8ae585486adc7cf43eacd1700704bb
[ROCm/ROCR-Runtime commit: 5796225011]
Allows determining if the host can directly access HMM memory that
is physically resident in vram.
Change-Id: Ie452eedd0e27fe1b511afd416f5a1cd01b3d84e8
[ROCm/ROCR-Runtime commit: 9e53cab613]
To test ACCESS_IN_PLACE GPU mapping update to system memory.
Change-Id: I5b990215f39692e829128d848125e1ae0d571e03
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 351a41ac76]
CoherentHostAccess flag member moved from HSA_MEMORYPROPERTY
to HSA_CAPABILITY struct. Now this is reported to the
topology as a capability of the device instead of a device
memory property.
Change-Id: I48e43e4b4a0635b711b62933734587facdfbf88b
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: f85b428265]
Enables the fragment allocator to handle >2MB allocations, maintaining
good TLB alignment. Prior code contained a bug that caused the effective
API granule for vram allocations >2MB to be bumped to 2MB.
Also adjusts the block cache's block retention heuristic to not
count discarded blocks as in use. This will reduce block retention
when a significant amount of large blocks or IPC is in use.
Change-Id: I30bd85eb87951df822211f799d9cfe579ab109c6
[ROCm/ROCR-Runtime commit: 8adbda1c18]
Add macro debug_warning_n to stop printing a message after
N instances.
Change-Id: Id5f84b11eb63b3a20bd2bcb2ea8f10a066b457ef
[ROCm/ROCR-Runtime commit: ca8387768e]
Under high async handler load signal retention and event sorting
become bottlenecks. This change processes more handlers in a
single pass to amortize wait_any overheads.
Change-Id: I8b276e102db647e3858e120547aa0c6fca85ab4c
[ROCm/ROCR-Runtime commit: 6b398eb72c]
it is to optimize memory allocation latency, which
changes alignment from 2MB to 1GB.
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: I7818e9f13b17e2c0992e75b17f978dc03a018a57
[ROCm/ROCR-Runtime commit: 973b35bc06]
Device cgroup can limit accessible devices. Handle the cases where
p2p_links are not accessible
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I513dc75ad14e4f2d426cf2fbd301bcba12b4ee54
[ROCm/ROCR-Runtime commit: e28b3fe8b3]
blacklist some svm related test cases until they are solved.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I05e2d965d89bcbf3d43bed2873297e98ad0738ef
[ROCm/ROCR-Runtime commit: 9e0fc7f3c6]
It needs to skip LocalMemoryTest because it doesn't support local memory
with no dgpu path.
Change-Id: Iedb6f6deba55e239b21747d933cf2d7005623106
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
[ROCm/ROCR-Runtime commit: 55cb03dbae]
The updated sp3 compiler does not support GFX10 temperaly.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Change-Id: Idd9336663814b7925d9742eee0bd310d00945d3e
[ROCm/ROCR-Runtime commit: b8ef20e35c]
Fixes assembler error. The SP3 backend if already set to FamilyId.
Change-Id: I7721a555b05688b16993a03242a765694594825a
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 86a68b2774]
Increasing the timeout will avoid some test failures. This shouldn't
mask any issues as any incomplete shaders should still hang and would
just time out at 180 sec instead of 120 sec.
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: If4e893ab80d9d159bd0b8b112aa7574abc5e4f44
[ROCm/ROCR-Runtime commit: 9168dfe041]
Old memory properties info name used after removing branches.
This caused the CPU coarse grain pool to initialize with random
bits.
Change-Id: I397bc5ecf09fab69bdf1d7fafadcf54d71b64070
[ROCm/ROCR-Runtime commit: 0439dc90cd]
Prevents poorly written tools which throw in tools interface
callbacks from causing ROCr to catch and return a generic error
code.
Change-Id: I2f5bf7104dc7d4ee688eb48423c7ffdb06bd7702
[ROCm/ROCR-Runtime commit: c9ce27a640]
amdgpu_cs_submit can fail intermittently if another process has too much
memory reserved at the time. Allow a small percental of command
submissions to fail to make the test more robust.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If9f62b2b6f67be71420016d4e38d4dd6b6bca9a5
[ROCm/ROCR-Runtime commit: 8baf02e80b]
Delayed page faults from a terminated process can be attributed to the
next process with the same PASID. Work around that by adding a delay
after the Exception tests to allow the kernel to clean up any fault
storms before the next test.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Id310c13ea9eb92b04d37b95d91a0dd60bd9954e5
[ROCm/ROCR-Runtime commit: bd68646772]
If the signal arrives too late, it interrupts waitpid. Handle this
situation gracefully.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If4925c352c81ba7fef8a940460b91f5e720b451e
[ROCm/ROCR-Runtime commit: 25288e07dc]
It is gfx90a VF device ID, for virtualization support.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I9e51d6b58c702d185e6758a9c511e9b8bc72c2f5
[ROCm/ROCR-Runtime commit: d8d8e3ddd6]
After unregistered memory is added, now default access attribute
is returned based on xnack configuration.
Change-Id: I8ef44fe1e165ba009622e8112436c1f7a683f6cb
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: 0a2d7d8319]
It is to address gfx90a HW memory model changes.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: Ie5c5c5ee5ddfb75c0b4f625baf59ce37b4cc7c31
[ROCm/ROCR-Runtime commit: a6703395f6]
KFDSVMEvictTest.QueueTest shader asm code need update to support gfx10
and gfx9, skip the test to unblock CI test.
Change-Id: Id2842127cf5fc98a652afa82035a4b3603bf5c33
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 7d53e94750]
Old logic did not consider memory held in the scratch cache to be
free when deciding whether or not to reclaim.
Change-Id: I7f7c7549c72d743edbf7c53489fe9a453dc4177a
[ROCm/ROCR-Runtime commit: 0b7d9db964]
Fixes assembler error. The SP3 backend if already set to FamilyId
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: If127a71693b293e2748b06efb668a359b939cd14
[ROCm/ROCR-Runtime commit: e06d549337]
Aaron Liu
Kent Russell
Sean Keely
changzhu
Philip Yang
Alex Sierra
Yifan Zhang
Chris Freehill
Harish Kasiviswanathan
Mike (Tianxin) Li
Chengming Gui
Felix Kuehling
Eric Huang