Commit Graph

97 Commits

Author SHA1 Message Date
Amber Lin 2506a31248 Revert "Set guard page as disabled as default"
This reverts commit 4d839c4dc6.

Change-Id: I09b7e7915ec4759cab57d5863089a2c4a44dfacd
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: a74f6896ea]
2017-08-30 10:48:23 -04:00
Amber Lin 13282b9115 Fix mmap when the count reaches the max
Applications may try to allocate lots host memory and reaches the mmap
limit (/proc/sys/vm/max_map_count). When Applications fails to allocate
memory and calls hsaKmtFreeMemory to release the memory, Thunk fails to
reduce the maps count so the following hsaKmtAllocMemory calls continue
to fail, which doesn't make sense to the application. This patch checks
the mmap to NORESERVE return value. If it fails and the error number is
ENOMEM, reduce the map count by munmap and map it again immediately.



Change-Id: I127cb479dfd86b199172eef269d59426f23859ea
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: a81b29890c]
2017-08-29 11:47:29 -04:00
Felix Kuehling 7e59d7d5de Generalize size-dependent virtual address alignment
Support all fragment sizes up to 2MB by aligning buffers according
to their size.

Change-Id: I82b7ef8be6f1507d941e5c97edb6618adf8c66de
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 52598cf37e]
2017-08-28 15:01:33 -04:00
Amber Lin 4d839c4dc6 Set guard page as disabled as default
Due to max_mmap_count issue, set default of guard page as disabled.


Change-Id: Ic9dfe69b621733e9fac86831b008a122994a67e7
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 65d680c035]
2017-08-24 16:27:52 -04:00
Felix Kuehling cec34b9c10 Fix two more device ID array bugs
Use the mapped_device_id_array size when allocating temp_node_id_array
for unmapping queues in fmm_map_to_gpu_nodes. registered_device_id_array
size may be 0. Also, this temporary array is small enough to allocate it
on the stack. Malloc and free are overkill here.

Fix potential memory leak when registering the same device ID array
multiple times.

Change-Id: I83f09fd0925d9de7cf11bf72ba0ebb77273f587d
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 395ecaa985]
2017-08-24 13:31:25 -04:00
Amber Lin a885ad3724 Add debugging message on memory
Add pr_debug to all memory APIs and pr_err to some failure cases.

Change-Id: I8b519a1228cc19e6c04118fd87432e7f48f3cbf9
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 73707766ef]
2017-08-22 09:55:20 -04:00
Harish Kasiviswanathan 7f7eebab6d Fix hsaKmtQueryPointerInfo for scratch memory
Change-Id: I35a0f1a81f8b0ac6e99c2e1572829eb32d3bc95b
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 00250f7686]
2017-08-18 17:01:31 -04:00
Amber Lin 951796c73d Simplify memory maps
Simplify fmm_map_to_gpu_nodes code. Also fix a memory leak in this change.

Change-Id: I3487338b78c915de44588d0206bac4c53e728c60
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: f1a5248cf2]
2017-08-15 17:34:30 -04:00
Felix Kuehling 3f12312b4f Changes to run on old kernels
Fall back to older apertures API and old events page size if the new APIs
fail. This allows running on current upstream kernels (with only minor
fixes) on gfx801 and enables testing of further changes during upstreaming.

Change-Id: I9d86d4f576e52fcbb5bc158d80f1bf41261e4e87
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 78e683acf4]
2017-08-09 16:12:54 -04:00
Harish Kasiviswanathan faa5102340 Support IPC sharing of non paged system memory
Non paged system memory is allocated with node id 0. However, since a
gpu node is required for allocating system memory via KFD, the first
dgpu is used. In hsaKmtShareMemory() if system memory use the same
(first) dgpu.

Change-Id: I85789a89a4e4f7888e3826826401ea89ce4d1718
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 186527d0b7]
2017-07-26 10:17:07 -04:00
Harish Kasiviswanathan 8581bb285d Fix inconsistent calling of validate_nodeid
Change-Id: I3e8e65a5629059abdde89832b619cd8bf1f2b36c
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 20f0de71df]
2017-07-26 10:17:07 -04:00
Felix Kuehling 4a241a9d5f Update image alignment to 256KB
Needed for some tiling formats.

Change-Id: Icd460edaa77ccbeb3c98bc74b574ca5517db22af
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: d563e2cb1d]
2017-07-20 21:03:31 -04:00
Felix Kuehling 0d145b951a Make HSA_DISABLE_CACHE work on gfx900
Change-Id: I624390bfa70b2ff4cefd1bbdf8d960b7121f22bb
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: c48ff6b482]
2017-07-17 15:13:52 -04:00
Felix Kuehling 0c811652ff Align large buffers to BigK or huge-page boundary
This should allow us to take advantage of BigK fragments and huge pages
and improve TLB efficiency for VRAM allocations. Huge pages only work
with 4-level page tables (gfx900 and up). BigK fragments work on older
GPUs.

Change-Id: I02e1fbf74de554e16fdaf44e44d03b47df45c3b0
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: c7bd7733e5]
2017-07-17 12:04:05 -04:00
Felix Kuehling 838f639b73 Align imported graphics buffers
Imported graphics buffers are most likely images. Align them for
tiled image access. 64KB seems to do the trick.

This fixes VM faults with OpenCL graphics interop.

Change-Id: I7f60e205d93fff9407e0d00d3dbb02cc4990b863
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: dc2c52be78]
2017-07-17 11:19:08 -04:00
Harish Kasiviswanathan 7a12251015 Honor ReadOnly bit in HsaMemFlags
Change-Id: I456cde81384bf0f4bf055711d94b731179706d28
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 4d0697bf65]
2017-06-28 15:02:21 -04:00
Amber Lin 75c3086af9 Replace printf/fprintf with pr_xxx
Libraries normally don't print messages. We use pr_err, pr_warn,
pr_info, and pr_debug to print messages to stderr when prints are
enabled for debugging.

Change-Id: I9caf719343aa618c88e7b500f9737a46702e424a
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 897c4e2fff]
2017-06-28 10:47:35 -04:00
Felix Kuehling fce3048015 Remove deprecated implementation of hsaKmtMapGraphicHandle
The KFD implementation has been removed and will not be upstreamed.
This API has been superseded by hsaKmtRegisterGraphicsHandleToNodes.

Change-Id: I5f2d8da3260974618cdb6ea3fdcd77d37b82c9cb
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 374bd89d8c]
2017-06-02 13:52:19 -04:00
Kent Russell c53049ce46 Clean up thunk code
Use checkpatch.pl to fix the majority of errors. Some that remain and
will be excluded:
Use of typedefs/externs/volatile/sscanf
Lines over 80 characters

Remaining errors are due to misunderstanding the * symbol with typedefs

Also use this opportunity to spell manageable properly

Change-Id: I0b335e9cb3e1eea38bee27eaa1f582b2c9b09b38


[ROCm/ROCR-Runtime commit: b78e0e152a]
2017-05-31 14:38:59 -04:00
Sean Keely c0e1079b78 Check mmap return address for allocation, not requested address.
Change-Id: Ifeb7b17976fc791e3256c70d57cb4d1324a8b960


[ROCm/ROCR-Runtime commit: 59cc20d3cb]
2017-05-30 21:26:55 -05:00
Felix Kuehling 2cc06c88ff Switch to cleaned up memory management ioctls
Change-Id: Ib8971ef91138f2a051272b9b57f0ebd480e8e738
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 5eb31b2ebe]
2017-05-04 16:29:37 -04:00
Harish Kasiviswanathan 49805f82b1 Get PAGE_SIZE from system configuration
Change-Id: I87f383c443b873e13d36e80bfa034665bf493520
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 3b2f064cbc]
2017-05-02 16:54:32 -04:00
Felix Kuehling 188902e6c0 Add debug option to control the number of guard pages
Change-Id: I18b10bcbb4d74a92f17330e44b2dbb4cea61da00
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 3f7e7933e3]
2017-04-10 11:40:39 -04:00
Felix Kuehling 0f42207171 Add debug option to check userptrs on registration
export HSA_CHECK_USERPTR=1 to check user pointers on registration. If
the pointer doesn't point to a valid mapping, there will be a segfault.

Change-Id: I459c0902cbc90338517fbf79678871ebfbe5183b
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 34ddde0c50]
2017-04-10 11:40:39 -04:00
Felix Kuehling d2064da64b Add guard page after each address space reservation
Guard pages help catch out-of-bounds memory accesses by applications
by generating VM faults (GPU) and segfaults (CPU).

Remove address space reservation from scratch aperture. That address
space is managed by the Thunk client. Guard pages would cause Thunk's
address space management to get out of sync with the client's.

Change-Id: I2e5aee2923a90186358cc7b0e131baf547996df6
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 11862b9f61]
2017-03-30 11:31:48 -04:00
Kent Russell 30e1e20ede fmm.c: Disable userptr for paged mem by default
Unless HSA_USERPTR_FOR_PAGED_MEM is explicitly set, don't use userptr
for all paged memory. This will also allow us to work around some 4.9
issues, and then we can explicitly set HSA_USERPTR_FOR_PAGED_MEM for
all usage once those issues are resolved.

Change-Id: I25ce22b73ae6e93f1567f2318d9d2b47d4a44e69


[ROCm/ROCR-Runtime commit: c991951288]
2017-02-28 16:09:27 -05:00
Felix Kuehling adb4539c99 Use KFD_IOC_ALLOC_MEM_FLAGS_COHERENT for fine-grained memory
Use KFD_IOC_ALLOC_MEM_FLAGS_COHERENT when allocating fine-grained
memory and doorbell BOs so that they will be mapped with MTYPE_UC
on GFX9 hardware.

Change-Id: I51adf45b13105f479e6bcdaf54955b467920ee9a
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>


[ROCm/ROCR-Runtime commit: 8cb89b6926]
2017-02-27 10:39:05 -05:00
Felix Kuehling c28c344f78 Avoid COW after fork for API-allocated system memory
Change-Id: I5c7175114c4e6411d3beb5557e16cb71ddb01189
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 64104fc8d9]
2017-02-23 10:28:45 -05:00
Felix Kuehling 26a4ba78d4 Free BOs before munmapping
This avoids unnecessary evictions and failed restores due to the
munmap of userptr BOs that are just about to be freed.

Change-Id: Icf2f0b73991455556a201c54c05ea7e20af80f47
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 74ebfca9f0]
2017-02-07 10:45:37 -05:00
Felix Kuehling 73c7c197af Allocate paged system memory as userptr
Change-Id: I0864e678681788df37eccd9d7ebc70086e1f93bf


[ROCm/ROCR-Runtime commit: a90abcb317]
2017-02-02 10:32:53 -05:00
Harish Kasiviswanathan 6f2b43d96e Add fork support
If fork() is called, clear all duplicated data that is invalid in the
child process.

Change-Id: I4e27198060db593c630c6337b7071dfbd0d80b83
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: f1f62d863c]
2017-01-12 14:38:30 -05:00
Harish Kasiviswanathan 5d2336f1ca Add API entrypoints for IPC functionality
Implement three new APIs for IPC buffer sharing:
	-hsaKmtShareMemory()
	-hsaKmtRegisterSharedHandle()
	-hsaKmtRegisterSharedHandleToNodes()

Add new ioclts necessary for the above APIs.

Change-Id: Ia2b4d0dc91ec64bff959395d11c0536467404792
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 559e31d6ff]
2016-11-28 16:19:22 -05:00
Amber Lin 7ea1a24220 Allow a memory to be registered multiple times
A memory region is allowed to be registered multiple times when the memory
is specified by a user pointer. If it's registered with the same user
pointer but with different sizes, it's treated as different instances and
multiple VM objects are created with different GPU address.


Change-Id: I49627111bb5db36d18f1133b252fb62a611f06a4


[ROCm/ROCR-Runtime commit: 2a50ebba98]
2016-11-18 17:46:12 -05:00
Sean Keely 6ba6e14e9a Set the default value of userdata in pointer info to NULL.
Change-Id: Ie0d94b921bbce880d9548d5a014a2d7c33062f7e


[ROCm/ROCR-Runtime commit: c54c63fd56]
2016-11-09 21:15:07 -06:00
Felix Kuehling fee7a91fb9 Allocate and map doorbells in SVM for discrete GPUs
Allocate doorbells for dGPUs in the SVM aperture and map them for
GPU access. This is necessary to allow GPU-initiated submissions to
user mode queues.

Depends on new doorbell BO allocation flag in KFD.

Change-Id: I0737bef4a4764bb4a66c43846707ead2108f6601


[ROCm/ROCR-Runtime commit: 2e0a6eb371]
2016-09-16 16:04:27 -04:00
Amber Lin 2dec7b1d74 Search VM object by range
Add vm_find_object_by_userptr_range so QueryPointerInfo can find the
object as well when the pointer is not the starting address but it's
inside the memory range. Also rename vm_find_object_xxx functions to
_by_address and _by_address_range to be consistent.

Change-Id: I5c2b3a05b41493e32b7fd9154665bf078b043606


[ROCm/ROCR-Runtime commit: 4911c91389]
2016-09-13 12:44:29 -04:00
Amber Lin 4b17993791 Pointer attributes on APU
Add CPUVM aperture to keep track of memory allocation that is not known
to GPU driver. Together with GPUVM, this patch adds the pointer attributes
support to APU.

Change-Id: If13f9cf01ff8b9f709b99b66661e7505246adf4c


[ROCm/ROCR-Runtime commit: 19f2676ea7]
2016-09-12 11:32:26 -04:00
Amber Lin 8a1cef5fbb Add pointer attributes API
Add two pointer attributes APIs:
hsaKmtQueryPointerInfo - allow the user to query the memory information
    using a pointer. This pointer can point to any address inside the
    range known to HSA.
hsaKmtSetMemoryUserData - allow the user to attach data to a pointer to
    add memory tracking information. This pointer must match the start
    address of a memory allocation or registration.
TODO: This patch implements support on dGPU. Needs to add APU.

Change-Id: I4711809274248434901f0794f50ebfa13a7371a8


[ROCm/ROCR-Runtime commit: 51e4d27c37]
2016-09-07 17:24:46 -04:00
Lan Xiao a015256f33 libhsakmt: Marketing Name and AMDName support for APUs
For APUs, use /proc/cpuinfo to get Marketing name.



Change-Id: I4a17516d26a092683f36631032be00ad44f7e7fe
Signed-off-by: Lan Xiao <Lan.Xiao@amd.com>


[ROCm/ROCR-Runtime commit: df593aa076]
2016-09-02 15:16:18 -04:00
Lan Xiao 742354161b libhsakmt: Add MarketingName and AMDName for all nodes - CPU & GPU
HSA thunk API is currently reporting engineering name to MarketingName
and returning NULL when querying for AMDName.

-Change current name reporting from MarketingName to AMDName.
-Use libpci to get MarketingName



Change-Id: I819a6de7b067a2e724a6695e7d800274b83a71f8
Signed-off-by: Lan Xiao <Lan.Xiao@amd.com>


[ROCm/ROCR-Runtime commit: 9cbbf30be7]
2016-08-23 10:49:27 -04:00
Felix Kuehling f0af6eceed Fix 4GB and larger system memory allocations
Intermediate size was stored in a 32-bit variable. This resulted in
4GB allocations to fail in KFD due to 0 size. Larger allocations
would allocate the wrong amount of memory.

Change-Id: If19dedf64952f1d2edd813793241e12c0362d220


[ROCm/ROCR-Runtime commit: 82b3fad320]
2016-04-11 11:17:06 -04:00
Felix Kuehling a8a5960095 Add environment variable to disable GPU caching
This option may help debug synchronization or coherency issues
involving the GPU caches. It works only on dGPUs, by changing the
cache policy of the GPUVM default aperture to "cohrent", which is
implemented as non-cached on current dGPU hardware.

Change-Id: I544ac9cc5c0cf1fa5c4e30f67aa42b3b5e44ae67


[ROCm/ROCR-Runtime commit: 06d391c6c9]
2016-03-17 18:51:47 -04:00
Harish Kasiviswanathan 14e60b6ab3 Get processor vendor from /proc/cpuinfo
Change-Id: I9039385d268ef1693fab121cbf1caf442129a12e


[ROCm/ROCR-Runtime commit: ee1dd5d9c2]
2016-03-15 15:37:52 -04:00
Felix Kuehling a31106ee4c Report SVM heap in topology
The Runtime requested this information so they can tell easily
whether a pointer is part of HSA shared address space or not.


Change-Id: If2041ed34031636677d692bc2dc6625634027ed4


[ROCm/ROCR-Runtime commit: 0ed29f5191]
2016-03-14 11:52:36 -04:00
Felix Kuehling 68f1b37518 Fix lstopo
Lstopo doesn't have system memory mappings at low addresses. Make
sure we leave enough GPUVM address space for kernel allocations
(currently only CWSR) before the start of the user-managed SVM
aperture.

Change-Id: Ic197f7bd5a3cfb150a0da2bfdbc848664e7869be


[ROCm/ROCR-Runtime commit: cac0c08496]
2016-03-11 11:01:12 -05:00
Felix Kuehling 029002d073 Add support for hsaKmtRegisterGraphicsHandleToNodes
Change-Id: I6fd7154dea78188480d5cb89ac237bad572356c4


[ROCm/ROCR-Runtime commit: 61ec3df2f9]
2016-03-10 11:16:02 -05:00
Felix Kuehling f171fef754 Clean up GPUVM aperture management
Non-canonical GPUVM aperture doesn't exist on dGPUs. Remove comments
and code that say otherwise.

Fix alignment of GPUVM aperture for gfx801. Requires the same workaround
as gfx802. It's not used for anything on gfx801 yet, but will be soon.

Change-Id: I88607fe7b340081cc0715b85f28fdbf5f1bb0ad7


[ROCm/ROCR-Runtime commit: b837c3e7b0]
2016-03-09 10:55:12 -05:00
Ben Goz 8baf22651d Align hsaKmtMapMemoryToGPUNodes according thunk spec
Change-Id: I507ba5c6029ca5e7088c25930d46f5221679ace4
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: e2fb4bc312]
2016-03-02 16:12:03 +02:00
Felix Kuehling d56931260a Fix address space leak in __fmm_release
Use the object size when freeing address space, instead of the
parameter passed in by the caller. The parameter may be incorrect
due to app or runtime bugs, or when the buffers is an AQL ring
buffer with double mapping workaround.


Change-Id: I00bb31d4520ef969a49d6d5ea723e8a33418acc3


[ROCm/ROCR-Runtime commit: 006f3ee41b]
2016-02-26 09:19:21 -05:00
Felix Kuehling 8ae4e547bc Use aligned size for looking up userptr object after allocation
The alignment performed in vm_find_object_by_address isn't sufficient
because it doesn't take into account the offset from the start of the
page.

This fixes a bug where certain unaligned userpointers and sizes fail
to register correctly.

Change-Id: I17872e264467a619f5e1bedb7e1ed3d994a856bf


[ROCm/ROCR-Runtime commit: 8a0161d6bb]
2016-02-25 19:47:05 -05:00