KFDQMTest.MultipleCpQueuesStressDispatch is fixed as of MES SCHQ version
0x3c ().
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I437f3eb5f12dc159339a9b7c7cff2e2b8214ad7c
A patch was made in gfx940 npi branch to move the kernel object file
loading to outside the rocrtstNeg.Queue_Validation_* main queue creation
and submission loops, and added a clear_code_object() after the loop.
Another patch was made to the non-npi branch which adds a
clear_code_object() inside the loop. When the npi branch patch was
merged, this was causing the code object to be cleared at the end of
the first loop. Remove these clear_code_object() calls.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id4188e78411e81c5071bf715c1f02491f571ab79
Throw runtime error instead of returning empty string when open() fails
in LocateKernelFile()
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Iafa360fbc2d3c9b01b9fe7ea4c11d70bd254ccce
If the required scratch allocation is too large, ROCr will attempt to
reduce it by lowering the dispatch's targeted occupancy. The reduction
loop however was prone to overflow if waves_per_cu was not a multiple of
waves_per_group. Ensure no overflow by aligning waves_per_cu to
waves_per_group.
On GC 9.4.3 dGPU, dispatches with a large grid size and a
waves_per_group of e.g. 16 may require to reduce occupancy such that
waves_per_cu is less than waves_per_group to ensure the allocation size
is small enough. Allow this while also ensuring the tmpring scratch wave
count is kept divisible by the number of SEs per XCC.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ie4016dcd8166a9ae69e9decc26a3eec882b49480
Overload Assembler::RunAssembleBuf to take in an extra Gfxv parameter.
Using this overload will temporarily set the target ASIC to Gfxv before
calling RunAssemble, and copy back the original MCPU literal upon
completion. The copy to reset the original MCPU in this case is safe as
the MCPU length is always known.
This will be useful in multi-device test cases whereby the devices are
not necessarily the same gfx version. The overload is explicitly for the
RunAssembleBuf wrapper rather than RunAssemble to ensure the default
MCPU is always reset independent of errors in RunAssemble.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7fe5a962876314b6df32e4b7160174949d98f9e3
Negative queue validation tests were doing many redundant from-file
kernel object loads in a loop. This was creating many simulataneous open
file handles within many dynamically allocated CodeObject objects. While
the CodeObject class implements RAII on the file handles to cleanup on
destruction, clear_code_object() only gets called on the destruction of
the TestBase-derived test objects (these being a suite abstraction).
Due to this we were hitting file open() EMFILE errors (too many open
files) in gfx94x CPX mode. Move LoadKernelFromObjFile outside of the
test loops and clear_code_object() for each test on each agent.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I6f9d23fd122720c49a58c22698f097906d2fc97c
LLVM MC does not seem to accept multi-line conditionals. This may be
fixable in the future with macros. The Aqua Vanjaram shader spec states
that while buffer_invl2 has been replaced by buffer_inv, the former may
still be used for compatibility. However, this does not seem to be
implemented. For now, fix conditional.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7f8b64c96055371d7e0090b758d2cfd2a37ecd3c
For GC 9.4.0, modifications were made to various shaders since certain
flat_ instructions no longer support glc/slc modifiers (replaced with
nt/sc1/sc0). Instead of repeating conditionals inside various shader
bodies, we can make use of LLVM AMDGCN macros.
This patch modularizes the shader macros into seperated defines. Prior
to the core raw-string literal, each shader now starts with the
SHADER_START literal (".text\n") plus any number of SHADER_MACRO_*
literals. This allows us to seperate the macro definitions logically and
use the pre-processor to only include the required macro groups on a
per-shader basis.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I19eb3fd14252a0601bb7509249051b68e7fdb02a
GC 9.4.3 to set gfx target version to 9.4.x dependent on revision and
capabilities. Due to this, where applicable, mask off the gfx target
stepping version and only check major/minor version (9.4). There are no
collisions due to this change since GC 9.4.3 is the only ASIC that uses
gfx target version 9.4.x.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I72803e594c421f054d18ccfa7e92c507128fa5be
Use q->total_mem_alloc_size for munmap in SVM codepath of free_queue.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I2fecaa1ddb337b1fe71f9cbba45a0c9467eff0c0
In multi-partition modes, e.g. CPX, we want to create new file
descriptor despite using the same render node. Update
open_drm_render_device to use a gpu_id to fd map partitioned by render
node. Different gpu_id's requesting the same render node will be added
to that render node's map list for fetching its fd. Different gpu_id's
requesting different render nodes as well as the same gpu_id's
requesting the same render node will behave as they did previously.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ie153d42355d4d75b1c6ba6ff40fac3295bc87009
Add gfx version for VGPR size per CU calc, add FAMILY_AV to KfdFamilyId,
add blacklist filter to kfdtest.exclude.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I9b8072e45f4d497e0a8fd3f8f97f1425238e8b42
See description of previous revert.
This reverts commit 564913526a.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I969dc6469e62b50cd7ba0595918538602afa7516
This patch and the previous made it such that the queue ring buffer was
allocated as non-paged for GFX11+. The queue ring buffer should not be
mapped as non-paged; the non-paged requirement on GFX11 is only needed
for the queue wptr.
This patch was causing issues on various tests, such as intermittent
CP_INTSRC_BAD_OPCODE interrupts.
This reverts commit e40ae8481e.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I55b64aed73dc3b792f0756ae00daf6e10d93ce10
Test is inconsistent across ASICs. Add to blacklist to unblock QA.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I31e5aa2450165227107536bef8402db2c0dc6d7f
Remove BLACKLIST_GFX10_NV2X from GFX11 blacklists, update
BLACKLIST_GFX11 as needed.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I84bd91ba20a5d3df27478fb4c97afa12f8a3e76a
KFDTopologyTest.BasicTest duplicates Thunk logic to calculate VGPR size,
meaning it will always be the same, and SGPR size is a constant. Since
no benefit, remove comparisons.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I99e7ff6fb69ed07bc0716fdf43946b19c67b9268
To avoid confusion since this shader has changed to be persistent
(original IterateIsa may be re-used for debugger tests).
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I4643692765fc7665933257e89d5b922e779ad2e5
KFDCWSRTest.BasicTest is parameterized to allow an easy method of
tweaking the number of work-items (and save/restores). The input/output
buffers were previously hardcoded to a single page, which would cause a
segmentation fault if the number of work-items specified is greater than
1024 for wave32.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ieefc819a5d81c77cee88081a287fd383e6378e74
For software trap in GFX11, COMPUTE_PGM_RSRC1 must have PRIV = 1.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id504889c3ca2588b6c8cefdebaec00dcfc217995
Prior to launch some ASICs may re-use PCI DIDs from older generations.
This can cause issues during topology initialization as hsa_gfxip_table
lookups will override sysfs-provided gfx versions, causing incorrect
gfxip selection. Since no new entries will be added to hsa_gfxip_table,
limit its search only to pre-GFX11 ASICs.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I53eaefac5db2650a36a6ce9f21daf750f50cfd26
IterateIsa had some leftover instructions from when the shader was
getting updated for KFDCWSRTest.BasicTest.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I41ae7b7948cbe2aff8bf61b170b9a7d498b836a3
Required due to LLVM retirement of llvm::apply_tuple, instead using
std::apply which was introduced in C++17.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I6646ebcca7d71d3e1bcf340ccfa3db2c15a3110a
Failure with new CWSR tests reported for GFX10, for now add to blacklist.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I5b2bd9ec61c64ad66e1c34ba2c192bece808f56f
This patch restructures the CWSR basic test and allows for
creating parameterized CWSR tests. This patch introduces four
parameterizations. These tests behave as follows:
This test dispatches the IterateIsa shader, which continuously
increments a vgpr for (num_witems / WAVE_SIZE) waves. While this shader
is running, dequeue/requeue requests are sent in a loop to trigger
CWSRs.
This test defines a CWSR threshold. Once the number of CWSRs triggered
reaches the threshold, a known-value is filled into the inputBuf to
signal the shader to exit.
4 parameterized tests are defined:
KFDCWSRTest.BasicTest/0
KFDCWSRTest.BasicTest/1
KFDCWSRTest.BasicTest/2
KFDCWSRTest.BasicTest/3
0: 1 work-item, CWSR threshold of 10
1: 256 work-items, CWSR threshold of 50
2: 512 work-items, CWSR threshold of 100
3: 1024 work-items, CWSR threshold of 1000
Tuple Format: (num_witems, cwsr_thresh)
num_witems: Defines the number of work-items.
cwsr_thresh: Defines the number of CWSRs to trigger.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I639eb7bd75b14ee70e190b4bd19dcf34096fc7bf
Non-paged allocation for queue memory necessary for binding wptr to
GART. Required to support usermode queue oversubscription with MES for
GFX11.
Adds AllocateNonPaged entry to MemoryRegion::AllocateEnum for clarity;
aliases AllocateIPC.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I1a97a1820da26cf2433d9c237b2e6d2b0b8628b4
Kernel amd-staging-drm-next branch changes GFX11 fish_colour sysfs
naming to "ip discovery". Update run_kfdtest.sh to use sysfs
gfx_target_version for ASICs that have transitioned to IP discovery
topology.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: If202a0ceeed7324364539a33661f0abcf0973f07
Non-paged allocation for queue memory necessary for binding wptr to
GART. Required to support usermode queue oversubscription with MES on
GFX11.
Change ensures queue memory does not specify ATS.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I10b23b0205c90dad902c711a88cfb5e9b4979617
Add blacklist for tests on GFX11 that are under debug/not functional.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I32f375f29036a2fc1a54f2792b31ebc45f4d668b
With this patch gfx11 is supported in amd-staging.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I4bbfc87345a486dd8f2e0091ea7b82c255a8ad15
Old CMake message was misleading, update to reflect what it's actually
doing.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I8fd18a9095ea350cc10494b4382706027b447ba3
KFDQMTest.BasicCuMaskingEven was previously in TEMP_GFX10_BLACKLIST and
was later added to BLACKLIST_GFX10_NV2X. shows this test
also has problems on NV1X, so move to BLACKLIST_GFX10 to blacklist for
all GFX10 until resolved.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I75426780a52172ed0f2468f0297241902da5002a
Add BLACKLIST_GFX10 and BLACKLIST_GFX10_NV2X to reduce redundant
individual blacklists. Remove KFDDBGTest from kfdtest.exclude and
CMakeLists.txt as it is deprecated.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I5ffebb012ff8ef4bba5aadfeb3c7478fe43c65f1
DeviceHdpFlush was part of the prior TEMP_GFX10_BLACKLIST and is
soft-hanging after being re-added to the test list. Temporarily move
back to gfx10 blacklists until root-caused ().
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id37b7105566e8243465e4b21ebc2e2e8c4c79923
In DeviceHdpFlush, isaBuffer was accidentally used instead of isaBuffer0
during LLVM re-work--revert.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I98d2322e772f821a39505bb336ceb4e6cd8722ef
Includes a simple AssembleShader test which loops through all shaders
for all supported targets, dispatching a RunAssemble call for each
shader.
Also adds extra safety on a couple shaders that only work on
gfx9/gfx90a.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I3ca1c92136f3871eb62fcb9645694f22287aaeec
With LLVM-based assembly these shaders are now valid for GFX10, with the
exception of KFDSVMEvictTest.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Idc872139176bbc1cc8d7ae61a8e4572360ecb5d5
KFDDBGTest is deprecated, so just removing references to IsaGen.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I9f094d847a8ae43cb3793253b34a7d7ed2179ac1
Use ReadMemoryIsa transferred and updated from KFDEvictTest.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I566f9ec36398bc4d08ab90231688600356df4d6a
Makes use of macros to simplify shader code with instruction-level
differences depending on GFX version. These macros are extensible and
are prepended to every shader so that they are usable everywhere.
This patch introduces three macros used within IterateIsa and
ReadMemoryIsa shaders.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: If954e1b6d2027e9f55bf7e99bd9df2668d1da524
Initial commit for ShaderStore.hpp. Will contain consts char*'s for
all shaders used within KFDTest.
The LLVM assembler now takes care of the correct instructions to be used
for various GFX versions using directives embedded into the shader assembly.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I2887a03b33d5c2cc382e4f96c2bc3e067715ab54
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id1eb3856bc74bf0da46685c5dc08e91f5df66d4f
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
- Change gds:1 modifier to gds
- Change offset0:0 modifier to offset:0
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I2a863695bcf7344cf184a809704948ba3a0d230f
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7333d0e45ccd3f43690a2a01227f89a6e04fcecb
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I174f1ea5332c499440b30d9bcf06836274428a0f
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I669f076b5c34eb90349865eeca1b29e17c9e80d6
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
- LLVM syntax change on ScratchCopyDwordIsa_gfx10:
hwreg(HW_REG_SHADER_FLAT_SCRATCH_LO/HI) -> hwreg(HW_REG_FLAT_SCR_LO/HI)
- Fix bug in CopyOnSignalIsa_gfx10 and PollMemoryIsa_gfx10 whereby
flat_store_dword used vector reg format v[n,n]. Changed to v[n:n]
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id182cfb8aeb7372366c59affb5cbdd145909ee96
Instantiate in KFDBaseComponentTest::SetUp() and destroy in TearDown().
This ensures m_pAsm is available for all tests.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I8b98a5350a9739d71455f14552c9879bdb1c475d
Initial commit for transition from IsaGenerator/SP3 assembler model to
the LLVM AMDGPU (AMDGCN) assembler backend:
- Add Assembler class, may be instantiated for assembly similar to
IsaGenerator.
- Add Assembler and LLVM archive dependencies to build process.
- CXX bumped to gnu++14 as required for LLVM compilation.
- Compatible with LLVM 7.0 and greater (latest Lightning/llvm-git
version should be used for up-to-date gfx support). Note that this is
just a build dependency and *not* a runtime dependency. LLVM does not
need to be installed on the host machine to run kfdtest.
- CMake will first look for a Lightning build. Lightning itself does not
need to be installed system-wide, just built. If this fails, it will
attempt to find a system-wide LLVM install.
General Assembler usage and notes:
- Similar to IsaGenerator, applicable test classes will contain an
Assembler object pointer which may be instantiated in the test
constructor.
- Instantiation requires the GFXIP version in order to find the
appropriate LLVM AMDGPU Target ID.
- The RunAssemble() member func takes in a standard const char* shader and
fills the TextData member with the output binary; TextSize with the size
of TextData. These may be accessed via GetInstrStream() and
GetInstrStreamSize(), or the output binary may be copied into an
IsaBuffer via CopyInstrStream(). RunAssembleBuf() combines RunAssemble()
and CopyInstrStream() and additionally takes an optional BufSize
parameter to specify the size of the output buffer (defaults to
PAGE_SIZE).
- Assembler object deletion is to be done in the base test destructor.
Assembler-specific memory allocation is freed in the Assembler
destructor.
- For debug, one can call PrintTextHex() to print out a formatted hex
representation of the output binary, or PrintELFHex() to print out the
intermediate ELF object. Note that PrintTextHex() is public whereas
PrintELFHex() is private.
- Prints use the LLVM outs() call as that allows for use of the LLVM
format_hex() func in the aforementioned debug prints. This is subject to
change if the LOG() call would be preferred.
RunAssemble control flow:
- Ensure correct Assembler initialization and clear previous run
TextData (if necessary).
- Initialize LLVM AMDGPU target, required interfaces, and buffers.
- Set parser to specified target/subtarget and assemble into ELF code
object.
- Extract .text section from ELF, allocate space for TextData and store.
- On success, returns 0 (HSAKMT_STATUS_SUCCESS). On error, returns -1
(subject to change to be in line with HSAKMT_STATUS enum).
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I1d96230824db651d3ffbaa46eb68fc274e7066b5
If lookup is successful, device info from find_hsa_gfxip_device() is
used to populate props->EngineId.ui32 gfx version fields and node CAL
name (props->AMDName).
If unsuccessful, uses gfx_target_version sysfs field if present
(otherwise results in error), and sets the node CAL name to
"GFX<GFX_VERSION>" (e.g. 9.0.8 -> GFX090008).
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id39c521b769aebbe40c934f19e03150a66884cce
Some g_system and Node ID checks already performed by validate_nodeid().
Fixes bug where hsaKmtGetNodeProperties() would return on
validate_nodeid() error without releasing lock. Switches some
conditionals to return INVALID_NODE_UNIT instead of INVALID_PARAMETER if
NodeId >= NumNodes. Removes some g_system assertions to return error
code rather than trigger a hard fault.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id1604b20c2cef8808b98cdad61bd47aa7ea3d229
All conditional logic previously dependent on asic_family now dependent
on gfx version. As such, HSA_FORCE_ASIC_TYPE is now deprecated and
HSA_OVERRIDE_GFX_VERSION should be used instead.
device_info structs containing asic_family, eop_buffer_size, and
doorbell_size removed (alongside dev_lookup_table[]). eop_buffer_size
and doorbell_size now determined via macro, with eop_buffer_size and
full gfx version field being added to queue struct.
Certain funcs previously dependent on DID or GPU ID now dependent on
Node ID (due to use of get_gfxv_by_node_id()).
Fixes sleeper bug where ctl_stack_size and debug_memory_size were being
incorrectly programmed on gfx90a.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Iaabdc5c73920ad83b4b379cd6086992357b8ff10
get_block_properties() switch statement now based on major GFX version
instead of asic_family. Addition for NPI bringup only needed on major
GFX revisions unless differing perf_counter_block assignment necessary.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ia02676d2a3a8f968b67feeafbab534ef4c01c0dd
Add defines for converting between full gfx version (in decimal) to
major/minor/stepping values, and major/minor/stepping values to full gfx
version (in hex). The first is to be used when grabbing the gfx version
from sysfs, the second when returning the gfx version in
get_gfxv_by_node_id() for comparisions in Thunk.
Add enum for defines of full gfx versions for various cards. These are
to be used in conditionals to replace CHIP_*/asic_family comparisons. On
NPI bringup, addition to this enum will not be required for
functionality unless explicitly needed for a conditional. Most ASICs in
this enum simply for completeness.
Add get_gfxv_by_node_id(): returns full gfx version in hex.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I9d1dba7fdd4a587a000eea2f4141a1d301bf4776
Graham Sider