Adds hsa_amd_portable_export_dmabuf and hsa_amd_portable_close_dmabuf
which allow obtaining dmabuf handles to rocr allocations. These handles
may be shared with other APIs to support cross vendor & cross device
memory sharing.
Adds query to return whether dmabuf export is supported
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
Change-Id: I7f98501087d9563d07fc2cb428cc886b1e518b1e
Track and report the size, in bytes, of pending unexecuted blit
commands. To be used in copy ganging.
Change-Id: Ia7453ff88571e927df771c6c819b73c17e67708e
Discovered agent handles should only apply to copy routing, not to
copy device selection. The user may not have mapped all allocations
to all GPUs so we must ensure that the copying device is one passed
by the user.
Change-Id: I2532e66d30e6842624e594f235dd144a186220d4
Mostly a demo at this point. Logs SVM (aka HMM) info to
HSA_SVM_PROFILE if set.
Example: HSA_SVM_PROFILE=log.txt SomeApp
Change-Id: Ib6fd688f661a21b2c695f586b833be93662a15f4
Adds a script to run clang-format on the latest patch so we don't
need to remember the command line.
Also applies missing formatting to the prior commit,
"Add API for available GPU memory".
Change-Id: Ida51aedc38af229f6a26e275072654860748fa93
IPC use cases with RVD set can't convey proper agent handles.
Runtime discovery is required to properly route the copy in this
case.
Change-Id: I4c97e132fb4b6ac1040de1cb17fe5a3e36d6be48
This is consistent with KFD and has significantly better latency.
KFD is taking this as the definition of the SystemClockCounter.
Change-Id: I4c1b3bc58c738206265c55ebefd41356c013bfe5
Declare the type of HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT
and add a missing break statement.
Change-Id: I86ce8a2e620438e046b60cee991ce1fbe07a3e88
On gfx10+ we need to issue a minimum count of active lanes or
groups before ADC moves on. Ensure that scratch allocations
attempt to reach this limit.
Occupancy throttling due to OOM condition may still drop below this
limit.
Change-Id: I0edf2e40fbe1a95e9a262564cebd2b6a82501a0b
Each time delay is grown we need to reset elapsed. We want to take
the most accurate sample from the set at fixed delay.
Without this we will hang if there is ever an insufficiently accurate,
high unit clock read.
Change-Id: Ic65f364067789ac85a6572d67af2d77528e265bb
The loader must use internal interfaces to access page allocation
flags. Code pages should also ensure use of cached memory.
Also relocate i-cache flush after code page copy.
Change-Id: I86d36243b6eebb1d46b991b372a5236baaf941ab
VM faults should not report via the queue error handler.
The system event contains much more useful information.
Change-Id: I744d9b97b23334d7ed2c0f450111c1b8032567e3
Hive ID is used during copy path selection to locate an optimal
pool of SDMA engines. However, for CPU-GPU connections we always
want to use the host port facing engines, known generally as the
PCIe optimzed engines. We want this selection even when the
connection is XGMI hence dropping the hive id for CPUs.
Change-Id: Iffe44174afecfc0bb3272b806fce549c930a49d9
Excessive scratch allocations can normally trigger occupancy
reduction. This breaks cooperative groups so if occupancy
reduction is required on a cooperative dispatch fail with OOM.
Change-Id: I64612a2e38bf1286f3b74c1c2a68ab0c85452771
With asym. harvest hw does not issue groups equally to each SE,
occasionally hw will skip an SE so that the distribution reflects
each SE's CU count. Scratch resources must be allocated to reflect
this asymmetric distribution of groups.
Change-Id: I65e26206500483ea18e6e8796e65ecba5354b029
HW does not ignore low bits of the scratch wave count and will
stride beyond the end of the allocation if the wave count is
ever indivisible by SE count. Rather than returning the allocation
size for cached large scratch allocations, use the requested
scratch size in scratch setup. Scratch cache will retain the
cached allocation's size.
Change-Id: I0129ddc99a8940d01d8fbcd0b02d5061f31f456d
discardBlock may be called multiple times on the same block.
We must not discard the block multiple times or we will corrupt
in-use memory accounting.
Change-Id: Ife9f3162785965a795dcf81887d4d447cc096e62
Minimum queue size was not enforced at the Agent level. Minimum
size should be one page to give unifority across all asics.
Change-Id: I26394f79458d09fbceb79fc8aaf495e2c26a8ff3
On gfx90a only a reduced number of CUs must be used for cooperative
dispatches due to CWSR and launcher interactions with asymetric
harvest. We must use one fewer CUs per SE than the lowest count of
CUs on any SE.
Also adds env var HSA_COOP_CU_COUNT which enables the cooperative
CU count computation. Set to 1 to enable the new computation.
This is an opt-in feature that will become enabled by default (opt-out)
in a future release.
Change-Id: Ifbb75ced3bbc15876eef44922c6a4f6fde8c4c28
Prior solution used a single global lock to protect the memory tracking structures.
This change protects the memory tracking structure with a shared mutex (rw lock) in
shared (r) mode for memory allocations and frees so that long duration processes,
calling to kfd, can be done in parallel. Operations which must modify the memory map
take the mutex in exclusive mode (w) and must not call to the thunk while holding
the mutex.
The fragment allocator now requires separate protection and is protected with a
mutex at the device level. Protecting at the device level, rather than pool,
allows retention of the current recursive design and allows calling Trim from
withing Allocate. This could be made finer (pool level locks) but would
require backing out of Allocate entirely to call Trim. Trim and any retried
Allocation must be done in isolation (per device) or we may report OOM when
memory is actually available in some pool's fragment cache. So some device
level serialization is required in at least some paths.
Change-Id: I7c1e94d6965ffcc602b12fefdd3a6e97b84b5e00
Comments call out the specific operation being selected since the
ternary nest is a bit hard to read.
Change-Id: If033dbaa6cba132e96196ad3fc6d5572042041f4
Argument must be checked for nullptr before being dereferenced and
filled with the default return value.
Change-Id: I9ff366f066a5e18c78129bf59cc3ba00fca3ef18
GetGlobalMemoryPool had improper return codes for an iterator callback
and did not properly order the APU pool selection path.
Change-Id: I01ab9d23e2352be98d9718bc25889ad4f779d3ca
Clang warns about bitwise operators on bools. Cast to int silences
the warning without introducing short circut logic.
Change-Id: I6e25138e1acf4a5562d3925ea5b2fcef3addb783
Would be nice to get warning count changes highlighted in CI though.
Clang's increasingly suspect diagnostics has caused multiple build
breaks without highlighting any actual issues.
Also: https://embeddedartistry.com/blog/2017/05/22/werror-is-not-your-friend/
Change-Id: I7dc82da58cd86f7b4f1a9fb511c4c039419271d4
KFD topology has been corrected and the defaults used by this
workaround are no longer true for all chips.
Change-Id: I0242d8077e9666ed1cf0dc3985244258ae5c0924
The return code is just -1 if any error occurs. To detect debugger
unavailable we need to check the actual ioctl error code.
Change-Id: I8a294c754196aec916809497ec8e810da2f072b8
Signed-off-by: Sean Keely <Sean.Keely@amd.com>
Early exit if the range is found to be fine grain. Indeterminate
should only apply if the range is neither coarse nor fine.
Change-Id: I54133e14f4e8cfa53e2d612f6112cdcdb5a47dfa
Because of sharing ports with other engines, the
hardware design team has advised that SDMA0 on gfx90a
should only be used for host-to-device data transfers.
The recommendation is to use SDMA1 for any device-to-device
or device-to-host data transfers.
A driver change will ensure that, for each gfx90a
device, only the first PCIe SDMA queue a process
requests will possibly be from SDMA0. This patch ensures
that the first PCIe queue requested (which may be from
SDMA0) is always set up for host-to-device.
Change-Id: I6793ca95596dedaed9d5be1dbd9469ceef2a5c33
Bumps cmake minimum version to 3.7 for version comparison operator.
Previously the Clang cmake project version strings were used. These
are not defined if the clang cmake project has not been loaded.
We should use CMAKE_CXX_COMPILER_VERSION to check the version when
only the compiler binary is redirected and the project files are
not available.
Also adjust device libs lookup logic to handle multiple paths in
CMAKE_PREFIX_PATH.
Change-Id: I67b6958d8241685cd6c3a0af68507c9fdc6331ef
For minimal latency we should place command queues and blit code
in the nearest numa node to each GPU. Add an allocator matching
the current runtime default allocator interface to each GpuAgent
that allocates on the closest numa node as represented by kfd
topology. Use this allocator for queue ring buffers and blit
objects.
Change-Id: I181127f9c27bafe68976312963146616e3f58369
Also make failure to handle queue errors fatal.
Motivation is to improve detection of queue error conditions
that currently appear as application hangs.
Change-Id: I655643616dc0bd303d7df3ce8aca2c099bec3d46
Sets package found and component lists. ROCr does not have components
so this is mostly cosmetic. It's part of maintaining a compliant
cmake project config file though.
Change-Id: Ida2ef746375143babd3a6f938727a47135606f01
Per clang 13 option -Wno-error=unused-but-set-variable is not
recoginized nor is the diagnostic emitted. Set this option
conditional to the clang compiler version.
Change-Id: I3c0958dffa985d53b641f9eff4e702988dffd033
Passing 0 into num_cu_mask_count used to be an implicit error.
This has been repurposed as a short hand for enabling all CUs.
Enabling all CUs when HSA_CU_MASK is set will cause the CU mask to
reset to whatever was set by HSA_CU_MASK which may then be queried.
Change-Id: I1d6bb2034595a78ee48fa72aa05563e8ea6c0fff
Delay parsing until after GPU discovery. Use the surfaced
GPU count and maximum phyiscal CU count to limit parsed bit masks.
This prevents pathological input such as
HSA_CU_MASK=0-8000000:0-8000000 from attempting to consume 7TiB.
Change-Id: I3773d2db3740c2023b0f6275d1818b69119b0495
Take in const void* rather than void*. This does not break the
abi or existing code. Existing code would need to cast away any
const which is unnecessary and annoying.
Change-Id: I28787e8fab1b600bf6871ea82835e10a4f475c5b
Branches are unused and emit noise to the console when running
commands for which we have no actions.
Change-Id: I1f8c49a20bd7f529172721f35d29665cfc8dc6a4
Some strings were missing the human readable form of the error code.
Also unifying source formatting via clang-format.
Change-Id: I0bcc2ab77dda476904c684cc2c584a5c7e8230d4
global_flags reporting allows discovery of an allocation's memory
model (coarse, fine, kernarg). This is critical on gfx90a and
also allows discovery of the memory model of IPC imports.
Change-Id: Icbc3c243ca20e264af5e1931becd2419f762c7ad
Previously ranges were reported as fine if and only if they were
entirely fine. Coarse and mixed ranges were reported as coarse.
For gfx90a it is critical to know if a range is coarse or fine as
fp atomics targeting fine do not function. Range queried reporting
coarse must be able to be trusted so must only report coarse if the
entire region is coarse.
Change-Id: I29c654a2afcd6943961eb2455e3654dfdb1283b5
New environment variable HSA_CU_MASK allows users to
specify a cu mask to every queue allocated from any
GPU. hsa_amd_queue_cu_set_mask is restricted from
escaping this mask.
A new API hsa_amd_queue_cu_get_mask is added to query
the current cu mask.
Change-Id: I846c03a5faaca9b95067c31db84b59cc9fce2f03
Some distros do not provide the proper hwloc version for rocrtst.
This packages the required version.
Change-Id: Iebc68250c33f309d6b50e850a0553685bac50563
Correct deb and rpm package conflict declarations.
hsa-ext-rocr-dev was to be replaced. Now that two packages
replace this package remove conflicts so that they do not block
eachother.
Change-Id: If25ea6cfd3d6d00398fd0a8d179860d3a92dc907
Conform with normal packaging behavior where a binary
and its development headers are in separate packages.
Change-Id: I91c58ea271a8e1c710c213060bca6d58d69287e6
Preparation for splitting the package. rocm-dev meta package
should be updated after this is merged and before splitting the
packages to avoid build breaks.
Change-Id: Iaad54ee72207285eaaa99e88cf1949bea7f29001
Under xnack we can now identify the queue which generated a vm fault.
This allows users to identify which queue, and therefore which
dispatch, a vm fault came from.
Change-Id: If72ff3de05800f2b811aa7842a15eedff8b5e45a
Certain special signals do not carry their updates via their signal
value. These signals are wrappers around special KFD events, of
which the only current instance informs about VM faults. We either
need to check each signal for this special event type or rely on
the checking done in hsa_amd_signal_wait_any. Since there will always
be a small number of these signals it doesn't make much since to
penalize the performance path with this check. Additionally we know
that the signal indicated by hsa_amd_signal_wait_any is satisfied so
don't need to recheck it's conditions.
Change-Id: I9fc6298300ad543d823ecd28ca8fab4ad26c23ef
Clang now warns about set but unused variables. It also now
recognizes -Wno-error=unused-but-set-variable so this patch moves
that option back to the general options list.
Change-Id: Id800e87eb688b9441b14380e2246ad586179f31a
Allows determining if the host can directly access HMM memory that
is physically resident in vram.
Change-Id: Ie452eedd0e27fe1b511afd416f5a1cd01b3d84e8
Sean Keely