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Author SHA1 Message Date
Christophe Paquot a96dc6e41b Update addrlib for gfx900. 
Change-Id: I2b7b6093406c5498e9a551327701ad8973f1cf3a


[ROCm/ROCR-Runtime commit: 29894df0b5]
 2017-03-07 14:41:16 -08:00
Ramesh Errabolu a9a54e2cc3 Extend Rocr Samples to allow collection of Perf Cntrs 
Change-Id: I9c7e75128fca28b23ec54efab00bf5d32c95a877


[ROCm/ROCR-Runtime commit: 315ae6439b]
 2017-02-28 20:29:24 -06:00
James Edwards ccbb47d79d Update readme regarding CMAKE_PREFIX_PATH. 
Change-Id: I322789f38b1984b2527554c10cb0f3be886d3e91


[ROCm/ROCR-Runtime commit: 470750cc3c]
 2017-02-20 14:33:53 -06:00
James Edwards 1bb65fb587 Modify packaging cmake files to use BUILD_VERSION* instead of RELEASE_VERSION*. 
Change-Id: I6f1b83c9faf0d40c1ac27d8998f4651341971b1b


[ROCm/ROCR-Runtime commit: 57ac399652]
 2017-02-16 16:40:20 -06:00
Ramesh Errabolu 513004fb28 Enable code for Perf Cntrs for gfx900 - AI family device 
Change-Id: I4659da1a8db17392016fc90c8ea19b5805b5d3aa


[ROCm/ROCR-Runtime commit: 42e751519b]
 2017-02-15 21:50:23 -06:00
James Edwards 212d7c3f8f Fixes to HSA CMakeList.txt files 
Change-Id: Idd176d24dfd22bd9a6a8860ab035fd5d1aca756d


[ROCm/ROCR-Runtime commit: 900f272622]
 2017-02-15 08:26:30 -06:00
James Edwards fca0ec886c Fix TeamCity builds using utils.cmake. 
Change-Id: Id15a911dad06643d9457cc4d8c907fc5796772ee


[ROCm/ROCR-Runtime commit: b7e06b471c]
 2017-02-14 15:36:21 -06:00
James Edwards f851f5adf6 Modify hsa CMakeList.txt file to use PREFIX_PATH and git describe versioning. 
Change-Id: I08668df07725369ecf8a2f35e74dd7d64c8ca94b


[ROCm/ROCR-Runtime commit: 73e942cd8a]
 2017-02-14 08:39:16 -05:00
Konstantin Zhuravlyov 2a071e1456 Bring loader in sync with stg/sc 
Change-Id: Iccce07b8fa03d37c4267a2a9bd343e6614dc43e7


[ROCm/ROCR-Runtime commit: 9887c26113]
 2017-02-10 11:21:15 -05:00
Jay Cornwall 16d8e2caa9 Implement code cache invalidation for Gfx9 
When a new enough microcode build is running use a vendor AQL packet
to submit the PM4 IB.

Change-Id: Icd3e2b322c418477420ba4a29f4455ce340ef0d2


[ROCm/ROCR-Runtime commit: 4d62b9482a]
 2017-02-09 14:15:21 -05:00
Ramesh Errabolu 34327e7167 Support Gfx9 and Pre-Gfx9 Thread Trace Drivers 
Change-Id: Ic3fea4006d76d1e3f58dde6f64c343a1261abe39


[ROCm/ROCR-Runtime commit: e91970a39b]
 2017-02-07 15:39:59 -06:00
Sean Keely de0fa51022 Fix Api table copy operation and tools version checking. 
Change-Id: Ia76d16f3ea6d0abb931813f90bc3bc2119da5999


[ROCm/ROCR-Runtime commit: 505d722b7d]
 2017-02-07 14:26:20 -05:00
Sean Keely d984194fa5 Use fixed size type for queue type arguments. 
Change-Id: I81b605c9cc9b18bcef043a4f0292212241ce5987


[ROCm/ROCR-Runtime commit: bc43f97964]
 2017-02-07 01:22:30 -05:00
Ramesh Errabolu 835866b042 Refactor Thread Trace Service as an independent library 
Change-Id: Ia7579bc16626f3e21c8df50f8a35cb4b82f6bda9


[ROCm/ROCR-Runtime commit: 74e3a49b20]
 2017-02-06 17:04:07 -05:00
Jay Cornwall dce2a864ba Fix Gfx9 write pointer setup 
Should point directly to amd_queue_t.write_dispatch_id. Only noticeable
with HWS enabled which is not yet stable.

Change-Id: I169906d45225379a3ca2729ff04d298fdbb9a9fb


[ROCm/ROCR-Runtime commit: 28f51d5808]
 2017-02-06 14:06:12 -05:00
Ramesh Errabolu 4a70f68afb Refactor Device Id to Asic Type Mapping Service 
Change-Id: I8969b41f7c4de9fdeee5131e2049053a486f64fb


[ROCm/ROCR-Runtime commit: 7755bd5487]
 2017-02-03 14:22:32 -05:00
Jay Cornwall 7b45ebfe7f Add support for ARM 
- Build system fixes
- No user-mode high-precision timer by default, use clock_gettime
- Use C11 aligned_alloc pending C++17 std::aligned_alloc

Change-Id: I268365bdfd11d1e817a89584b9e086ee5b86e1dc


[ROCm/ROCR-Runtime commit: 9e575ea96a]
 2017-01-31 16:43:49 -08:00
Jay Cornwall 7f38f6e297 Add support for gfx900 
- Route AQL doorbell directly to HW doorbell
- Reuse precompiled Gfx8 shaders on Gfx9 (ISA is compatible)
- Add a warning for unimplemented code cache invalidation

Change-Id: I92096584a1404e35779c96ae6bdc3e0e7fd04721


[ROCm/ROCR-Runtime commit: 7e0a5f9c00]
 2017-01-30 16:36:28 -06:00
Sean Keely 2755a4e0a7 Remove old names from API table interfaces. 
Change-Id: I41ca38b596e1dac85e871f583e3ffe7078b790e7


[ROCm/ROCR-Runtime commit: 796d31d94d]
 2017-01-27 17:45:26 -06:00
Christophe Paquot 2217e709da Adding the new APIs to the .def files and fixed a couple of things 
Change-Id: I247a60b8cdbd4acfed72fb6d78ac7faf69d8a556


[ROCm/ROCR-Runtime commit: 9ae1e15750]
 2017-01-27 16:51:50 -05:00
Jay Cornwall 22ffe11f5c Implement SDMA path for Gfx9 
Gfx9 requires monotonic write pointer and doorbell.
Cound fields are 1-based compared with 0-based pre-Gfx9.

- Restructure implementation to use monotonic ring indices
- Remove redundant submission size checks (handled by AcquireWriteAddress)
- Unify copy/fill per-command limit (documentation is unclear)

Change-Id: I57c1675221d2e63aa319fee700d9951671e1bd65


[ROCm/ROCR-Runtime commit: 1cd46afe6d]
 2017-01-26 13:11:21 -05:00
Christophe Paquot 4bb9fb4469 Add new 1.1 image APIs 
Note: Implementation same as 1.0 APIs for now.
      The followup change will have the complete implementation.

Change-Id: Ife633f74ff27eee0bb9b0c46952cf5233b0114e8


[ROCm/ROCR-Runtime commit: a324f21a46]
 2017-01-20 19:37:03 -05:00
Ramesh Errabolu 0bb7f56486 Add Gfx9 asic header files 
Change-Id: I04fe402ab44170dba582099670a8222c5c366e50


[ROCm/ROCR-Runtime commit: ff1d739660]
 2017-01-19 19:23:14 -06:00
Ramesh Errabolu 99ec6c549b Add agent properties for Tools 
Change-Id: I7bc49d35dc559f9c9058aae591b88c5ecc4b3ce5


[ROCm/ROCR-Runtime commit: 8ab28d1a51]
 2017-01-16 13:50:18 -06:00
Ramesh Errabolu 03668e6e06 Removing Old Commandwriter used by Profiler and Debugger 
Change-Id: I77d2172eef1724d1d4aed6d8e7a9df6cdbeb0648


[ROCm/ROCR-Runtime commit: f0263d8198]
 2017-01-13 11:51:21 -05:00
Christophe Paquot 321fdd26bf Add image 1.1 API changes to current code base 
Initial work to import the latest (1.1) hsa_ext_image extension.

Change-Id: I51d70ef26f97250c884b3def2088be0d7eb04eb3


[ROCm/ROCR-Runtime commit: 31d379c821]
 2017-01-12 14:49:54 -08:00
Kent Russell 56096ff555 Revert " Add image 1.1 API changes to current code base" 
Currently HSA HW Profiler is failing to build due to this patch

This reverts commit 91866d4bbb.

Change-Id: Iabb2b958f33ba614a24b61bb370905b3b7362708


[ROCm/ROCR-Runtime commit: 5162a76616]
 2017-01-12 06:43:54 -05:00
Christophe Paquot 91866d4bbb Add image 1.1 API changes to current code base 
Initial work to import the latest (1.1) hsa_ext_image extension.

Change-Id: I4d55adb09ba4d4dbd43d47a4bc54077d4bc531d2


[ROCm/ROCR-Runtime commit: e0ce8855dd]
 2017-01-11 17:31:37 -05:00
Sean Keely b75a8d9ed0 Allow reducing max occupancy (max scratch waves) when applications request large amounts of scratch. 
Also emit error messages to stderr if no async queue error callback was registered and queue fault messages are enabled (on by default).
Queue fault messages are controlled with env key HSA_ENABLE_QUEUE_FAULT_MESSAGE.

Change-Id: I496487b8d048b83aa95b9784e92928211f167b17


[ROCm/ROCR-Runtime commit: 0e17cc2887]
 2016-12-20 16:52:59 -06:00
James Edwards e0576546f9 Readme and comment updates to ROCm 1.4 
Change-Id: I2864a9c475b9ceb2fa08bfc35999c7e0e043b26d


[ROCm/ROCR-Runtime commit: 433a3bcde8]
 2016-12-16 11:43:36 -06:00
Chris Freehill 1df3375ec4 HSA Enabled IPC support 
Uncommented HSA IPC code.
Changed hsa_amd_ipc_memory_t to be 8 uint32_t's instead of 9 to
match spec

Change-Id: Id1523125e9b876a23c3743df1be29c98b47f6725


[ROCm/ROCR-Runtime commit: 160f8c5880]
 2016-12-15 19:16:29 -05:00
Konstantin Zhuravlyov 578c17681b Revert "Bring loader in sync with stg/sc" 
This reverts commit cdcc5ec921.

Change-Id: If99e8cc9e2afb525f690e49eb6538d8e950a5615


[ROCm/ROCR-Runtime commit: 08aded148a]
 2016-12-14 15:14:36 -05:00
Konstantin Zhuravlyov cdcc5ec921 Bring loader in sync with stg/sc 
Change-Id: I684522c442de0872007a7e4da8919067fc7b42b3


[ROCm/ROCR-Runtime commit: c798c60343]
 2016-12-13 16:30:25 -05:00
James Edwards 046929d5ac Make copyright and README changes for ROCm 
Change-Id: Ic9717fcbc57d4552dddf8374b34fc7c34e44268a


[ROCm/ROCR-Runtime commit: 25ed746314]
 2016-12-06 16:11:00 -06:00
Ramesh Errabolu a4c8e0fdca Per review comments 
Change-Id: I44585a6dcf3c4f0ce10f0e895270c113790e0652


[ROCm/ROCR-Runtime commit: 935c1b0ba9]
 2016-11-28 12:41:32 -06:00
Ramesh Errabolu e3d8eac639 Initial set of changes for ThreadTrace 
Change-Id: I07ce31f9b4f508cef0fc9ca6dadcf26b6c90361e


[ROCm/ROCR-Runtime commit: eb2efb83d1]
 2016-11-21 23:40:56 -06:00
Konstantin Zhuravlyov 05a7b5a9e4 Remove load_legacy parameter + change prefix for some loaded code object queries back to AMD 
Change-Id: I74e905abd77dab3a7a00b5ced94cd9b5130365c5


[ROCm/ROCR-Runtime commit: 4b86843409]
 2016-11-20 13:46:17 -05:00
Sean Keely 2e8c176e11 Add InterProcess memory sharing support. 
Support is disabled pending KFD / Thunk readiness.

Change-Id: I55def748e3d56cbfcfa6e24983a0ab78567aa81d


[ROCm/ROCR-Runtime commit: 8081758a55]
 2016-11-15 18:58:29 -06:00
Sean Keely c9e78a451b Add pointer info support. 
Change-Id: I3edcc0bfddbf12465065c9bc3b6565288faff1b8


[ROCm/ROCR-Runtime commit: 9dd76dbeda]
 2016-11-11 18:40:16 -06:00
Sean Keely b5d60f56dd Restrict stack usage in interop map to a more reasonable level. 
Change-Id: I663f262a391d1e7f8a6fc3028ea9acbe37d8bcf0


[ROCm/ROCR-Runtime commit: e01c43578c]
 2016-11-10 16:55:55 -06:00
Konstantin Zhuravlyov ee3b926381 Allocate only one segment for code object v2+ 
Change-Id: I7cd03b5c205d3ea5735f8f29820867ca90ac081b


[ROCm/ROCR-Runtime commit: 54245e064c]
 2016-11-03 09:51:11 -04:00
Chris Freehill 522cffc4b6 Added support for agent attribute HSA_AMD_AGENT_INFO_MAX_WAVES_PER_CU 
Change-Id: I2b90e7165384c4dce928a620a1782395267b35b0


[ROCm/ROCR-Runtime commit: 30f1ec2691]
 2016-10-28 11:24:21 -04:00
Jay Cornwall c6bfeda697 Fix miscellaneous warnings flagged by Clang 
Change-Id: I85a45cb3b44e4379b31bcc56af061fd1571f2af5


[ROCm/ROCR-Runtime commit: c30c25bd30]
 2016-10-26 19:26:16 -05:00
Jay Cornwall 1b76d435b4 Insert explicit memory fence before submitting doorbell 
Ensure that the write index and ring buffer contents are visible
to the HW before sending the doorbell. The latter is a write-combined
MMIO store and must be ordered with prior cacehable non-MMIO stores.

Also be more explicit about memory semantics for doorbell stores.

Change-Id: Ie4d96a7ee2a507237a8dbe7705fdf234d62ce9ba


[ROCm/ROCR-Runtime commit: d5b4078072]
 2016-10-17 10:01:47 -04:00
Jay Cornwall 5467ef0a59 Fix AQL packet lookup in dynamic scratch event handler 
Read index was not wrapped correctly.

Change-Id: I25c901b61e4760990871e22468ffd0391abef244


[ROCm/ROCR-Runtime commit: c83846cd45]
 2016-10-17 10:01:14 -04:00
James Edwards d93ce4adc3 Fix hsa-runtime-tools library dependencies. 
Change-Id: I649ebde06ab5c4b1892968c22e44c2bd5f53e49b


[ROCm/ROCR-Runtime commit: d66af9718e]
 2016-10-15 14:35:44 -05:00
James Edwards 171802e188 Fix library namespace to ROCR_1. 
Change-Id: Ie341203bad8e17673be86529bfed3c4fa98e9343


[ROCm/ROCR-Runtime commit: 4b6feb8498]
 2016-10-13 16:26:46 -05:00
Konstantin Zhuravlyov 65e3c8c179 Initialize symbol's agent member for agent allocation symbols 
Change-Id: I0ee0e07e4132ca13b3ecf7469c59ca327ff3c76d


[ROCm/ROCR-Runtime commit: 6f216f30c2]
 2016-10-13 12:43:19 -04:00
James Edwards b86f6d176e Modify image libraries CMakeLists.txt file to use HSAKMT variables. 
Change-Id: I19f1c4a312b108774f2e3e9c6697db07e6731556


[ROCm/ROCR-Runtime commit: 070be8823f]
 2016-09-30 23:05:38 -05:00
James Edwards 0a7bf6fe14 Update required cmake version to 3.5.1 to support rpm packages. 
Change-Id: Ic8d0d96b131937407de2578a653025a44843d330


[ROCm/ROCR-Runtime commit: cfc949c1ee]
 2016-09-30 16:04:02 -05:00