Граф коммитов

123 Коммитов

Автор SHA1 Сообщение Дата
Harish Kasiviswanathan ac547f8cb2 Add reverse direct io_links
The Kernel only creates one way direct link -
	GPU(PCI_BUS) --> [Parent NUMA Node]

Create the reverse direct io_link here -
	[Parent NUMA Node] -->  GPU(PCI_BUS)

Change-Id: I829a1b1b7f34bda42871ede3472d60915e88418c


[ROCm/ROCR-Runtime commit: 1d1c30db7c]
2016-03-04 15:54:03 -05:00
Harish Kasiviswanathan 5fc05ab059 Add free_nodes() helper function
Change-Id: I18ae0ac91b05275d7ad9d93175bae06870080844


[ROCm/ROCR-Runtime commit: a80d2f2303]
2016-03-03 18:33:59 -05:00
Ben Goz 8baf22651d Align hsaKmtMapMemoryToGPUNodes according thunk spec
Change-Id: I507ba5c6029ca5e7088c25930d46f5221679ace4
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: e2fb4bc312]
2016-03-02 16:12:03 +02:00
shaoyunl 8067849931 Export libKmtSetTrapHandler symbol as global
Change-Id: I065dbecd05e992bc528128d893edaf636c1beff7


[ROCm/ROCR-Runtime commit: fea5ab9114]
2016-03-01 10:30:02 -05:00
Harish Kasiviswanathan 268045084d Fix io_links sysfs directory name typo
Change-Id: I4f6fb43c4a038b94c0f94f66ee383e83ad0ffa62


[ROCm/ROCR-Runtime commit: bf03058112]
2016-02-29 11:15:29 -05:00
Jay Cornwall 537f217f11 Fix race in dGPU event page setup
events_page is unprotected from multiple allocation. The first event
creation ioctl is unprotected from a race with args.event_page_offset
being set (for page setup) and null (all subsequent invocations).

Change-Id: I40ba712a17e9eff257785f90c553a74ad09c661d
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com>


[ROCm/ROCR-Runtime commit: 3a662ac712]
2016-02-28 07:14:23 -05:00
Felix Kuehling d56931260a Fix address space leak in __fmm_release
Use the object size when freeing address space, instead of the
parameter passed in by the caller. The parameter may be incorrect
due to app or runtime bugs, or when the buffers is an AQL ring
buffer with double mapping workaround.


Change-Id: I00bb31d4520ef969a49d6d5ea723e8a33418acc3


[ROCm/ROCR-Runtime commit: 006f3ee41b]
2016-02-26 09:19:21 -05:00
Felix Kuehling 8ae4e547bc Use aligned size for looking up userptr object after allocation
The alignment performed in vm_find_object_by_address isn't sufficient
because it doesn't take into account the offset from the start of the
page.

This fixes a bug where certain unaligned userpointers and sizes fail
to register correctly.

Change-Id: I17872e264467a619f5e1bedb7e1ed3d994a856bf


[ROCm/ROCR-Runtime commit: 8a0161d6bb]
2016-02-25 19:47:05 -05:00
Ben Goz 18953cfa9a Mapping public VRAM BO to cpu
Change-Id: I2ff62ff0784f8ce556ad80739a177b90d866f1b4
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 3f02a3cf0b]
2016-02-24 17:30:15 +02:00
Felix Kuehling 6d856ebbff Fix memory leaks due to stale CPU mappings
Use the aligned size of the buffer objects for CPU unmapping in
__fmm_release instead of relying on the unaligned size passed in by
the caller.

Change-Id: If986ec24e9a05d32981549fddbf143221fc40bac


[ROCm/ROCR-Runtime commit: 7a383f9d88]
2016-02-16 18:12:05 -05:00
Felix Kuehling 99325bf7c4 Add support for register/deregister memory for dGPU
Allocate SVM address space for the registered memory and use new
userptr support in KFD to create a system memory BO associated with
the given user pointer. Map this BO at the SVM address for CPU
access.

MapMemoryToGPU can be used with the registered user pointer and
will return the SVM address as alternate GPUVA.

Change-Id: I4886e193c51fb6870a567878870c36bf8b5c3748


[ROCm/ROCR-Runtime commit: 85f9efb1a0]
2016-02-16 18:12:05 -05:00
Ben Goz 89905c0cd7 Align gpu-id-array size to multiple of sizeof(uint32_t)
Change-Id: I9f46b6a331a8d928ef570b420fb60b99b2edfdd1
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 00386734b1]
2016-02-16 11:27:06 -05:00
Harish Kasiviswanathan e8327090b9 gfx803: Add performance counter information
Change-Id: Id81b43e90029306f03c84752cef06dc336e3a4a9


[ROCm/ROCR-Runtime commit: 04b92b8e05]
2016-02-12 16:39:39 -05:00
Harish Kasiviswanathan f4f0ffc8cb Adding missing performance counters for gfx801
Few more counters are now available in GFX8 register specs. So adding
them. Also for gfx700 and gfx801 report correct number of SQ perf counter slots

Change-Id: I9e6b4b10238230aabeccbfaa5e491a28b5e54f2d


[ROCm/ROCR-Runtime commit: 1a0f915957]
2016-02-12 16:37:21 -05:00
Ben Goz 0dc374e1a4 Fix double free issue and pointer alignment
Change-Id: Id5bab454d53d404883a92282168b3f6cbc468cbb
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: b37f99a01e]
2016-02-12 11:21:32 -05:00
Felix Kuehling 03720306b9 Make hsaKmtAllocMemory more compliant with the Thunk spec
Allocations from GPU nodes will return VRAM, not system memory.
Only non-paged allocation from GPU nodes is supported. System
memory can only be allocated from CPU nodes (usually node 0).

The HostAccess flag is no longer used to distinguish the memory
type. It only indicates, whether the memory is mapped for CPU
access.

Maintain compatibility with broken KfdTests by returning system
memory for paged-memory requested from GPU nodes.

Change-Id: I514defede735f55e6de436f41944125b6f2c4ccf


[ROCm/ROCR-Runtime commit: 887b32fe86]
2016-02-10 10:29:54 -05:00
Yair Shachar 8359dc3119 Disable scratch Host allocation - via debug registration flags.
Change-Id: Ia6e5f86ec3979c4a49800f7af4509442a4e5be27
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com>


[ROCm/ROCR-Runtime commit: a815a4337f]
2016-02-10 07:52:32 -05:00
Ben Goz 18aab410cc Adding support to hsaKmtMapMemoryToGPUNodes
Change-Id: Iab6222402a43c3cd31b0efc5a316a6482986258e
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 7070f7ec5e]
2016-02-09 17:34:29 +02:00
shaoyunl 60bbf00fb1 libhsaKmt: Add CWSR support on dGPU
This is thunk part of the  CWSR support.
1. SDMA queue don't support CWSR , no necessary to allocate the context save/restore memory
2. Allocate the context save/restore memory in local frame buffer for dGPU

Change-Id: Ie83506f0cced2a5a537c49d68125796d831c2764


[ROCm/ROCR-Runtime commit: 4e6c25e55b]
2016-02-04 15:00:58 -05:00
shaoyunl 4c5a3ca774 libhsakmt: Use GPU ID instead of Node ID in set_process_dgpu_aperture
Change-Id: I0e66ca4a018c15c009a3516d250f0044a4407878


[ROCm/ROCR-Runtime commit: 7e40877e81]
2016-02-04 10:32:23 -05:00
Felix Kuehling 61039bcd36 Remove gfx802 page size workaround on gfx803
All tonga page size alignment is done in the memory management
functions in fmm.c. All other code only specifies the minimum
alignment it needs and lets fmm.c handle the HW-specific
alignment.

Clean up aligned-exec memory allocation in queue.c to remove
hard-coded TONGA_PAGE_SIZE alignments and remove code duplication.
Make sure alignments are consistent between allocate and free.

Change-Id: Ia8923448173d1cef315af24cebff12adef385cb0


[ROCm/ROCR-Runtime commit: cc9fc386bd]
2016-01-28 16:05:18 -05:00
David Ogbeide 8fce9f7026 libhsakmt: Add marketing names for GPU nodes
HSA thunk API returns null when querying for GPU node marketing
names due to empty system topology file.

- Add marketing names to device GFX IP data structs.
- Modify name retrieval to pull from data structs instead of file.



Signed-off by: David Ogbeide <davidboyowa.ogbeide@amd.com>

Change-Id: I30ea04111be7e0df2e93894f801fbeb414ffa790


[ROCm/ROCR-Runtime commit: 4e4a881940]
2016-01-25 11:03:54 -05:00
Felix Kuehling db5b6fd35a Link libhsakmt with -z nodelete
This prevents the library from being unloaded at runtime, even when
dlclose is called. This preserves global variables, such as state
about the SVM address space and avoids catastrophic leaks on dlclose.

Change-Id: I34f1d19a450835200e9d4815458e8d1b3045053c


[ROCm/ROCR-Runtime commit: cc7491ec71]
2016-01-22 18:08:19 -05:00
Amber Lin 07500db1df Revert "Free resources when dlclose is called"
This reverts commit 4dd9dbb128.

Conflicts:
	src/fmm.c
	src/perfctr.c

Change-Id: Ib6113c2dd3962c72100c7f74cdef6897e1df40b3


[ROCm/ROCR-Runtime commit: 7416805a44]
2016-01-22 17:58:33 -05:00
Harish Kasiviswanathan b687eaf2c2 Don't limit number of supported HSA Nodes
Remove #define MAX_NODES 8

Change-Id: I756cadc652543dd17ea48a1c956adc08c3d2631a


[ROCm/ROCR-Runtime commit: 5e53205b9e]
2016-01-15 17:27:43 -05:00
Harish Kasiviswanathan 14358ee07f Don't limit number of supported GPUs
Stop using NUM_OF_SUPPORTED_GPUS. For now the definitions itself cannot
be removed as ioctl code is in upstream Kernel.

Change-Id: If846625a8ad5062d5483e762850c793d3c00b9d0


[ROCm/ROCR-Runtime commit: ce83dc623f]
2016-01-15 11:44:42 -05:00
Harish Kasiviswanathan add443f1ef Use new ioctl for getting process apertures
Change-Id: I73678744ad73942edec442ad9c6d38637f7e1235


[ROCm/ROCR-Runtime commit: e7e1361c3d]
2016-01-12 12:09:25 -05:00
Felix Kuehling c89d3124d9 Implement hsaKmtRegisterMemoryToNodes
Fix hsaKmtRegisterMemory to be a no-op for now and move the multi-GPU
implementation to hsaKmtRegisterMemoryToNodes. Make GPU memory mappings
of host memory visible to all GPUs by default. Device memory is still
visible to the allocating GPU only by default (but can be overridden
with hsaKmtRegisterMemoryToNodes for experimenting with P2P).

Change-Id: I73408afbe3b10c8dad2ab3a780f58413249692e6


[ROCm/ROCR-Runtime commit: 063ad3ad9e]
2016-01-08 16:00:23 -05:00
Ben Goz 2fa7eef572 Adding support for mGPU
Change-Id: I5ed184e6a58b38d9dde48867f14513d161cf41a9
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: ea0f9d2a0b]
2016-01-04 15:35:15 +02:00
Ben Goz d874bcd8b3 Fix AQL Double buffer allocation mode
Change-Id: I5162ffd89416d317fd0ca0fc51da523298488922
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 53b208adf2]
2016-01-04 15:34:53 +02:00
Yair Shachar 63f646d050 Add support for scratch GPUVM on host memory
This is required when we have a debug session



Change-Id: If9d6d2d23a9016b6ca9562e02a91fc16e0354ee4
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com>


[ROCm/ROCR-Runtime commit: 681f4dcecc]
2015-12-20 15:50:50 +02:00
Harish Kasiviswanathan 8bf76bdf67 Fix node_id in gpu_mem[] array
Change-Id: I4897623612e1749e275fb97ce1603dc5130fc9ce


[ROCm/ROCR-Runtime commit: 39bf9c6611]
2015-12-14 16:25:18 -05:00
Amber Lin 4dd9dbb128 Free resources when dlclose is called
When the Thunk is initialized multiple times in the lifetime of a single process
, some global resources are leaked. This can happen when dlopen and dlclose are
 used to load the library at runtime, rather than linking the runtime against
the Thunk. This patch adds the destructor to release global resources when
dlclose is called.


Change-Id: Ia00da0d41f095d0b2706f98c0e75effedd596f49


[ROCm/ROCR-Runtime commit: 582b70f9c3]
2015-12-11 16:32:41 -05:00
Yair Shachar f01386b61c Add support for per device debug register state tracking
Change-Id: I8d51670f5de8d379ead898d484f668a8034f9878
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com>


[ROCm/ROCR-Runtime commit: 8f529e3c72]
2015-12-07 21:11:21 +02:00
Harish Kasiviswanathan 419117eff9 Remove unused parameter gpu_id from few functions
This will also fix out of bound access in functions
fmm_get_aperture_base_and_limit and fmm_release



Change-Id: Icf064c46647e69a069126171dbacdf3d5b27f972
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: a4cf02d797]
2015-11-30 11:51:44 -05:00
Harish Kasiviswanathan f34b407728 Use same VM range for all dGPUs
dgpu_aperture and dgpu_alt_aperture will be shared by all dGPUs.



Change-Id: I814495e43b51acabdc6266cfa8d83db5a062e20d
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 2903a610e1]
2015-11-26 15:07:29 -05:00
Harish Kasiviswanathan 87ddd7732e Fix dgpu_vm_limit
Break from the for-loop once dgpu VM range is found, otherwise the
length is reduced by half

Change-Id: Ie602054c16ea69ea1cbb75e804ead551bc3615c0
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 5a55383baf]
2015-11-23 11:51:39 -05:00
Amber Lin 4c84c85252 Fix sibling map in CPU cache properties
Previous code only works for systems where shared_cpu_map lists 32 or less
bits. Some systems list more than 32 bits and express them as
XXXXXXXX,XXXXXXXX,.... This patch adds that calculation. Also increase
MAX_CPU_CORES and MAX_CACHES to accommodate more advanced systems.

Change-Id: Ia5c7041866456a6aa3b66f8f0f951022d7c51028


[ROCm/ROCR-Runtime commit: a5bc8360e8]
2015-11-12 08:31:51 -05:00
Felix Kuehling 1ab2c3341a Reserve address space with PROT_NONE
Access to reserved address space that has not been allocated should
result in a segfault. Use PROT_NONE to ensure that.


Change-Id: Ic5da9392fabbe78c9ec14f98e8b7b47e5267a98a


[ROCm/ROCR-Runtime commit: 62337b6c0a]
2015-11-10 18:19:56 -05:00
Amber Lin 403eb13050 Add CPU cache information
Fill up cache properties of CPU node by reading data from /proc/cpuinfo
and /sys/devices/system/cpu/cpuX/cache/indexY



Change-Id: I0a96760575e504e38962554f192c3fe66bea3c15


[ROCm/ROCR-Runtime commit: b6f65f9849]
2015-11-09 07:16:24 -05:00
Kent Russell 67d98aa280 Add option to create release build for Thunk
By adding REL=1 to the make command line (e.g. make REL=1 deb), we can
create a release build of the Thunk. This will not affect existing
functionality, and will only have an effect if REL=1 is specified on the
command line, or in the build_thunk.sh script.

Change-Id: Iedc3b6094e70a4ebd726499eda56013cc254b83d


[ROCm/ROCR-Runtime commit: cb3a664065]
2015-10-30 14:05:40 -04:00
Felix Kuehling b900df9215 Use correct aperture for _fmm_unmap_from_gpu_scratch
Passing in the wrong aperture resulted in failure to unmap scratch.


Change-Id: Icd7423abfb1bcc773b33becffcbefc233f4ff340


[ROCm/ROCR-Runtime commit: bd93eecc64]
2015-10-29 18:26:15 -04:00
Philip Cox 782cea350c Add SDMA IOCTL type to Create Queue function.
Change-Id: I7e31507b761ca388b2cac93f994f6106de962f17


[ROCm/ROCR-Runtime commit: 0c234c7ef3]
2015-10-29 10:25:41 -04:00
Kent Russell f4889d439d libhsakmt - Add make option to package thunk as RPM
Add an option to libhsakmt to allow the thunk to be packaged as an RPM.
The default will remain being built as-is, but this can now be packaged
as an RPM by using "make src rpm" . build_thunk.sh will be modified to
reflect this new option.

Change-Id: I38e03d10cfb5035bdf0a87635a784c47a709a5b6


[ROCm/ROCR-Runtime commit: 6ceed7def3]
2015-10-29 07:49:13 -04:00
Harish Kasiviswanathan 595f51899f Remove erroneous and redundant memory banks reported
hsaKmtGetNodeMemoryProperties -
	- Return only HSA_HEAPTYPE_SYSTEM memory for CPU only node.
	- For dGPU remove redundant HSA_HEAPTYPE_FRAME_BUFFER_PRIVATE
	  entry.

Change-Id: I0349be39b8409a0fd64a038b8b2956191356d937


[ROCm/ROCR-Runtime commit: f885e551aa]
2015-10-23 18:43:46 -04:00
Harish Kasiviswanathan 71dc59b245 Correct parameter name for topology_is_dgpu()
The function expects device_id and not gpu_id.

Change-Id: I79794fd4e58e6e6adb26659da30f3e4d8e108434


[ROCm/ROCR-Runtime commit: 69662da3dc]
2015-10-23 18:43:45 -04:00
Harish Kasiviswanathan d7589c62e1 Unify fmm_get_aperture_xxx functions
Unify fmm_get_aperture_base and fmm_get_aperture_limit into one
function. Make the return value to HSAKMT_STATUS.

Change-Id: I0b3f563ffb268947ab891f4935f61788d0af0e01


[ROCm/ROCR-Runtime commit: cb53548c89]
2015-10-23 18:43:34 -04:00
Felix Kuehling 29561cc13e Implement flat scratch support for dGPU
hsaKmtAllocMemory only allocates aligned address space and sets up
the scratch_physical aperture to match the allocated address space.

Actual allocation of backing memory happens in hsaKmtMapMemoryToGPU.

Change-Id: Ie709815ab9bedb3d682e096b4005fdfb5e94d3a7


[ROCm/ROCR-Runtime commit: 5131ab4e64]
2015-10-22 20:40:22 -04:00
Felix Kuehling 17a31f1cce Allow address space allocations with specific alignment
Change-Id: I4bf7f7ac53c3921dd330b9dc7a40582611f88b69


[ROCm/ROCR-Runtime commit: 149261ba09]
2015-10-22 20:27:49 -04:00
Ben Goz 4ec82c7edd Casting local memory size to uint64_t
Change-Id: I5c2010056b84ac01bb65361210d2a693e437050a
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 55b1a5dc43]
2015-10-22 09:05:34 -04:00