커밋 그래프

83 커밋

작성자 SHA1 메시지 날짜
Saleel Kudchadker ec59b1bc3e SWDEV-443760 - Enable device kern args
- Implement workaround to ensure HDP writes are done by writing and
reading the HDP MMIO register.
- Implement the same workaround for graphs, we no longer need sentinel
write/readback

Change-Id: I0d3027b46a1f61131ec62e3c8c669ff5184fa6b2


[ROCm/clr commit: f138e0d113]
2024-02-20 02:03:14 -05:00
Anusha GodavarthySurya 5c0490f53b SWDEV-422207 - Enable DEBUG_CLR_GRAPH_PACKET_CAPTURE environiment variable
Change-Id: I9bf72b9c1a56980352109bd4d42b54ecb2d1b8f9


[ROCm/clr commit: ae0368d12d]
2024-02-05 05:08:11 +00:00
Anusha GodavarthySurya 49e684361f SWDEV-422207 - Added debug env to dump graph during Instantiation
Change-Id: Ibde2ae5b8d240f3986bcd168facc513a319c0f17


[ROCm/clr commit: 0a055f874b]
2024-02-05 05:08:11 +00:00
German 4750a76899 SWDEV-404889 - Enable debugger interface in PAL
Add GPU_DEBUG_ENABLE to control ttpm behavior. If enabled,
then HW will collect more debug info at some perf cost

Change-Id: Icee0686b903a7b1bd483710b9d611877cd43c6aa


[ROCm/clr commit: 7d661bc7df]
2024-01-02 11:51:42 -05:00
kjayapra-amd 30d6b89d6f SWDEV-413997 - Enable Virtual Mem support by default.
Change-Id: Ia3db3919701708cf95574692e1d47375ca99d7fd


[ROCm/clr commit: e05923b139]
2023-12-20 12:49:16 -05:00
German Andryeyev e390ec044f SWDEV-432174 - Change the fillBuffer kernel
- Add the new fillBuffer kernel, which allows to launch a limited
number of workgroups for memory fill operation
- Switch fill memory to 16 bytes write by default
- Allow to limit the workgroups with DEBUG_CLR_LIMIT_BLIT_WG

Change-Id: Ibad1822f2d42b2fc71bcfc1917c31409c0623e8e


[ROCm/clr commit: f1dc81f427]
2023-11-16 14:25:55 -04:00
Ioannis Assiouras 2da4764fc2 SWDEV-428244 - Set PARAMETERS_MIN_ALIGNMENT to the native alignment
Change-Id: I14d8a0db4e575d6fa816754c52df405de88d9200


[ROCm/clr commit: 7868876db7]
2023-10-21 17:26:46 -04:00
kjayapra-amd 6d8458ba5a SWDEV-413997 - Initial VMM changes for ROCm path.
Change-Id: I4405fd7b53182eb4c4622835c811c0dc08461537


[ROCm/clr commit: 3ef829939a]
2023-10-16 11:29:16 -04:00
jiabaxie f25e5e01f3 SWDEV-405983 - adding in HIP_LAUNCH_BLOCKING
Change-Id: I3f9c8a745099aab05155ebe910e727693961a02f


[ROCm/clr commit: 28f0daa34f]
2023-10-10 21:11:13 -04:00
Anusha GodavarthySurya 0404df28ef SWDEV-422207 - Capture AQL Packets for graph Kernel nodes during graph Inst. And enqueue AQL packet during launch
Change-Id: I1e5f7f9e2a70bd500d190193cb6ba0867f5a63e7


[ROCm/clr commit: e63c280d4d]
2023-10-05 00:34:29 -04:00
German 5d9912f48b SWDEV-407533 - [ABI Break]Remove Wavelimiter
Change-Id: I6a2f6fb5a0c3acea93fa0200a69679783e76f5bd


[ROCm/clr commit: 7be3a5e33e]
2023-09-07 09:58:41 -04:00
kjayapra-amd 76cc68ff80 SWDEV-381625 - Parse compiler and linker options from environment variable.
Change-Id: Id5a012b678e5973c4b64dff84444a909aefae006


[ROCm/clr commit: 6a0f80a03d]
2023-08-29 20:24:27 -04:00
German 3f4bbcfdba SWDEV-407533 - [ABI Break]Purge unused env vars
Change-Id: I627950e8ebb6299affc602754a20d442dbe42b14


[ROCm/clr commit: 077311153a]
2023-08-24 14:11:40 -04:00
Saleel Kudchadker 520b17fb07 SWDEV-384557 - Enable SDMA query
Change-Id: Ibb0a8d131f799985a4d4adbf753261e58c04157f


[ROCm/clr commit: aa6eb555e2]
2023-08-01 18:41:23 -04:00
Todd tiantuo Li cd9fa7af05 SWDEV-333557 - add PAL_HIP_IPC_FLAG for PAL HIP device allocations
Change-Id: I9017f4e3b03d4817bf233c788e30775fb2297589


[ROCm/clr commit: 04b9ab49eb]
2023-07-17 08:10:25 -04:00
Anusha GodavarthySurya 57467ef2c7 SWDEV-392732 - Initial commit for graph doorbell optimization(AQL Buffering)
Change-Id: I451725006c54c249dc530c55d2af2a31594bf49b


[ROCm/clr commit: b0e6f99ad7]
2023-07-16 07:56:00 -04:00
Saleel Kudchadker 47894de700 SWDEV-384557 - Rename env var
- Rename HIP_USE_SDMA_QUERY to DEBUG_CLR_USE_SDMA_QUERY as this is
supposed to be a temporary env var for debug purposes only.

Change-Id: If6ebd52ab87624375a3df24ceccdcc05c60a65af


[ROCm/clr commit: 770b2a4711]
2023-06-29 13:54:55 -04:00
Ioannis Assiouras 320d7c1d9a SWDEV-405182 - Revert min alignment for abstract parameters stack to 16 bytes
Change-Id: I9e6ace281468e8ef11b011c58f5971ce8907f3c6


[ROCm/clr commit: 4add0e6563]
2023-06-23 04:39:51 -04:00
Saleel Kudchadker 87652b6c93 SWDEV-384557 - Use toggle for SDMA query
- Use HIP_USE_SDMA_QUERY env var toggle for new API use. Env var is 0 by
default

Change-Id: If725a0c41e15f78a1a6c3f47942954fe9240b4db


[ROCm/clr commit: 8d193c32bb]
2023-06-15 01:02:24 -04:00
Jacob Lambert 7ee73c61b0 SWDEV-375055 - Re-enable Comgr unbundler
With recent upstream changes (D145770), we can now use the
Comgr unbundler without requiring an env field in the supplied
targetID. For users, this is consistent with previous legacy
unbundler behavior.

Change-Id: I5f085b0fa1ad352bbbb282b75367c206b75f279f


[ROCm/clr commit: 443f912c7f]
2023-05-31 16:14:08 -04:00
Saleel Kudchadker a5715294fb SWDEV-301667 - Add a flag for gpuvm kernargs
HIP_FORCE_DEV_KERNARG=1 will create a device allocation for kernel arg
segment. Flag is 0 by default.

Change-Id: Iaaf5a149f3be8596568878d5d272268baf067c60


[ROCm/clr commit: 5436d362b1]
2023-05-22 11:23:48 -04:00
Alex Voicu e266f8834b SWDEV-301667 - Kernelarg gpuvm
Add aligned, nontemporal `memcpy` for kernarg.

Change-Id: I5d8ac76904feaf793b45ec2ea5fbd1069be20068


[ROCm/clr commit: 06df9e2efd]
2023-05-22 11:21:14 -04:00
German 8d97827417 SWDEV-353281 - VM support in mempool for graphs
The change enables VM support in graphs on Windows. That allows
to avoid caching of all allocations at the cost of map/unmap
overhead during memory create/destroy.

Change-Id: I792be00fba099e5e5d3cd44a963e1dfd6976a86d


[ROCm/clr commit: 04b696abee]
2023-05-05 15:31:26 -04:00
Maneesh Gupta d7fdd9fcb8 SWDEV-368235 - Revert "Remove obsolete env variables"
This reverts commit dfa7790030.

Reason for revert: Deferred to a future release.

Change-Id: Ia66c37f0ab9734dee73c930d10d7469d5fd57254


[ROCm/clr commit: 5dc104b3ea]
2023-02-15 07:25:00 +00:00
German dfa7790030 SWDEV-368235 - Remove obsolete env variables
Change-Id: I7e14d53297e79e2f68b3a6cc40251ad7db9eb5ab


[ROCm/clr commit: 7b50c935f8]
2023-02-03 13:44:24 -05:00
Anusha GodavarthySurya 379781ea65 SWDEV-364576 - initialize device malloc heap state using blit kernel
Change-Id: I5d0172aff7d2c04b322a4d828b8a2b438158b80f


[ROCm/clr commit: 274f2de391]
2023-01-07 06:53:53 +00:00
kjayapra-amd 8b6dc59393 SWDEV-241902 - Disable COMGR unbundler and use legacy Runtime unbundler.
Change-Id: I04128a40f67f3e5ce0db935a0a733b7044d75c34


[ROCm/clr commit: 79f0b8b794]
2023-01-03 09:31:11 -08:00
kjayapra-amd e47e613948 SWDEV-363865 - Use COMGR path to unbundle code object in HIPRTC.
Change-Id: Ie6a48ab2792bb3f7ae1e62d716ecc35b8e24fe16


[ROCm/clr commit: 7319dc36c1]
2022-12-08 08:34:33 -05:00
German e7d9a3f450 SWDEV-368308 - Remove HW debug extension
Change-Id: If0c68023c09f0dac9111d52ecc0ad63719aa4e70


[ROCm/clr commit: e5a36ab1ad]
2022-11-18 10:29:44 -05:00
German 4b6a6ba8e8 SWDEV-363074 - Adjust staging copy limits in Windows
Pinned copy can cause big performance drops, because slow pinning under Windows.
Use up to 128MB for staging transfers. Change staging buffer size to 4MB.
Linux path should still have the old defaults.

Change-Id: I954edceb3ec89e8e670be116aa2d0a9564c8b11c


[ROCm/clr commit: 79d12df147]
2022-11-17 14:48:16 -05:00
kjayapra-amd c5c1b7fd56 SWDEV-241902 - Using COMGR APIs for extracing code object.
Change-Id: I96f1cee9c28f89f0b0fa5af0c2ae7966beb3207d


[ROCm/clr commit: 0d9e1de4e3]
2022-11-17 11:09:59 -05:00
German bc14b745e8 SWDEV-365121 - Use CP DMA for tiny transfers
Sync between compute and SDMA engines can be very expensive under Windows.
Use CP DMA for tiny transfers (< 1KiB) to avoid syncs and improve performance.

Change-Id: I9db39a2199f7b9e337ed08fd36d9cbc150502f1f


[ROCm/clr commit: 473621c008]
2022-11-03 10:04:53 -04:00
Saleel Kudchadker 0dd9add8e1 SWDEV-352001 - Store last scopes for dispatch
- Store last fence scopes and use the last value to determine if we need a cache flush again. This helps cases where hipExtLaunchKernel API is
used.
- Purge code for ROC_EVENT_NO_FLUSH

Change-Id: I531cf9c9c60d5e2b3a9e265d0f52f79ed2fa8a8c


[ROCm/clr commit: 9b5cbd37a2]
2022-09-22 11:34:10 -04:00
Laurent Morichetti 353f9bc86c SWDEV-351980 - Enable profiling for commands reporting activities
Profiling should be enabled for any command reporting activities as the
activity record captures the profilingInfo's start and end timestamps.

Since IS_PROFILER_ON is only used to determine whether API tracing is
enabled, there is no need to expose it globally, it should be a property
of the activity_prof::CallbacksTable.

Change-Id: I44a0d19ed2862606cfbc9a98c1a07a336ab7e26c


[ROCm/clr commit: e713b5c7d0]
2022-09-21 05:53:59 -04:00
German 46409cc4e6 SWDEV-286150 - Switch PAL_DISABLE_SDMA to release build
Change-Id: Ibf800e1c767fd1e6bc9ebc4fc56b767b0a90bdef


[ROCm/clr commit: df77380cee]
2022-09-20 13:47:14 -04:00
kjayapra-amd 8e55352cf3 SWDEV-351338 - Increase AQL Queue depth and reduce ROC_ACTIVE_WAIT_TIME to 0.
Change-Id: Iec0005d57933d0df2f55b4f7bdb84ada8a386a0c


[ROCm/clr commit: 362e7961d9]
2022-09-14 10:49:53 -04:00
Jason Tang 5692511e22 SWDEV-333471 - Remove HIP_FORCE_QUEUE_PROFILING
HIP_FORCE_QUEUE_PROFILING has been replaced by GPU_FORCE_QUEUE_PROFILING.

Change-Id: Ic32ecdf829a2725ace84e76abab8a81c8790e13f


[ROCm/clr commit: dd49cf0fa0]
2022-08-29 10:21:09 -04:00
Jason Tang fb753e489d SWDEV-333471 - Add GPU_FORCE_QUEUE_PROFILING
To support both hip and ocl. HIP_FORCE_QUEUE_PROFILING will be replaced with this later on.

Change-Id: I6d3514b1568ff049584ed9fd74bbdb3e4f4bf0c3


[ROCm/clr commit: d92b3a2d90]
2022-08-19 10:51:41 -04:00
Saleel Kudchadker 5ba419ac66 SWDEV-301667 - Increase kern arg pool
Change-Id: Ie4b087ae4aec08fccaaa7958cdf545e4e27ac5c1


[ROCm/clr commit: 6a77f73050]
2022-07-12 18:42:29 -04:00
German Andryeyev 6a225063d4 SWDEV-335142 - Increase max dispatch limit for capture
Change-Id: I929808476a75f4c360cd9368b777e1a0109fdb82


[ROCm/clr commit: 8e5205bb3a]
2022-05-02 15:59:25 -04:00
German Andryeyev 4b4137ae63 SWDEV-332512 - Add ROC_SIGNAL_POOL_SIZE
Default value is 32 HSA signals in the pool.

Change-Id: Icb69413d3ff6ef228d9a9e22fd024e72c6d8ebe4


[ROCm/clr commit: 7975a07112]
2022-04-14 17:32:00 -04:00
Saleel Kudchadker 3d0100c5ab SWDEV-301667 - Add cache state for a device
- Add a global cache state for a device to indicate scopes of submitted
AQL packets
- Remove scopes for TS marker if hipEventReleaseToDevice is passed. Set
env ROC_EVENT_NO_FLUSH=1 to use NOP AQL for event records.
It would flush caches by default with system scope release.
- Calling finish() should ensure if caches are flushed, if not queue a
marker

Change-Id: Ibbbdbb1cd7ac61cb35649169212142545be159e0


[ROCm/clr commit: 8eeaa998c0]
2022-04-12 12:27:31 -04:00
Satyanvesh Dittakavi acfa45bd5c SWDEV-326397 - P2P copies to take SDMA path if there is no pending dispatch
Change-Id: I50cfb8d77f7882151a20a1de7aaf5219b1695b7d


[ROCm/clr commit: c1b95b09bf]
2022-03-29 14:59:11 +00:00
German Andryeyev 0d5a8a5b9d SWDEV-311271 - Add a key to control memory pool feature
Change-Id: Ibd929592b802e65d0e1a4fd9689050bce5059e98


[ROCm/clr commit: a02ae1b851]
2022-03-25 19:07:14 -04:00
German Andryeyev 3c4f97f66c SWDEV-286150 - Remove GSL backend
Change-Id: Iba9a997ee7d5ff6ac00d5888ff189a4514958fe9


[ROCm/clr commit: 525a1bbf1a]
2022-02-09 17:16:39 -05:00
German Andryeyev 5ad02b78c4 SWDEV-305016 - Improve MGPU scaling in Tensorflow
Add a threshold for ROCR/SDMA P2P transfers. ROCR copy path
requires extra barriers in compute for synchronization. That costs
extra performance with tiny transfers.
Reduce active wait time to 10us. Tensorflow uses extra thread
per GPU with constant hipEventQuery() calls. Longer active waits
in ROCr affect CPU performance.

Change-Id: I9020358438615fa2d4617f862f00a562f0a588e7


[ROCm/clr commit: 008133cf41]
2021-12-08 11:59:37 -05:00
German Andryeyev 7821cddb3e SWDEV-257789 - Initial change to skip kernel arg copy
The optimization is controlled with ROCR_SKIP_KERNEL_ARG_COPY.
This is initial check-in for experiments. Extra changes are
necessary for full support:
- handle graph capture with the original sysmem alloc
- avoid memobject references, otherwise there is a race condition with
reusage of the arg buffer
- Remove arg setup from hip

Change-Id: Ib0af710f93e79834711fa4049a7c66093711e68b


[ROCm/clr commit: 7e12cf6318]
2021-10-28 20:35:35 -04:00
German Andryeyev 51f7944fcb SWDEV-303567 - Increase the size of AQL queue
ROC_AQL_QUEUE_SIZE will control the size of AQL queue.
The current sefault value is 4096.

Change-Id: Icd2a4ee3ba554c06aa05b08defd922d2c63e43fd


[ROCm/clr commit: 7fe696b6ef]
2021-10-06 08:27:36 -04:00
Sourabh 936e0836a8 SWDEV-292525 - [vdi] Path to streamOps shaders
Implementation to use a blit kernel to perform
a hipStreamWait/write instead of an AQL packet.

Change-Id: I462671ed5cec37144dfe97ff66439249196117c1


[ROCm/clr commit: cbb8d82bdb]
2021-09-27 13:59:35 -04:00
Saleel Kudchadker 1bf9b39cf8 SWDEV-301667 - Kern arg placement
Add a env var ROC_USE_FGS_KERNARG to toggle kernel arg placement
By default its in Fine Grain Kernel arg segment for supported asics.

Change-Id: I3d57ed69a1a4db2b392b0438ead499f3ddca4716


[ROCm/clr commit: e29b9c00ee]
2021-09-02 12:36:49 -04:00