It is aligned with RAS changes in KFD.
Change-Id: I52816da01a4001158a40a1207d1fbe6ec3271343
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
[ROCm/ROCR-Runtime commit: d6cde5bf08]
While this may not be supported in the runtime, the kernel/firmware
support it
Change-Id: I7fe4536a6b3055f39e25f453060e899938645d91
Signed-off-by: Kent Russell <kent.russell@amd.com>
[ROCm/ROCR-Runtime commit: 1304a92e17]
This reverts commit a349805264.
Fixes for HMM change corner cases are merged in from drm-next.
Tests are passed on gfx900 with the latest amd-kfd-staging.
Change-Id: I6c00d1eacf6b3f1ce715e085ae622b4e9ff1b7ff
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 0bd9f35563]
While adding x2APIC support, apicid for non-x2apic was missing out by
mistake.
Change-Id: I25eed362c035c0e9fb9ea948899c49f70311f269
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
[ROCm/ROCR-Runtime commit: cfa47ac1f9]
Add SDMA engine info fields to node properties and
modify get node properties API to read SDMA engine
info from sysfs
Change-Id: Iea877b5bc008cc9df9405daf564a359535f1bc9f
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
[ROCm/ROCR-Runtime commit: 414a3508d6]
A new SDMA queue type for XGMI was added
Change-Id: Iad065c1a7c053a58e0d86becfb374215e316a611
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
[ROCm/ROCR-Runtime commit: e4109de26d]
Current processor/cache topology code implements xAPIC architecture, which
is 8 bits addressability. This is not enough for a system having more than
255 processors. x2APIC is the extension of xAPIC architecture to support
32 bit addressability of processors. This patch detects the x2APIC
enablement and uses the extension leaf to get apicid when detected.
Change-Id: I0826585d02f696a46cd5efb9a6630c60af01e2d8
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
[ROCm/ROCR-Runtime commit: f8028a40fd]
Due to the recent HMM changes, the KFDIPCTest can intermittently fail,
combined with CrossMemoryAttach consistently failing. Remove it for now
while Philip Yang investigates
Change-Id: Icf272100bb7882eff4202ad6f4ced63b569f4e7d
[ROCm/ROCR-Runtime commit: d00ec779ce]
Modify the system event handler to support multiple users.
Name memory fault reason codes.
Change-Id: I1b5979b36ab15637eb2be59a61e2d57e76d0a70e
[ROCm/ROCR-Runtime commit: 67376e06ab]
Per Philip Yang:
For forked child process, userptr allocated on heap (through malloc)
will have two vmas if child process malloc smaller size buf, free it,
this is on vma cloned from parent process. Then malloc larger size buf,
kernel will put some pages on previous freed space from vma cloned,
create new vma for the rest of pages. This is what IPCTest does.
Change-Id: I054771e20880f975d7cc774225f19aad5363843f
[ROCm/ROCR-Runtime commit: a0b8dd8462]
With the orginal code, CreateCpQueue will report failure if
WaitOnValue return false. Add EXPECT_TRUE() so that in that case
the failure is reported.
Change-Id: I043d013958b452d7ccb9538dc296d99d024abf01
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
[ROCm/ROCR-Runtime commit: 1d478f3cf2]
Part 1 of 2.
Enables fine grain vram over PCIe based on env flag.
Part 2 will extend to XGMI.
Change-Id: I8ad506e004b398d56d462b0200274eae2293a461
[ROCm/ROCR-Runtime commit: c56d86100b]
hsa_exceptions with empty what() strings will not report in debug builds.
Change-Id: I0d424d3b1d3044808ece1720a460a57d68bf878e
[ROCm/ROCR-Runtime commit: 344d964f9f]
They are disabled for now.
Change-Id: I9c936130cbaf8c773f4b8e94bccf4af1f45eda65
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
[ROCm/ROCR-Runtime commit: 7349276860]
We need to black list this testcase temporarily because
it is failing intermittently. The failure tends to only happen
when the certain build machine is used to build it.
This issue is being tracked by Jira ticket:
ROCMOPS-389
Change-Id: Ic4682c9da389ed731cbc034dff57e6646bba0e9d
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
[ROCm/ROCR-Runtime commit: 90a3697e1d]
A basic sanity test that tests the codepath for
the debugger suspend and resume code path.
Change-Id: If4c64f7bd6a1ef45068a33965b829725a78ce492
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
[ROCm/ROCR-Runtime commit: ac6f089f26]
Version is now a fixed string that matches previous internal builds.
This also matches released DEB/RPM builds (but not github versions).
Change-Id: Id4819b9de8c855250aadf1a1cebb187b5c031721
[ROCm/ROCR-Runtime commit: 400304aa10]
The previous name doorbell_offset is used too extensively throughout
the code and did not reflect the true usage.
Change-Id: I50d33f5c00e82c46cdf4264a78b8f925705bed6a
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
[ROCm/ROCR-Runtime commit: 776077fe65]
This will facilitate us to avoid using family ID to differentiate the
SDMA engines and SDMA queues.
Change-Id: I8d6203cc5d330e9130a1b2624997c86ba53e8ae4
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
[ROCm/ROCR-Runtime commit: 6857602cbc]
This variable is 0 by default. When set to 1, it means there is no frame
buffer, so all memory allocation is routed to system memory. This mode
is mainly used during emulation.
Use CoarseGrain for VRAM under ZFB mode
Change-Id: I29e8e98be56935e3ceb94782d70771cc45700749
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
[ROCm/ROCR-Runtime commit: 51ee5c324a]
Some test case alloc >4gb memory.
Use HSAuint64 in bytes and HSAuint32 in pages.
Change-Id: I0d5e6c299903b5898cfea024178a7a26b9ba3c90
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
[ROCm/ROCR-Runtime commit: 41bf449e99]
Both support dynamic scratch allocation so there is no reason
to preemptively allocate on APUs.
Change-Id: I22eaec01a83a091ee9dc1f594a1a9106e8dd81fc
[ROCm/ROCR-Runtime commit: 65d39cc476]
The design changed. Those are not needed any more
Change-Id: Ibb1230d1c34d6ac5153275f9334af45c73805f37
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
[ROCm/ROCR-Runtime commit: faba8950d4]
- Skip symbols that are STB_LOCAL and not STT_AMDGPU_HSA_KERNEL
Change-Id: I68567f58de9bf3f07dbd8020ef63f47667c86367
[ROCm/ROCR-Runtime commit: 8bee6e4976]
Decrease number of iterations and array sizes in some cases.
Change-Id: I1a0a43faa907b28662ff3a44c172950ed7b1500e
[ROCm/ROCR-Runtime commit: 6bca866e6c]
KFDPerformanceTest.P2PBandWidthTest[push, push] takes about 3 seconds
on 4 gfx906, the default g_TestTimeout 2 seconds is not enough to wait
for sDMA queue rptr is consumed. Use kfdtest command line option
--timeout=6000, the test is finished and result is reasonable twice as
P2PBandWidthTest[push, none]. Change P2PBandWidthTest wait timeout to 6
seconds.
Add timeout argument to function WaitOnValue, BaseQueue.Wait4PacketConsumption
SDMAQueue.Wait4PacketConsumption, PM4Queue.Wait4PacketConsumption with
default value is g_TestTimeOut.
Change-Id: I0aa04d644339feaeea695e41647ae66568beab9e
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: b2e026fce3]
Adding it to the DEBIAN/control won't work, since we use CMake to build
it. Add all required packages to the CMakeLists file
Change-Id: Iaf62f42e0f998d66038338fb2cf793d29c790205
[ROCm/ROCR-Runtime commit: 666f90440a]
This will support the sp3 library built on one gcc version to be
compatible with another gcc version.
Change-Id: If67714bd63376dc781c56ed025be335fe54b2ba5
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
[ROCm/ROCR-Runtime commit: 81b8815e1a]
RAS feature enabling bit and errors return are implemented in
existed topology and event mechanism.
v2: change library interface.
Change-Id: I75807c080b5b26e8115240b05b3d7016cb05a31a
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
[ROCm/ROCR-Runtime commit: 8ee93b3187]
These tests all make use of an SDMAQueue in one way or another, so add
them to the SDMA_BLACKLIST to be 100% certain
Change-Id: Ic29e073c2f46249f3e5918145b13d276aec7bb33
[ROCm/ROCR-Runtime commit: 54807526b9]
Eric Huang
Sean Keely
Kent Russell
Philip Yang
Amber Lin
Oak Zeng
Yong Zhao
Philip Cox
Ramesh Errabolu
Chris Freehill
xinhui pan
Jay Cornwall
Konstantin Zhuravlyov