For software trap in GFX11, COMPUTE_PGM_RSRC1 must have PRIV = 1.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id504889c3ca2588b6c8cefdebaec00dcfc217995
[ROCm/ROCR-Runtime commit: 6294ef564b]
On error mmap returns value MAP_FAILED, which is (void *)-1, not NULL
pointer.
Change-Id: I81b187266c943fa0aa4fab21b529d4c2989b12ad
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 590fd531c0]
IterateIsa had some leftover instructions from when the shader was
getting updated for KFDCWSRTest.BasicTest.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I41ae7b7948cbe2aff8bf61b170b9a7d498b836a3
[ROCm/ROCR-Runtime commit: 82a41c7e4d]
This patch restructures the CWSR basic test and allows for
creating parameterized CWSR tests. This patch introduces four
parameterizations. These tests behave as follows:
This test dispatches the IterateIsa shader, which continuously
increments a vgpr for (num_witems / WAVE_SIZE) waves. While this shader
is running, dequeue/requeue requests are sent in a loop to trigger
CWSRs.
This test defines a CWSR threshold. Once the number of CWSRs triggered
reaches the threshold, a known-value is filled into the inputBuf to
signal the shader to exit.
4 parameterized tests are defined:
KFDCWSRTest.BasicTest/0
KFDCWSRTest.BasicTest/1
KFDCWSRTest.BasicTest/2
KFDCWSRTest.BasicTest/3
0: 1 work-item, CWSR threshold of 10
1: 256 work-items, CWSR threshold of 50
2: 512 work-items, CWSR threshold of 100
3: 1024 work-items, CWSR threshold of 1000
Tuple Format: (num_witems, cwsr_thresh)
num_witems: Defines the number of work-items.
cwsr_thresh: Defines the number of CWSRs to trigger.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I639eb7bd75b14ee70e190b4bd19dcf34096fc7bf
[ROCm/ROCR-Runtime commit: 0dbac97b75]
This didn't return anything, so add a "return 0" at the end, since the
function expects to return an int value
Change-Id: I17c398e431b2ce4571e6ca4abe6d567f110ea2a7
[ROCm/ROCR-Runtime commit: 90ada94141]
: The kernel driver will do align VRAM allocations to 2MB, instead of 4KB.
Change-Id: Iea9d8c0f02999b9ea5fd931da82240a33f7bcc69
[ROCm/ROCR-Runtime commit: 17fb40f1f6]
KFDExceptionTest.SdmaQueueException allocates VRAM with host access. This
fails on small-BAR GPUs. This error was incorrectly ignored before
7ccda4ba26 ("kfdtest: Full TearDown and SetUp in child process").
The test doesn't really need host access to the memory. Therefore the fix
is to disable the HostAccess flag.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ifec279eeb6c1ecb1160db9b692e6dc8816d761a3
[ROCm/ROCR-Runtime commit: 9d33827a84]
The CMA feature is deprecated and about to be removed from the DKMS
branch. It was never supported upstream.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I64b6213eb3adbdc550542e51181cd8ba6ca4cb45
[ROCm/ROCR-Runtime commit: cdaaf8236a]
With the next patch, child processes need to fully reinitialize the
topology in order to recreate the process apertures. Just calling
hsaKmtOpenKFD is no longer sufficient. Tests based on
KFDMultiProcessTest already did this correctly (KFDHWSTest, eviction
tests). This patch fixes KFDExceptionTest and KFDIPCTest.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Iaad24e88ddd29c1105bf791a77891cc55a6072ff
[ROCm/ROCR-Runtime commit: 412b24137e]
LoopIsa is a shader that performs a variety of intensive
calculations in a loop. It is used by tests such as
KFDQMTest.QueuePriorityOn*
It contained a scalar load, despite not having any buffer to
read from. This load causes page faults on GFX11. It is
unclear why it did not cause page faults on earlier ASICs.
Remove the load.
Signed-off-by: David Francis <David.Francis@amd.com>
Change-Id: I7426d0db48e933f3bb870467ea88476f7a283040
[ROCm/ROCR-Runtime commit: 39e8a85aac]
When the shaders were moved to ShaderStore,
KFDQMTest.EmptyDispatch was erroneously
changed to use LoopIsa instead of NoopIsa.
Change it back.
Signed-off-by: David Francis <David.Francis@amd.com>
Change-Id: Iaf7d0d107e3bf3bd8b7d616b137a1740e309cf91
[ROCm/ROCR-Runtime commit: 4b8c74bf04]
Open SMI event file handle, prefetch to migrate svm range to GPU, read
HMM profiling events, then check event_id, address, size, pid, event
triggers are the expected value.
Start separate thread to read SMI event, the same way applications use.
Use thread barrier to ensure no event is dropped.
Change-Id: I0683969d18d1579847e125d86aa4257602adb13f
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 7799611c01]
GFX11 set to FAMILY_NV.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I545241c39bbe739e39a8943b242b9fc49a65a7e1
[ROCm/ROCR-Runtime commit: c198b91c94]
In DeviceHdpFlush, isaBuffer was accidentally used instead of isaBuffer0
during LLVM re-work--revert.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I98d2322e772f821a39505bb336ceb4e6cd8722ef
[ROCm/ROCR-Runtime commit: ffa6c95858]
Otherwise the test failed because KFD returns failure to map or prefetch
the SVM range to those GPUs which don't support SVM.
Change-Id: Ideaec2a686bfabb2fd6ae41b1a690da144121a89
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: c05c66e756]
In the LLVM rework, a line was accidentally changed from
isaBuffer1 to isaBuffer, causing VramCacheCoherenceWithRemoteGPU
to fail. Change it back.
Signed-off-by: David Francis <David.Francis@amd.com>
Change-Id: Ie1f3465b5c46556f18682d1b3d1f086bb790c648
[ROCm/ROCR-Runtime commit: 4b041a8ad9]
[WHY]
These tests force HW exceptions in the GPU driver. Some of these
exceptions might print page fault error messages at kernel level.
These are expected errors due to the nature of the tests, but still
might cause confusion to users.
[HOW]
Add log message to warn the user about these kernel error messages.
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I8eef87b83939e37230da0c374c2f77d2d484baa9
[ROCm/ROCR-Runtime commit: b9e8bc1f52]
Includes a simple AssembleShader test which loops through all shaders
for all supported targets, dispatching a RunAssemble call for each
shader.
Also adds extra safety on a couple shaders that only work on
gfx9/gfx90a.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I3ca1c92136f3871eb62fcb9645694f22287aaeec
[ROCm/ROCR-Runtime commit: 7eeba830f8]
KFDDBGTest is deprecated, so just removing references to IsaGen.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I9f094d847a8ae43cb3793253b34a7d7ed2179ac1
[ROCm/ROCR-Runtime commit: ac48163885]
Use ReadMemoryIsa transferred and updated from KFDEvictTest.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I566f9ec36398bc4d08ab90231688600356df4d6a
[ROCm/ROCR-Runtime commit: 097b11abad]
Makes use of macros to simplify shader code with instruction-level
differences depending on GFX version. These macros are extensible and
are prepended to every shader so that they are usable everywhere.
This patch introduces three macros used within IterateIsa and
ReadMemoryIsa shaders.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: If954e1b6d2027e9f55bf7e99bd9df2668d1da524
[ROCm/ROCR-Runtime commit: 5ceb35f428]
Initial commit for ShaderStore.hpp. Will contain consts char*'s for
all shaders used within KFDTest.
The LLVM assembler now takes care of the correct instructions to be used
for various GFX versions using directives embedded into the shader assembly.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I2887a03b33d5c2cc382e4f96c2bc3e067715ab54
[ROCm/ROCR-Runtime commit: 34ca37d9e8]
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id1eb3856bc74bf0da46685c5dc08e91f5df66d4f
[ROCm/ROCR-Runtime commit: a7b85fdb08]
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7333d0e45ccd3f43690a2a01227f89a6e04fcecb
[ROCm/ROCR-Runtime commit: b44d6762bd]
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I174f1ea5332c499440b30d9bcf06836274428a0f
[ROCm/ROCR-Runtime commit: c845b976d0]
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I669f076b5c34eb90349865eeca1b29e17c9e80d6
[ROCm/ROCR-Runtime commit: 08d38fb140]
- Reformat shaders for legibility
- Move assembly processes to from IsaGen (CompileShader) to Assembler
(RunAssembleBuf)
- LLVM syntax change on ScratchCopyDwordIsa_gfx10:
hwreg(HW_REG_SHADER_FLAT_SCRATCH_LO/HI) -> hwreg(HW_REG_FLAT_SCR_LO/HI)
- Fix bug in CopyOnSignalIsa_gfx10 and PollMemoryIsa_gfx10 whereby
flat_store_dword used vector reg format v[n,n]. Changed to v[n:n]
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id182cfb8aeb7372366c59affb5cbdd145909ee96
[ROCm/ROCR-Runtime commit: 039bce94a6]
Instantiate in KFDBaseComponentTest::SetUp() and destroy in TearDown().
This ensures m_pAsm is available for all tests.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I8b98a5350a9739d71455f14552c9879bdb1c475d
[ROCm/ROCR-Runtime commit: 235636d598]
Initial commit for transition from IsaGenerator/SP3 assembler model to
the LLVM AMDGPU (AMDGCN) assembler backend:
- Add Assembler class, may be instantiated for assembly similar to
IsaGenerator.
- Add Assembler and LLVM archive dependencies to build process.
- CXX bumped to gnu++14 as required for LLVM compilation.
- Compatible with LLVM 7.0 and greater (latest Lightning/llvm-git
version should be used for up-to-date gfx support). Note that this is
just a build dependency and *not* a runtime dependency. LLVM does not
need to be installed on the host machine to run kfdtest.
- CMake will first look for a Lightning build. Lightning itself does not
need to be installed system-wide, just built. If this fails, it will
attempt to find a system-wide LLVM install.
General Assembler usage and notes:
- Similar to IsaGenerator, applicable test classes will contain an
Assembler object pointer which may be instantiated in the test
constructor.
- Instantiation requires the GFXIP version in order to find the
appropriate LLVM AMDGPU Target ID.
- The RunAssemble() member func takes in a standard const char* shader and
fills the TextData member with the output binary; TextSize with the size
of TextData. These may be accessed via GetInstrStream() and
GetInstrStreamSize(), or the output binary may be copied into an
IsaBuffer via CopyInstrStream(). RunAssembleBuf() combines RunAssemble()
and CopyInstrStream() and additionally takes an optional BufSize
parameter to specify the size of the output buffer (defaults to
PAGE_SIZE).
- Assembler object deletion is to be done in the base test destructor.
Assembler-specific memory allocation is freed in the Assembler
destructor.
- For debug, one can call PrintTextHex() to print out a formatted hex
representation of the output binary, or PrintELFHex() to print out the
intermediate ELF object. Note that PrintTextHex() is public whereas
PrintELFHex() is private.
- Prints use the LLVM outs() call as that allows for use of the LLVM
format_hex() func in the aforementioned debug prints. This is subject to
change if the LOG() call would be preferred.
RunAssemble control flow:
- Ensure correct Assembler initialization and clear previous run
TextData (if necessary).
- Initialize LLVM AMDGPU target, required interfaces, and buffers.
- Set parser to specified target/subtarget and assemble into ELF code
object.
- Extract .text section from ELF, allocate space for TextData and store.
- On success, returns 0 (HSAKMT_STATUS_SUCCESS). On error, returns -1
(subject to change to be in line with HSAKMT_STATUS enum).
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I1d96230824db651d3ffbaa46eb68fc274e7066b5
[ROCm/ROCR-Runtime commit: 65b1e0c058]
According env setting HSA_XNACK=1 or 0, set XNACK mode ON or OFF to run
KFDSVMRangeTest and KFDSVMEvictTest. If HSA_XNACK is not defined, use
system boot-time XNACK mode setting.
Restore to the original XNACK mode when test finished.
Change-Id: Ia896a1b0a90854646c8a79acca38a7d46098efde
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 23ec6e880e]
Graham Sider
Philip Yang
Daniel Phillips
Kent Russell
jie1zhan
Felix Kuehling
David Francis
Alex Sierra