3115 Commit

Autore SHA1 Messaggio Data
Philip Cox 3d13159fd6 Fix type mismatch passed to queue suspend/resume
The queue IDs passed over to the kernel via kfd_ioctl_dbg_trap_args->ptr
should be a list of uint32_t's.  Need to convert from the passed in
64 bit HSA_QUEUEID to 32 bit uint32_t's.

Change-Id: I8718566d9f9ffc90ce0b2ecc129b10c49d73186a
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: 608bc7c3a0]
2019-05-15 07:33:47 -04:00
Sean Keely bdda9b4f0e Correlate errors for time stamps which predate process start.
Small times may be given to time conversion if GPU clocks are used to
accumulate elapsed time.  Because HSA APIs deal in absolute time this
leads to large conversion offsets of order system uptime.  Variation
in relative clock ratio estimation may be amplified in this case,
destroying elapsed time measurements.

This patch fixes the relative clock ratio used for times which predate
the call to hsa_init.  This correlates errors in such times allowing
the elapsed time to be correctly computed.

The effective maximum system uptime before elapsed time conversion becomes
inaccurate is ~3.5 months.  GPU event timestamps are good for process uptime
of ~3.5 months.  These are limited by double's mantissa precision.

Change-Id: I48752ff354920439d91016d6f2b0c8ddfa60b445


[ROCm/ROCR-Runtime commit: 6e2a056e1b]
2019-05-14 17:35:06 -04:00
Kent Russell 84cc063225 Add missing gfx803 ID
Change-Id: I9eca81f0f149ea924c3b81bd80680d7fd1ad7a6c


[ROCm/ROCR-Runtime commit: 54e042eee1]
2019-05-13 09:03:06 -04:00
Sean Keely ec39134408 Expose HDP flush registers.
Exposed via agent info query.  Only valid if fine grain PCIe memory is enabled.

Change-Id: Ib4770901592ec047276458926a947737f9b93bb5


[ROCm/ROCR-Runtime commit: 06376e726b]
2019-05-11 00:04:47 -04:00
Oak Zeng 58d3a9f92a Temporarily disable HostHdpFlush test
Change-Id: I070cb3523a33b4efbfa7041fa2623059e1ff37bb
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 78e4ef17c2]
2019-05-10 09:34:40 -04:00
Felix Kuehling 1629c543db libhsakmt: Disable -Werror by default
This can cause build failures on unknown of future compiler versions.
Only enable it if explicitly enabled by an environment variable. This
allows us to continue building with -Werror in internal builds with
known compiler versions.

Change-Id: Ic1cd9d223218cc4e4cddba49df93bb357c1cbd40
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 8f10c9375d]
2019-05-07 16:06:51 -04:00
Philip Cox 00ec9fac6e fix suspend/resume logic in debug_trap code
There was a mistake and RESUME was used when it should
have been suspend in two places in the suspend resume
code.  This fixes that error.


Change-Id: I69be733d7ae7c14ce5ee8af57a307976e4212d62


[ROCm/ROCR-Runtime commit: b0d23aee16]
2019-05-07 06:56:00 -04:00
Philip Cox 596a2491c7 libhsakmt: Update wave suspend/resume API
This is updating to the new suspend and resume API for the
KFD and the thunk.  We now support passing in a list of queues
to suspend, and not just all of the queues for the process.

The kfdtest testcase was also updated so it still compiles.

Change-Id: I71d1b178476bd9df0c311bdedaa6a891528cebcf
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: c2c1385e29]
2019-05-03 10:32:47 -04:00
Philip Cox 5e56c9a609 libhsakmt: Update HsaQueueInfo for GetQueueInfo
hsaKmtGetQueueInfo needs to return the control stack size, and the
wave state size for the debugger.  These changes are needed to support
returning the new values.

Change-Id: Ib4c60e0ea34446c06aef4a86996250989f348a69
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: d21e9d5bbd]
2019-05-03 10:32:47 -04:00
Oak Zeng 3914fb9424 Host HDP flush test
Change-Id: I396ac021d15da972f4841d6d8f90d4b175e64ecd
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: b26580788b]
2019-05-03 09:31:41 -04:00
Felix Kuehling 4b8a5ead52 kfdtest: Make eviction tests more robust
- Run more graphics command submissions with shorter delay between
  them
- Synchronize after every graphics command submission
- Include the big VRAM BO in the BOList of the command submission
  to trigger more evictions
- In QueueTest, run AMDGPU command submissions concurrently with
  compute shader on the user mode queue
- Submit AMDGPU commands to GFX queue instead of compute queue to
  avoid deadlocks between user-mode and kernel-mode queues on the
  same pipe
- Allocate slightly less memory from KFD to avoid allocation errors
  due to fragmentation or memory leaks in previous tests
- Running only two processes maximizes the number of KFD evictions
  (probably because of lower chances of evicting non-KFD BOs)

Change-Id: If05d53f5fcf690b6488998a3f933f120ddaa71ee
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: c8d823eb10]
2019-05-02 17:34:11 -04:00
Oak Zeng dbfa65a604 Add MMIO_REMAP heap type
Add a MMIO_REMAP heap type and expose mmio virtual address
through HsaKmtGetNodeMemoryProperties



Change-Id: I1e585e6dfbec8fa7c85f1dda7b89b763a8e2c439
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 804aa90a22]
2019-04-30 15:40:50 -05:00
Oak Zeng 5acd835452 Fix return value of fmm_get_aperture_base_and_limit
Only return success when the aperture is valid

Change-Id: I63b97fd0450e1ff277cf45abc7a1be9f7a0c0d50


[ROCm/ROCR-Runtime commit: e4a6a01389]
2019-04-30 09:38:46 -05:00
Oak Zeng 8b70424b2f Map remapped mmio page to process space
HDP conherence registers are remapped at driver level
to an empty page in mmio space (the remapped mmio page).
This change allocate and map the remapped mmio page to
process space.



Change-Id: I89c405c41870a79c5b58eea0d8e564aa35f55182
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: ae111689f0]
2019-04-30 09:00:16 -05:00
Sean Keely 5b71bc65b7 Patch from github.
At the moment it is not possible to build ROCr with Clang. This is
a spurious limitation. The present PR addresses it by guarding GCC
only flags and by fixing some additional warnings that Clang triggers;
one of said warnings did outline a rather interesting issue with math
being done on void*s. - AlexVlx

Void ptr arithmetic had already been fixed in amd-master branch.

Change-Id: I5ee97e20b5c40b10dd73facecabe75f02ba46462


[ROCm/ROCR-Runtime commit: e89f9807f1]
2019-04-29 16:17:24 -04:00
Felix Kuehling d810b66917 Use non-paged memory for IPC signals
Non-paged memory can be IPC-shared even when HSA_USERPTR_FOR_PAGED_MEM
is enabled.

Change-Id: I8b1fa6d7a4a9327c78a77b3679697fbf55397093
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 0c6b9532d4]
2019-04-29 09:20:11 -04:00
Yong Zhao c14a254f2e kfdtest: Add CreateDestroyCpQueue and CreateDestroySdmaQueue test
Those two tests cover the basic queue creation and destruction
without submitting packets to CP and SDMA user queues. During bringup,
they bring values in term of untangling the issues arising in queue
creation and packet execution, which are two very different kinds.

Because of those two tests, we also rename some existing tests as
follows:
CreateCpQueue             ->   SubmitPacketCpQueue
CreateSdmaQueue           ->   SubmitPacketSdmaQueue
CreateMultipleCpQueues    ->   MultipleCpQueues
CreateMultipleSdmaQueues  ->   MultipleSdmaQueues

Lastly, move MultipleCpQueues test closer to the CP queue section
rather than leaving it behind the SDMA queue section.

Change-Id: I110fb3f3fb21878339045dd1d1c8c9d61b8988b7
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 5b18614eaf]
2019-04-23 15:08:17 -04:00
Kent Russell 56bbd862e6 Fix test if Render Node can't be found
If a Render Node can't be found, we should finish off all child
processes immediately, then return.

Trying to do the check before forking the children results in the test
failing as well, regardless of the status of finding the render node,
which is likely why the forking occurred first in the test's initial
creation. This way we ensure that things finish cleanly before moving to
the next test


Change-Id: I2e1b62fed25c30ff1f179612127c23960da4ee5e


[ROCm/ROCR-Runtime commit: e109ce541c]
2019-04-23 07:14:35 -04:00
Alex Voicu 87d0f4246b Macros are devious, wrap argument to prevent surprises.
Change-Id: Ib99e7d2ec1e7a2802f4ae7946ba1fa92c9940a85


[ROCm/ROCR-Runtime commit: ee9831779c]
2019-04-19 07:06:28 -04:00
Alex Voicu 605a038c57 Fix Clang build
Change-Id: I0b51699c0a1368cf5813bd9d3cd4479139d23d6a


[ROCm/ROCR-Runtime commit: fdadae6745]
2019-04-19 07:06:28 -04:00
Andreas Schneider f3838c57bc cmake: Do not mess with CMAKE flags
Specifically, don't mess with CMAKE_SHARED_LINKER_FLAGS or
CMAKE_C_FLAGS

Change-Id: I73e287df5b80d440079c6b3abe8c401d492d11dd


[ROCm/ROCR-Runtime commit: 0045974858]
2019-04-19 07:06:28 -04:00
Andreas Schneider d698471b8a cmake: Do not strip targets in the release build
Distributions want to generate debuginfo packages, do not strip them! If
you want to do it during installation use 'make install/strip'!

Change-Id: I3983af24ce4f4ddb189ede0ed0820dfee83b6280


[ROCm/ROCR-Runtime commit: 8ccfa4c75c]
2019-04-19 07:06:28 -04:00
Sean Keely bdf4b84f82 Don't create blits when copy profiling is enabled.
Change-Id: I879827133957ee610c3381ea30c536ec7d10ffab


[ROCm/ROCR-Runtime commit: 1251842900]
2019-04-18 20:00:02 -05:00
Jay Cornwall 2c3c92208d Detect memory event through Flags field insetad of Failure
KFD no longer reports MemoryAccessFault.Failure with retry fault
implementation. ROCr ignores the memory event when Failure = 0.

Use the Flags field instead, which will be non-zero when the
event is triggered.

Change-Id: Ie90799a303b0b2f1b476b20ffafdde79ae137182


[ROCm/ROCR-Runtime commit: 56f280c8a7]
2019-04-15 19:16:07 -05:00
Ramesh Errabolu fd05ee66a7 Remove instantiation of MemoryRegion for heap type SVM surfaced by ROCt
Change-Id: Ib4ff7e7cabe9aacb811888aeb74f652dcb57f9e0


[ROCm/ROCR-Runtime commit: ba029ebe21]
2019-04-10 18:33:07 -05:00
Andreas Schneider 4006e1f112 cmake: Create cmake config file
Another cmake project like hsa-runtime could just use:

find_package(hsakmt REQUIRED 1.9.0)

Change-Id: Ia1c9a80ef287facdd607382d69649b0718d687b4


[ROCm/ROCR-Runtime commit: b8a1331763]
2019-04-03 08:36:09 -04:00
Konstantin Zhuravlyov dde11e307d Process symbols with 0 address
Change-Id: I9ed943a8ccd3b103edd6aba8264c009d8cda29fa


[ROCm/ROCR-Runtime commit: 7001134757]
2019-03-30 02:14:43 -04:00
Sean Keely 59e91f0be8 Add hsa_amd_memory_lock_to_pool.
Makes malloc memory accessible to GPUs so that the memory has the
capabilities of the pool it is locked to.
This admits fine grained locked memory and reserves API space for any future
special CPU pools.

Change-Id: If8c3dd8582a43f19d3d36b3763c1a688cc419ef0


[ROCm/ROCR-Runtime commit: a535e18cc1]
2019-03-29 01:09:21 -05:00
Sean Keely f819304f49 Remove legacy memory fault event name.
Change-Id: I3ad240482523409e1152548009aecf127e63bbfa


[ROCm/ROCR-Runtime commit: 9f7df6d6fe]
2019-03-28 15:25:25 -05:00
Sean Keely 6121ae4f6b Fix void* arithmetic.
GCC allows arithmetic on void* treating void as char.  Clang and
the language spec does not.

Change-Id: I939f2432f276979bb81881406e10528597ac6001


[ROCm/ROCR-Runtime commit: e5de33dd9a]
2019-03-28 12:49:19 -05:00
Sean Keely cdd2c26ac4 Disable sram-ecc reporting via ISA until HCC is fixed.
Change-Id: I0382825884b727173385f04da9f2088650c3ba1d


[ROCm/ROCR-Runtime commit: 7ea0cd688f]
2019-03-21 17:46:56 -04:00
Chris Freehill 30f23c3ff4 Re-enable RSMI call using updated API prototype
Change-Id: Ifc8fa35708fea05cbc8a9bea727a6d4c9d2ecea7


[ROCm/ROCR-Runtime commit: 68c202de1f]
2019-03-18 23:18:42 -05:00
Chris Freehill 79ad9eebf6 Temporary disable of rsmi call due to api change
Change-Id: If73f31c5fbe4bcd34f8e52a5109a6fbfff70b5e1


[ROCm/ROCR-Runtime commit: 7b3537cf44]
2019-03-16 21:05:47 -05:00
Sean Keely 906c36278a Do not strip release builds.
Customer request.

Change-Id: Id77dcdc0b6908c7a5e460edfd7d9468a1691e351


[ROCm/ROCR-Runtime commit: fd9fb77e28]
2019-03-07 14:04:14 -06:00
Tom Stellard 540fa908f6 Separate build version from library version
This patch separates the build version (i.e. ROCm version) from the
library version used to set the SONAME of the shared objects.  This
prevents the SONAME from getting bumped each time there is a new ROCm
release without any change to the libhsakmt ABI.

1.0.6 was choosen as the library version since this was the
last library version used prior to switching to the ROCm version
numbers.

Change-Id: I7c29ae84d8a362a831e804569d8147ca65155cad


[ROCm/ROCR-Runtime commit: 006c2c248d]
2019-02-28 21:32:45 -08:00
Eric Huang cec44d33c9 kfdtest: fix and change in RAS test
1. RAS error injection debugfs interface has been changed which
is using ras_ctrl instead of *_err_inject.

2. Remove ASSERT_SUCCESS for fwrite, because fwrite returns
the size of written item but not the error number.

3. Using throw exception instead of return to avoid a segment fault.

Change-Id: I6c4d9c2f7e66719faec99abd1552105a08c238a4
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>


[ROCm/ROCR-Runtime commit: e5b215570b]
2019-03-29 11:00:01 -04:00
Eric Huang 6e93266f63 libhsakmt: update kfd_ioctl.h regarding RAS interface
It is aligned with RAS changes in KFD.

Change-Id: I52816da01a4001158a40a1207d1fbe6ec3271343
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>


[ROCm/ROCR-Runtime commit: d6cde5bf08]
2019-03-28 21:38:44 -04:00
Sean Keely 80ffb43205 Add hsaKmtRegisterMemoryWithFlags.
API follows hsaKmtRegisterMemory but allows passing HsaMemFlags.

Change-Id: I66a230a87c8b085f27c769bdf2cb4d0d96a5d6dd


[ROCm/ROCR-Runtime commit: c7f1277013]
2019-03-28 17:17:40 -04:00
Kent Russell 5de58e1ab2 libhsakmt: Add Vega M support
While this may not be supported in the runtime, the kernel/firmware
support it

Change-Id: I7fe4536a6b3055f39e25f453060e899938645d91
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: 1304a92e17]
2019-03-21 08:05:47 -04:00
Kent Russell 14676959fb libhsakmt: Add another gfx902 GPU ID
Change-Id: I967f16bf548171df73d2e721f16c1aac52e99852
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: c7439a0039]
2019-03-21 08:05:47 -04:00
Philip Yang c140f95b1b Revert "kfdtest.exclude: Temporarily blacklist IPC on gfx900"
This reverts commit a349805264.

Fixes for HMM change corner cases are merged in from drm-next.
Tests are passed on gfx900 with the latest amd-kfd-staging.

Change-Id: I6c00d1eacf6b3f1ce715e085ae622b4e9ff1b7ff
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 0bd9f35563]
2019-03-18 10:10:00 -04:00
Amber Lin bc0bc878f4 libhsakmt: Fix missing apicid in topology
While adding x2APIC support, apicid for non-x2apic was missing out by
mistake.



Change-Id: I25eed362c035c0e9fb9ea948899c49f70311f269
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: cfa47ac1f9]
2019-03-11 13:05:37 -04:00
Oak Zeng 1efba15c34 Introduce XGMI SDMA queue type
Change-Id: I8c6ff04f92c2bbea0bab94ddb8cc4cceb5d74d02
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 1046a1fd72]
2019-03-07 19:42:20 -05:00
Oak Zeng f77c754281 Thunk interface to get SDMA engine info
Add SDMA engine info fields to node properties and
modify get node properties API to read SDMA engine
info from sysfs

Change-Id: Iea877b5bc008cc9df9405daf564a359535f1bc9f
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 414a3508d6]
2019-03-07 14:09:43 -05:00
Oak Zeng a75addec83 Use latest kfd_ioctl.h
A new SDMA queue type for XGMI was added

Change-Id: Iad065c1a7c053a58e0d86becfb374215e316a611
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: e4109de26d]
2019-03-07 13:25:33 -05:00
Amber Lin ee54c2ec5a libhsakmt: Support x2APIC in topology
Current processor/cache topology code implements xAPIC architecture, which
is 8 bits addressability. This is not enough for a system having more than
255 processors. x2APIC is the extension of xAPIC architecture to support
32 bit addressability of processors. This patch detects the x2APIC
enablement and uses the extension leaf to get apicid when detected.

Change-Id: I0826585d02f696a46cd5efb9a6630c60af01e2d8
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: f8028a40fd]
2019-03-01 16:42:30 -05:00
Kent Russell a349805264 kfdtest.exclude: Temporarily blacklist IPC on gfx900
Due to the recent HMM changes, the KFDIPCTest can intermittently fail,
combined with CrossMemoryAttach consistently failing. Remove it for now
while Philip Yang investigates

Change-Id: Icf272100bb7882eff4202ad6f4ced63b569f4e7d


[ROCm/ROCR-Runtime commit: d00ec779ce]
2019-02-28 07:29:47 -05:00
Sean Keely 953355e0f7 Report SRAM ECC errors through the system event handler.
Modify the system event handler to support multiple users.
Name memory fault reason codes.

Change-Id: I1b5979b36ab15637eb2be59a61e2d57e76d0a70e


[ROCm/ROCR-Runtime commit: 67376e06ab]
2019-02-27 18:08:07 -05:00
Kent Russell 16d110f9c1 Temporarily remove CMATest from gfx900
Per Philip Yang:
For forked child process, userptr allocated on heap (through malloc)
will have two vmas if child process malloc smaller size buf, free it,
this is on vma cloned from parent process. Then malloc larger size buf,
kernel will put some pages on previous freed space from vma cloned,
create new vma for the rest of pages. This is what IPCTest does.

Change-Id: I054771e20880f975d7cc774225f19aad5363843f


[ROCm/ROCR-Runtime commit: a0b8dd8462]
2019-02-27 07:05:42 -05:00
Sean Keely 8b90c223ac Loader support for SRAM ECC.
Change-Id: I0c6791c356d9186cc8dabae9fd698b1d4de19b09


[ROCm/ROCR-Runtime commit: 3c3db0243e]
2019-02-25 18:30:05 -05:00