Commit Graph
64512 Commits
Author SHA1 Message Date
Ioannis Assiouras 733c8d1d1c SWDEV-369581 - Convey copy API metadata to ROCclr
Change-Id: I569462d6d268700d419510255e201bf7d80d6714


[ROCm/clr commit: 72b45e2a1f]
2022-12-09 00:27:15 -05:00
Ioannis Assiouras 72b45e2a1f SWDEV-369581 - Convey copy API metadata to ROCclr
Change-Id: I569462d6d268700d419510255e201bf7d80d6714
2022-12-09 00:27:15 -05:00
pghafari 4e6a699eae SWDEV-366279 - updating p2p error msg
Change-Id: I294e7770efd11f511dd5817eb28bd3c97d9d4926


[ROCm/clr commit: 402504f548]
2022-12-09 00:05:04 -05:00
pghafari 402504f548 SWDEV-366279 - updating p2p error msg
Change-Id: I294e7770efd11f511dd5817eb28bd3c97d9d4926
2022-12-09 00:05:04 -05:00
Nirmal Unnikrishnan 4d754807ec SWDEV-354524 : Changing the module file name.
Now modules can be loaded as module load rocm/x.x.x

Change-Id: I6fe5b5fb9bb852a2bfac9b69ac0c96b75d4fb959


[ROCm/rocm-core commit: 38959daacd]
2022-12-08 22:16:27 -06:00
Nirmal Unnikrishnan 38959daacd SWDEV-354524 : Changing the module file name.
Now modules can be loaded as module load rocm/x.x.x

Change-Id: I6fe5b5fb9bb852a2bfac9b69ac0c96b75d4fb959
2022-12-08 22:16:27 -06:00
Alex Sierra f2bda56d04 Revert "src: use SVM mechanism to register userptr memory"
This reverts commit 178a619b80.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I7ef87c5232a3bcbe594c743fa4b4958601845ba5
2022-12-08 17:33:51 -06:00
Alex Sierra d1bbeac5fe Revert "src: use SVM mechanism to register userptr memory"
This reverts commit ea19fbb646.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I7ef87c5232a3bcbe594c743fa4b4958601845ba5


[ROCm/ROCR-Runtime commit: f2bda56d04]
2022-12-08 17:33:51 -06:00
Alex Sierra d9f86ae02b Revert "libhsakmt: query svm info from userptrs at fault events"
This reverts commit 45fad29752.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I6566c9f0d39d05ecb92f38159880763f432939a5
2022-12-08 17:33:50 -06:00
Alex Sierra 933292eedb Revert "libhsakmt: query svm info from userptrs at fault events"
This reverts commit a89bcd0518.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I6566c9f0d39d05ecb92f38159880763f432939a5


[ROCm/ROCR-Runtime commit: d9f86ae02b]
2022-12-08 17:33:50 -06:00
Alex Sierra 21e95a4f2a Revert "libhsakmt: add env var to en/dis registration through SVM"
This reverts commit 8a746bdaed.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: Ib01046571d2c84fa0fd228ecba0dee0eae3f994d
2022-12-08 17:33:48 -06:00
Alex Sierra f0e2e1936c Revert "libhsakmt: add env var to en/dis registration through SVM"
This reverts commit 6789a0f3bd.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: Ib01046571d2c84fa0fd228ecba0dee0eae3f994d


[ROCm/ROCR-Runtime commit: 21e95a4f2a]
2022-12-08 17:33:48 -06:00
pghafari f1dda2b2b3 SWDEV-369668 - update error check for hipGetError
Change-Id: I8f991237d59d04c9b6b3965a453ba3f54718eb43


[ROCm/clr commit: 52878fd039]
2022-12-08 15:56:49 -05:00
pghafari 52878fd039 SWDEV-369668 - update error check for hipGetError
Change-Id: I8f991237d59d04c9b6b3965a453ba3f54718eb43
2022-12-08 15:56:49 -05:00
Jaydeep Patel be5d6fb005 SWDEV-370537 - PAL does 64kb alignment so no need to do it in runtime. Reverting alignment to 4kb.
Change-Id: If3eaac65bf63bb9b8b73a3cad1bb34d357f1adeb


[ROCm/clr commit: cd7034c9bb]
2022-12-08 14:54:46 -05:00
Jaydeep Patel cd7034c9bb SWDEV-370537 - PAL does 64kb alignment so no need to do it in runtime. Reverting alignment to 4kb.
Change-Id: If3eaac65bf63bb9b8b73a3cad1bb34d357f1adeb
2022-12-08 14:54:46 -05:00
David Yat Sin 6bfe57aeb2 Add Stream Performance Monitor(SPM) APIs
Change-Id: I0d48782887814ef245b7e0182e2d5570aa8c3f50
2022-12-08 13:56:29 -05:00
David Yat Sin 93c4ffe473 Add Stream Performance Monitor(SPM) APIs
Change-Id: I0d48782887814ef245b7e0182e2d5570aa8c3f50


[ROCm/ROCR-Runtime commit: 6bfe57aeb2]
2022-12-08 13:56:29 -05:00
German ebf7fad258 SWDEV-370901 - Force sysmem allocation
Adobe AE allocates/destroys system memory per each frame
in some effects, which is a very expensive operation.
Disable pinning and force sysmem allocation in VidMM.
That allows to trigger resource cache in runtime and
avoid paging operations, caused by pinning.
The actual benchmark doesn't have significant improvement
from the change, but GPU view traces are much cleaner.

Change-Id: I92cdd87d37c64611788f05250f71d6fe489b4d7e


[ROCm/clr commit: 8cf53e7dff]
2022-12-08 13:06:51 -05:00
German 8cf53e7dff SWDEV-370901 - Force sysmem allocation
Adobe AE allocates/destroys system memory per each frame
in some effects, which is a very expensive operation.
Disable pinning and force sysmem allocation in VidMM.
That allows to trigger resource cache in runtime and
avoid paging operations, caused by pinning.
The actual benchmark doesn't have significant improvement
from the change, but GPU view traces are much cleaner.

Change-Id: I92cdd87d37c64611788f05250f71d6fe489b4d7e
2022-12-08 13:06:51 -05:00
German Andryeyev b4f089f6e7 SWDEV-353281 - Relax prof script validation
Report a warning on HIP header mismatch

Change-Id: Ib6fb32161b7de14881ef88cff6c95e6b432999db


[ROCm/clr commit: 6d3b8d0106]
2022-12-08 12:57:13 -05:00
German Andryeyev 6d3b8d0106 SWDEV-353281 - Relax prof script validation
Report a warning on HIP header mismatch

Change-Id: Ib6fb32161b7de14881ef88cff6c95e6b432999db
2022-12-08 12:57:13 -05:00
kent.russell@amd.com 569847e375 rocm_smi.py: Fix order of CE and UE reporting
We append CE then UE, but in the table right after, it goes UE then CE.
Fix the order of the table, and add capitals for consistency

Change-Id: I208f37685508ab1e2ff83d3456620bbbf3a16268


[ROCm/rocm_smi_lib commit: 248c6f79f4]
2022-12-08 12:28:37 -05:00
kent.russell@amd.com 248c6f79f4 rocm_smi.py: Fix order of CE and UE reporting
We append CE then UE, but in the table right after, it goes UE then CE.
Fix the order of the table, and add capitals for consistency

Change-Id: I208f37685508ab1e2ff83d3456620bbbf3a16268
2022-12-08 12:28:37 -05:00
sdashmiz 6a661a9f15 SWDEV-367833 - return success for null stream
- return success for query on null stream

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Ifc2cf705e1962565c68de7b1777f870c5a4d56cf


[ROCm/clr commit: fefff25364]
2022-12-08 11:41:37 -05:00
sdashmiz fefff25364 SWDEV-367833 - return success for null stream
- return success for query on null stream

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Ifc2cf705e1962565c68de7b1777f870c5a4d56cf
2022-12-08 11:41:37 -05:00
kjayapra-amd e47e613948 SWDEV-363865 - Use COMGR path to unbundle code object in HIPRTC.
Change-Id: Ie6a48ab2792bb3f7ae1e62d716ecc35b8e24fe16


[ROCm/clr commit: 7319dc36c1]
2022-12-08 08:34:33 -05:00
kjayapra-amd 7319dc36c1 SWDEV-363865 - Use COMGR path to unbundle code object in HIPRTC.
Change-Id: Ie6a48ab2792bb3f7ae1e62d716ecc35b8e24fe16
2022-12-08 08:34:33 -05:00
Chauncey Hui 22ca7dc91e SWDEV-2 - Change OpenCL version number from 3540 to 3541
[ROCm/clr commit: cbc66bf89d]
2022-12-08 03:00:09 -05:00
Chauncey Hui cbc66bf89d SWDEV-2 - Change OpenCL version number from 3540 to 3541 2022-12-08 03:00:09 -05:00
David Yat Sin ecdebef0b9 Add agent info for fw and sdma ucode
Add two new agent info fields:
HSA_AMD_AGENT_INFO_UCODE_VERSION
HSA_AMD_AGENT_INFO_SDMA_UCODE_VERSION

Change-Id: I51cb853724b23a26e945e5c1ac32c16d0cb3bc31
2022-12-07 19:07:31 -05:00
David Yat Sin 652a617846 Add agent info for fw and sdma ucode
Add two new agent info fields:
HSA_AMD_AGENT_INFO_UCODE_VERSION
HSA_AMD_AGENT_INFO_SDMA_UCODE_VERSION

Change-Id: I51cb853724b23a26e945e5c1ac32c16d0cb3bc31


[ROCm/ROCR-Runtime commit: ecdebef0b9]
2022-12-07 19:07:31 -05:00
pghafari ed6108c2d6 SWDEV-368166 - hipGraphAddMemcpyNode1D paramcheck
adding parameter check for hipGraphAddMemcpyNode1D

Change-Id: I94dc944bd55ea04b8e9288a27c8f58dd3720161b


[ROCm/clr commit: 5acc2cdcc2]
2022-12-07 18:29:11 -05:00
pghafari 5acc2cdcc2 SWDEV-368166 - hipGraphAddMemcpyNode1D paramcheck
adding parameter check for hipGraphAddMemcpyNode1D

Change-Id: I94dc944bd55ea04b8e9288a27c8f58dd3720161b
2022-12-07 18:29:11 -05:00
Saleel Kudchadker 7ba49616e9 SWDEV-371123 - Use barrier value packet for event records
Change-Id: I5e5e5e89e0d96a2430b4682d168b76848fa5b94e


[ROCm/clr commit: 4f64d89026]
2022-12-07 17:57:36 -05:00
Saleel Kudchadker 4f64d89026 SWDEV-371123 - Use barrier value packet for event records
Change-Id: I5e5e5e89e0d96a2430b4682d168b76848fa5b94e
2022-12-07 17:57:36 -05:00
Chauncey Hui 9323ba1345 SWDEV-2 - Change OpenCL version number from 3539 to 3540
[ROCm/clr commit: c8e66f4cf8]
2022-12-07 03:00:08 -05:00
Chauncey Hui c8e66f4cf8 SWDEV-2 - Change OpenCL version number from 3539 to 3540 2022-12-07 03:00:08 -05:00
Jaydeep Patel 2411eeba32 SWDEV-366086 - Validations for negative scinerios.
Change-Id: Icca87de775bf7f8c4d18f911f7bee21fafdcff55


[ROCm/clr commit: e2279b3869]
2022-12-06 21:27:37 -05:00
Jaydeep Patel e2279b3869 SWDEV-366086 - Validations for negative scinerios.
Change-Id: Icca87de775bf7f8c4d18f911f7bee21fafdcff55
2022-12-06 21:27:37 -05:00
Cole Ramos c57f435ef0 Merge pull request #50 from AMDResearch/python-logging
Python subprocess logging

[ROCm/rocprofiler-compute commit: 7aa073d91c]
2022-12-06 16:22:17 -06:00
Cole Ramos 7aa073d91c Merge pull request #50 from AMDResearch/python-logging
Python subprocess logging
2022-12-06 16:22:17 -06:00
colramos-amd d45ab313f5 Throw a warning if unable to update timestamps
Signed-off-by: colramos-amd <colramos@amd.com>


[ROCm/rocprofiler-compute commit: efe6d9f19a]
2022-12-06 15:24:36 -06:00
colramos-amd efe6d9f19a Throw a warning if unable to update timestamps
Signed-off-by: colramos-amd <colramos@amd.com>
2022-12-06 15:24:36 -06:00
colramos-amd 3e4eab2a57 Merge branch 'dev' of github.com:AMDResearch/omniperf into python-logging
[ROCm/rocprofiler-compute commit: 99d603b9dd]
2022-12-06 14:50:14 -06:00
colramos-amd 99d603b9dd Merge branch 'dev' of github.com:AMDResearch/omniperf into python-logging 2022-12-06 14:50:14 -06:00
Tao Sang ea9808ac40 SWDEV-370659 - Add lock for HSAIL only
Add lock for HSAIL only in order to fix test failures
in math brute force and integer_ops tests.

Change-Id: I5f14cdcaa4ee9867fdae63fff197a0f21ee5f1d4


[ROCm/clr commit: f29d3bc3ac]
2022-12-06 15:50:04 -05:00
Tao Sang f29d3bc3ac SWDEV-370659 - Add lock for HSAIL only
Add lock for HSAIL only in order to fix test failures
in math brute force and integer_ops tests.

Change-Id: I5f14cdcaa4ee9867fdae63fff197a0f21ee5f1d4
2022-12-06 15:50:04 -05:00
Cole Ramos 533d6ff8b7 Merge pull request #49 from AMDResearch/37-add-l1-l2-bw
Add metric for L1-L2 BW

[ROCm/rocprofiler-compute commit: 8741bb0930]
2022-12-06 14:34:16 -06:00
Cole Ramos 8741bb0930 Merge pull request #49 from AMDResearch/37-add-l1-l2-bw
Add metric for L1-L2 BW
2022-12-06 14:34:16 -06:00