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42 Commits

Author SHA1 Message Date
David Yat Sin d0ae8b2eb5 rocr: Add support for gfx950 
<squashed with patch for gfx950 generic targets>

Signed-off-by: Chris Freehill <Chris.Freehill@amd.com>

Change-Id: Ifec6d93cf46c7fbf736c6572882299e279260af6


[ROCm/ROCR-Runtime commit: dab8f2fc65]
 2025-01-26 13:04:58 -05:00
Konstantin Zhuravlyov bee079fc24 loader: add gfx9-4-generic support 
Change-Id: Icb148f7a78a4ce0fc661e35d0df605e05db2de3d


[ROCm/ROCR-Runtime commit: 4c7a9a0f67]
 2024-11-14 12:47:46 -05:00
Konstantin Zhuravlyov 45c824a387 amd_hsa_elf.h: bring EF_AMDGPU_MACH_* in sync with llvm-project 
- formatting
  - add EF_AMDGPU_MACH_AMDGCN_RESERVED_0X56
  - add EF_AMDGPU_MACH_AMDGCN_RESERVED_0X57
  - add EF_AMDGPU_MACH_AMDGCN_GFX1153
  - add EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC

Change-Id: Ibad464c659137c0c98fa9fa9d1f293ea62684ee6


[ROCm/ROCR-Runtime commit: d9404a52ed]
 2024-11-07 18:03:27 -05:00
Tim Huang a85b7afd2e Fix last AMDGCN-based processors enumerator error 
Change-Id: Idd0659a327585b30b0f7d4dcb9e2212b55239941
Signed-off-by: Tim Huang <tim.huang@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>


[ROCm/ROCR-Runtime commit: 1278ac25c0]
 2024-07-17 22:32:23 -05:00
Yifan Zhang 491275f838 Add support for GC 11.5.2 
Change-Id: Iad8604881dc66108933ac2155fef3b74bca9ac3f
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>


[ROCm/ROCR-Runtime commit: 71494a920b]
 2024-06-25 12:50:03 -05:00
Konstantin Zhuravlyov 853ccdecbb Add dynamic relocation types (NFC) 
Change-Id: I1b443003077ba241f34444da293e362266c2ae92


[ROCm/ROCR-Runtime commit: c5e74b7d0a]
 2024-03-26 18:47:05 -04:00
Konstantin Zhuravlyov ec66509986 Rename existing relocation types to legacy/v1 (NFC) 
Change-Id: Ided7f656c34131b8067a19c0d3b2955fc8823628


[ROCm/ROCR-Runtime commit: b2c32ad6cb]
 2024-03-26 18:46:50 -04:00
pvanhout 8e43aaab04 [libamdhsacode] Support COV6/Generic Targets 
Change-Id: I4680577eb56dc436fbc134b169f172dd476bff37


[ROCm/ROCR-Runtime commit: a93c18dc90]
 2024-03-12 07:37:32 -04:00
Alex Sierra 663e42663b core dump: SegmentBuilder classes added 
SegmentBuilder classes are used to get core dump data from the GPUs.
So far, it uses thunk API calls and smaps to collect all data from
the Hardware.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I2ad70ca5a951885181d3142653b186b0f6be739e


[ROCm/ROCR-Runtime commit: 1083d5c35f]
 2023-12-05 23:19:14 -05:00
Lang Yu 43ae931ad5 Revert "Revert "Add support for GC 11.5.0 and 11.5.1"" 
This reverts commit a8e34eaec8.

gfx1150/1151 is merged into mainline now.

Change-Id: Id179949318a37888c74abb5a8610d95bc2f22906


[ROCm/ROCR-Runtime commit: 991bbdcf24]
 2023-12-04 15:03:31 +00:00
David Yat Sin a8e34eaec8 Revert "Add support for GC 11.5.0 and 11.5.1" 
Reverting this as current mainline compiler branch does not support
gfx1150/gfx1151 yet. Will bring back later.

This reverts commit 75ce1848cf.

Change-Id: I31ff4fb2d5817538094a7ffaeba96dd6a7d660c7


[ROCm/ROCR-Runtime commit: ebc51dd0eb]
 2023-07-26 15:03:54 +00:00
Lang Yu 75ce1848cf Add support for GC 11.5.0 and 11.5.1 
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: I3c4116e78a5c1ddac2389f5fece57485bdb17f68


[ROCm/ROCR-Runtime commit: e877840197]
 2023-07-22 16:06:22 +08:00
David Yat Sin 3345ada378 Adding gfx941 and gfx942 
Adding support for gfx941 and gfx942 ISAs.
gfx940 ISA will use sc0:1 sc1:1 on load/store operations
gfx942 ISA will use default load/store operations

Change-Id: If1efbef86f59e2cf2d48fe359cd4166405a0a579


[ROCm/ROCR-Runtime commit: 41f6d0426d]
 2023-05-23 11:13:16 -04:00
Mike Li fe9b01e916 Added gfx940 ISA 
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Icb1830fe186abc69fe7ee709b7f12b882cab9e87


[ROCm/ROCR-Runtime commit: bd98a1e5bf]
 2023-04-27 16:08:58 -04:00
David Belanger 9f2c88c46a Initial changes for gfx1101, based on gfx1100/gfx1102 implementation. 
Change-Id: I949c1027ccabf38b4f924590e42e7327dc550f73
Signed-off-by: David Belanger <david.belanger@amd.com>
Reviewed-by: Jonathan Kim <jonathan.kim@amd.com>


[ROCm/ROCR-Runtime commit: a0d3db6e8d]
 2022-10-13 09:28:39 -04:00
David Yat Sin 8f52aafdc6 Use FAMILY_GFX1103 for gfx1103 
Also adding elf entry

Change-Id: Id47ec379f2880961022b4607eb7f106b7e9d7048


[ROCm/ROCR-Runtime commit: 574bea4a4c]
 2022-08-04 11:23:28 -04:00
David Yat Sin 1b06817f57 Add gfx1102 support 
Change-Id: I39cbda81a7a999aa2ecfad7a3e720000f7ca3408
Signed-off-by: David Yat Sin <David.YatSin@amd.com>


[ROCm/ROCR-Runtime commit: cc3bd31591]
 2022-08-03 10:56:54 -04:00
Graham Sider d67faa5e1f Add gfx1100 support 
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ic5d5559e43df5c73409ba900a42c6901aabae661


[ROCm/ROCR-Runtime commit: 446c5e9672]
 2022-08-03 10:56:49 -04:00
Yifan Zhang a57d706974 add gfx1036 support 
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: Ifc1b3cf2e46cf753f57470ebc6b034c1a349d3d2


[ROCm/ROCR-Runtime commit: 54c8b7900d]
 2022-04-29 17:52:22 -04:00
Konstantin Zhuravlyov 625b1c99b3 Add code object v5 support 
Change-Id: I03522765056e99ed49e6c5e213ee3753852de27b


[ROCm/ROCR-Runtime commit: 9265409f08]
 2022-04-12 08:53:27 -04:00
Sean Keely 2be7abd7e1 Revert "add gfx1036 support" 
Compiler is not promoted to mainline yet.

This reverts commit 7dcccdf452.

Change-Id: I7256aeb3698ee3ae640a9f457a929abe24d5ef17


[ROCm/ROCR-Runtime commit: 7e73760cd0]
 2022-03-18 02:35:01 -05:00
Yifan Zhang 7dcccdf452 add gfx1036 support 
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I075779b1369fde759c29572fa2027a3748d6ed4c


[ROCm/ROCR-Runtime commit: 2f97f17df9]
 2022-03-05 13:16:19 +08:00
Oak Zeng f590465aa3 Add gfx1013 support 
Change-Id: I7122caea3ef2254b50bde25ec545116685452116
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 80206af91e]
 2021-09-15 01:10:20 -04:00
Aaron Liu eb72821574 Add gfx1035 for yellow carp 
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I1e3e44352b5825fc0f249c39aed703d4990995ca


[ROCm/ROCR-Runtime commit: 4032070c3e]
 2021-07-22 13:48:31 +08:00
Chris Freehill 75190cb229 Add gfx1034 support 
Change-Id: I2d4bfcb9012704daf7de10739c966827bd2a09e2


[ROCm/ROCR-Runtime commit: 8cb686fdc5]
 2021-05-25 16:43:16 -05:00
Tony Tye e20cccb6e4 Add support for gfx909 and gfx90c 
Change-Id: I88158789cdda44a173e3ca26d2c96b8e0ea0e221


[ROCm/ROCR-Runtime commit: a97c14abea]
 2021-04-08 22:37:30 +00:00
Sean Keely dd42ca6dbe Squash merge of cfreehil/amd-temp-gfx90a onto amd-staging. 
Includes some workarounds and HMM.
Conflicts:
	opensrc/hsa-runtime/core/runtime/amd_topology.cpp
	opensrc/hsa-runtime/core/util/flag.h

Change-Id: I22976f07964a43dbb228a6231777dbd599112b8d


[ROCm/ROCR-Runtime commit: 7333c77e22]
 2021-04-02 02:10:15 -04:00
Tony b36aad204e Make supported targets consistent 
Add missing target names and make all parts consistent with which
targets are supported.

- Add gfx805 as a supported target.

- Add all ELF targets to genric code.

- Make offline loader match supported targets.

Change-Id: Idab4d69edc71645aecaa83aa55e29c1aeee4c1d6


[ROCm/ROCR-Runtime commit: b443397bcc]
 2020-11-24 03:14:31 +00:00
Konstantin Zhuravlyov ba667661c5 Implement Target ID Proposal 
Changes from Konstantin Zhuravlyov, Tony Tye

Change-Id: I532801193afa9d5b8ac2a877b5497eab661f0597


[ROCm/ROCR-Runtime commit: 3a08d0964e]
 2020-11-10 13:42:35 -05:00
Chris Freehill d529685dd8 Add gfx1031 support 
Change-Id: I855f7fe8d096331d0c1da10b10adf6b1e75a527f


[ROCm/ROCR-Runtime commit: 4944c74189]
 2020-09-10 11:06:58 -04:00
Sean Keely 240a56b059 Switch to release e_flags id for gfx1030. 
Change-Id: I51c9ecdf78d6ec56ccc70ca5777bb011db35fda3


[ROCm/ROCR-Runtime commit: 78e5c06ea8]
 2020-08-12 16:38:16 -05:00
Sean Keely d4b61cc3e6 Add ELF types for gfx1030. 
Change-Id: If875534d698da9840e47c380d5630b6dd742ab0c


[ROCm/ROCR-Runtime commit: ddfe07871a]
 2020-08-12 16:34:17 -05:00
Sean Keely abd712f33f Update copyright date. 
Change-Id: If4bf4c20cf051878bfe759080bb7345d884dd53d


[ROCm/ROCR-Runtime commit: ce19721c88]
 2020-06-19 22:34:01 -04:00
Jay Cornwall d597f80b04 Add gfx1010, gfx1011, gfx1012 ELF types to loader 
Change-Id: I23a1159fb10f60881ea6830ba13ee73bd373bfc9


[ROCm/ROCR-Runtime commit: 32a9a5dbb0]
 2019-09-14 14:07:16 -04:00
Chris Freehill 3cd4461a7d gfx908 loader/isa related changes 
Change-Id: I638d4b2b300ac5a99d4d31d4fadcfe9e1e3c7748


[ROCm/ROCR-Runtime commit: 6588165de1]
 2019-07-23 03:41:27 -04:00
Sean Keely 8b90c223ac Loader support for SRAM ECC. 
Change-Id: I0c6791c356d9186cc8dabae9fd698b1d4de19b09


[ROCm/ROCR-Runtime commit: 3c3db0243e]
 2019-02-25 18:30:05 -05:00
Konstantin Zhuravlyov 564ac4b348 Loader updates for code object v3 
- Fix loading in some cases
  - Fix symbol kind

Change-Id: I721b4a35972b6d2a6d0ac733ab770b096cc74e17


[ROCm/ROCR-Runtime commit: c1ad82a6b7]
 2019-01-18 15:41:01 -05:00
Wilkin c7af4e8857 ROCm Runtime Support for respecting target xnack setting 
This includes the changes provided by Konstantin, "Add xnack from elf header" (Change 136389).

Change-Id: I95e51141caa0d7c21903b09212c02e4906ec54a3


[ROCm/ROCR-Runtime commit: 8e3d26c617]
 2018-03-20 16:57:15 -04:00
Tony Tye ab3c53761b Add support for R_AMDGPU_RELATIVE64 
- Add support for R_AMDGPU_RELATIVE64 relocation record.
- Return status error if any unsupported relocation record encountered.

Change-Id: Icbb5dcb81109a70c1f2195412a0df58a11be9da1


[ROCm/ROCR-Runtime commit: d472b24d05]
 2018-01-30 18:20:26 -05:00
James Edwards (xN/A) TX 8504fcb6ca Separate open source core runtime code from DK makefiles. 
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1250152]


[ROCm/ROCR-Runtime commit: 7d2bc9d113]
 2016-03-22 18:10:13 -05:00
James Edwards (xN/A) TX 6da3325470 Remove opensrc test files. 
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1249961]


[ROCm/ROCR-Runtime commit: 7d1e6c3a57]
 2016-03-22 13:39:51 -05:00
James Edwards (xN/A) TX 67e6064a6a Check open source core runtime code into perforce. This includes license and README files. 
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1249136]


[ROCm/ROCR-Runtime commit: c9ffe0004e]
 2016-03-20 15:39:40 -05:00